Patents by Inventor Joseph Gerard Schultz

Joseph Gerard Schultz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10566938
    Abstract: Systems for providing isolation of a bias signal relative to a radio frequency (RF) signal in an integrated circuit, and related circuits, modules, and methods, are disclosed herein. In one example embodiment, a system includes an inductor, a bypass capacitor, and a transmission line segment, which includes first and second ends and extends between the first and second ends. The first end is at least indirectly coupled to the bypass capacitor, the second end is at least indirectly coupled to a first additional end of the inductor, and a second additional end of the inductor is configured to be coupled at least indirectly to a device through which the RF signal is being communicated. The transmission line segment is configured to impart a non-negligible phase shift to a signal communicated between the first and second ends, or is configured to have a non-negligible effective inductance.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: February 18, 2020
    Assignee: NXP USA, Inc.
    Inventors: Joseph Gerard Schultz, Yu-Ting David Wu, Nick Yang
  • Publication number: 20190379334
    Abstract: An amplifier module is provided. The amplifier module includes a multi-layer printed circuit board (PCB). A first power transistor die is mounted at a top surface of the multi-layer PCB. A second power transistor die is mounted at the top surface of the multi-layer PCB. An impedance inversion element is coupled between an output of the first power transistor die and an output of the second power transistor die. A combining node is formed at the output of the second power transistor die. A stub circuit including a transmission line element is coupled at the combining node.
    Type: Application
    Filed: June 11, 2018
    Publication date: December 12, 2019
    Inventors: ENVER KRVAVAC, JOSEPH GERARD SCHULTZ, YU-TING DAVID WU, NICK YANG
  • Patent number: 10498292
    Abstract: An amplifier module is provided. The amplifier module includes a multi-layer printed circuit board (PCB). A first power transistor die is mounted at a top surface of the multi-layer PCB. A second power transistor die is mounted at the top surface of the multi-layer PCB. An impedance inversion element is coupled between an output of the first power transistor die and an output of the second power transistor die. A combining node is formed at the output of the second power transistor die. A stub circuit including a transmission line element is coupled at the combining node.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: December 3, 2019
    Assignee: NXP USA, INC.
    Inventors: Enver Krvavac, Joseph Gerard Schultz, Yu-Ting David Wu, Nick Yang
  • Patent number: 10381984
    Abstract: A Doherty amplifier module includes first and second amplifier die. The first amplifier die includes one or more first power transistors configured to amplify, along a first signal path, a first input RF signal to produce an amplified first RF signal. The second amplifier die includes one or more second power transistors configured to amplify, along a second signal path, a second input RF signal to produce an amplified second RF signal. A phase shift and impedance inversion element is coupled between the outputs of the first and second amplifier die. A shunt circuit is coupled to the output of either or both of the first and/or second amplifier die. The shunt circuit includes a series coupled inductance and high-Q capacitor (e.g., a metal-insulator-metal (MIM) capacitor), and the shunt circuit is configured to at least partially resonate out the output capacitance of the amplifier die to which it is connected.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: August 13, 2019
    Assignee: NXP USA, Inc.
    Inventors: Yu-Ting David Wu, Enver Krvavac, Joseph Gerard Schultz, Nick Yang, Damon G. Holmes, Shishir Ramasare Shukla, Jeffrey Kevin Jones, Elie A. Maalouf, Mario Bokatius
  • Publication number: 20190173430
    Abstract: Embodiments of a multiple-path amplifier (e.g., a Doherty amplifier) and a module housing the amplifier include a first amplifier (or first power transistor die) with a first output terminal, a second amplifier (or second power transistor die) with a second output terminal, and an impedance inverter line assembly electrically connected between the first and second output terminals. The impedance inverter line assembly includes a first transmission line and a surface mount component connected in series between the first and second output terminals. In various embodiments, the surface mount component is selected from a fixed-value capacitor, a fixed-value inductor, a tunable capacitor, a tunable inductor, and a tunable passive component network.
    Type: Application
    Filed: December 4, 2017
    Publication date: June 6, 2019
    Inventors: James Krehbiel, Nick Yang, Joseph Gerard Schultz, Enver Krvavac, Yu-Ting David Wu
  • Publication number: 20190140598
    Abstract: A multiple-stage amplifier includes a driver stage die and a final stage die. The driver stage die includes a first type of semiconductor substrate (e.g., a silicon substrate), a first transistor, and an integrated portion of an interstage impedance matching circuit. A control terminal of the first transistor is electrically coupled to an RF signal input terminal of the driver stage die, and the integrated portion of the interstage impedance matching circuit is electrically coupled between a current-carrying terminal of the first transistor and an RF signal output terminal of the driver stage die. The second die includes a III-V semiconductor substrate (e.g., a GaN substrate) and a second transistor. A connection, which is a non-integrated portion of the interstage impedance matching circuit, is electrically coupled between the RF signal output terminal of the driver stage die and an RF signal input terminal of the final stage die.
    Type: Application
    Filed: October 26, 2018
    Publication date: May 9, 2019
    Inventors: Joseph Gerard SCHULTZ, Enver KRVAVAC, Olivier LEMBEYE, Cedric CASSAN, Kevin KIM, Jeffrey Kevin JONES
  • Patent number: 10284146
    Abstract: An embodiment of a Doherty amplifier module includes a substrate, a first amplifier die, and a second amplifier die. The first amplifier die includes one or more first power transistors configured to amplify, along a first signal path, a first input RF signal to produce an amplified first RF signal. The second amplifier die includes one or more second power transistors configured to amplify, along a second signal path, a second input RF signal to produce an amplified second RF signal. The first and second amplifier die each also include an elongated output pad that is configured to enable a pluralities of wirebonds to be connected in parallel along the length of the elongated output pad so that the pluralities of wirebonds extend in perpendicular directions to the first and second signal paths.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: May 7, 2019
    Assignee: NXP USA, Inc.
    Inventors: Yu-Ting Wu, Nick Yang, Joseph Gerard Schultz
  • Patent number: 10284147
    Abstract: A Doherty amplifier module includes first and second amplifier die. The first amplifier die includes one or more first power transistors configured to amplify, along a first signal path, a first input RF signal to produce an amplified first RF signal. The second amplifier die includes one or more second power transistors configured to amplify, along a second signal path, a second input RF signal to produce an amplified second RF signal. A phase shift and impedance inversion element is coupled between the outputs of the first and second amplifier die. A shunt inductance circuit is coupled to the output of either or both of the first and/or second amplifier die. Each shunt inductance circuit at least partially resonates out the output capacitance of the amplifier die to which it is connected to enable the electrical length of the phase shift and impedance inversion element to be increased.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: May 7, 2019
    Assignee: NXP USA, Inc.
    Inventors: Yu-Ting Wu, Enver Krvavac, Joseph Gerard Schultz
  • Patent number: 10263067
    Abstract: A radio frequency (RF) chip capacitor circuit and structure are provided. The circuit and structure include a plurality of capacitors connected in series. Each capacitor of the plurality includes a first plate formed from a first metal layer and a second plate formed from a second metal layer. A first two adjacent capacitors of the plurality include first plates formed in a first contiguous portion of the first metal layer or second plates formed in a second contiguous portion of the second metal layer. Each capacitor of the plurality may include a dielectric layer disposed between the first plate and the second plate.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: April 16, 2019
    Assignee: NXP USA, INC.
    Inventors: Joseph Gerard Schultz, Yu-Ting Wu, Shishir Ramasare Shukla, Enver Krvavac, Hussain Hasanali Ladhani, Damon G. Holmes
  • Patent number: 10236852
    Abstract: An integrated circuit (IC) includes an input pad and an output pad separated from the input pad by a predetermined distance. A plurality of capacitors are coupled in series between the input pad and the output pad. The plurality of capacitors are distributed to substantially span the predetermined distance. An inductor is formed from a bond wire, having a first end attached at the first input pad and a second end attached at the output pad. The inductor and plurality of capacitors configured to form a predetermined open circuit resonance.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: March 19, 2019
    Assignee: NXP USA, INC.
    Inventors: Joseph Gerard Schultz, Hussain Hasanali Ladhani, Enver Krvavac, Yu-Ting Wu
  • Publication number: 20180331172
    Abstract: A radio frequency (RF) chip capacitor circuit and structure are provided. The circuit and structure include a plurality of capacitors connected in series. Each capacitor of the plurality includes a first plate formed from a first metal layer and a second plate formed from a second metal layer. A first two adjacent capacitors of the plurality include first plates formed in a first contiguous portion of the first metal layer or second plates formed in a second contiguous portion of the second metal layer. Each capacitor of the plurality may include a dielectric layer disposed between the first plate and the second plate.
    Type: Application
    Filed: May 12, 2017
    Publication date: November 15, 2018
    Inventors: JOSEPH GERARD SCHULTZ, YU-TING WU, SHISHIR RAMASARE SHUKLA, ENVER KRVAVAC, HUSSAIN HASANALI LADHANI, DAMON G. HOLMES
  • Publication number: 20180175802
    Abstract: A Doherty amplifier module includes first and second amplifier die. The first amplifier die includes one or more first power transistors configured to amplify, along a first signal path, a first input RF signal to produce an amplified first RF signal. The second amplifier die includes one or more second power transistors configured to amplify, along a second signal path, a second input RF signal to produce an amplified second RF signal. A phase shift and impedance inversion element is coupled between the outputs of the first and second amplifier die. A shunt circuit is coupled to the output of either or both of the first and/or second amplifier die. The shunt circuit includes a series coupled inductance and high-Q capacitor (e.g., a metal-insulator-metal (MIM) capacitor), and the shunt circuit is configured to at least partially resonate out the output capacitance of the amplifier die to which it is connected.
    Type: Application
    Filed: December 18, 2017
    Publication date: June 21, 2018
    Inventors: Yu-Ting David Wu, Enver Krvavac, Joseph Gerard Schultz, Nick Yang, Damon G. Holmes, Shishir Ramasare Shukla, Jeffrey Kevin Jones, Elie A. Maalouf, Mario Bokatius
  • Publication number: 20180175799
    Abstract: A Doherty amplifier module includes first and second amplifier die. The first amplifier die includes one or more first power transistors configured to amplify, along a first signal path, a first input RF signal to produce an amplified first RF signal. The second amplifier die includes one or more second power transistors configured to amplify, along a second signal path, a second input RF signal to produce an amplified second RF signal. A phase shift and impedance inversion element is coupled between the outputs of the first and second amplifier die. A shunt inductance circuit is coupled to the output of either or both of the first and/or second amplifier die. Each shunt inductance circuit at least partially resonates out the output capacitance of the amplifier die to which it is connected to enable the electrical length of the phase shift and impedance inversion element to be increased.
    Type: Application
    Filed: December 15, 2016
    Publication date: June 21, 2018
    Inventors: Yu-Ting Wu, Enver Krvavac, Joseph Gerard Schultz
  • Publication number: 20180167047
    Abstract: An integrated circuit (IC) includes an input pad and an output pad separated from the input pad by a predetermined distance. A plurality of capacitors are coupled in series between the input pad and the output pad. The plurality of capacitors are distributed to substantially span the predetermined distance. An inductor is formed from a bond wire, having a first end attached at the first input pad and a second end attached at the output pad. The inductor and plurality of capacitors configured to form a predetermined open circuit resonance.
    Type: Application
    Filed: December 9, 2016
    Publication date: June 14, 2018
    Inventors: JOSEPH GERARD SCHULTZ, HUSSAIN HASANALI LADHANI, ENVER KRVAVAC, YU-TING WU
  • Publication number: 20180159479
    Abstract: An embodiment of a Doherty amplifier module includes a substrate, a first amplifier die, and a second amplifier die. The first amplifier die includes one or more first power transistors configured to amplify, along a first signal path, a first input RF signal to produce an amplified first RF signal. The second amplifier die includes one or more second power transistors configured to amplify, along a second signal path, a second input RF signal to produce an amplified second RF signal. The first and second amplifier die each also include an elongated output pad that is configured to enable a pluralities of wirebonds to be connected in parallel along the length of the elongated output pad so that the pluralities of wirebonds extend in perpendicular directions to the first and second signal paths.
    Type: Application
    Filed: December 1, 2016
    Publication date: June 7, 2018
    Inventors: Yu-Ting Wu, Nick Yang, Joseph Gerard Schultz