Patents by Inventor Joseph Sokol, Jr.
Joseph Sokol, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9471378Abstract: A method for resource management of a data processing system is described herein. According to one embodiment, a token is periodically pushed into a memory usage queue, where the token includes a timestamp indicating time entering the memory usage queue. The memory usage queue stores a plurality of memory page identifiers (IDs) identifying a plurality of memory pages currently allocated to a plurality of programs running within the data processing system. In response to a request to reduce memory usage, a token is popped from the memory usage queue. A timestamp of the popped token is then compared with current time to determine whether a memory usage reduction action should be performed.Type: GrantFiled: February 12, 2015Date of Patent: October 18, 2016Assignee: Apple Inc.Inventors: Lionel D. Desai, Neil G. Crane, Damien P. Sorresso, Joseph Sokol, Jr.
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Patent number: 9436628Abstract: A method and apparatus of a device that manages a thermal profile of a device by selectively throttling input/output operations of the device is described. In an exemplary embodiment, the device monitors the thermal profile of the device, where the device executes a plurality of processes that utilize storage of the device. In addition, the plurality of processes include a high priority process and a low priority process. If the thermal profile of the device exceeds a thermal threshold, the device decreases a first bandwidth range for the low priority process and maintains a second bandwidth range for the high priority process. The device further processes a storage request of the low priority process using the first bandwidth range and processing a storage request of the high priority process using the second bandwidth range.Type: GrantFiled: September 30, 2014Date of Patent: September 6, 2016Assignee: Apple Inc.Inventors: Umesh Suresh Vaishampayan, Derek R. Kumar, Christopher John Sarcone, Russell Alexader Blaine, Tejas Arun Bahulkar, Shachar Katz, Joseph Sokol, Jr., Matthew John Byom
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Patent number: 9417794Abstract: A composite memory device that includes different types of non-volatile memory devices, which have different performance characteristics, is described. This composite memory device may receive requests, a given one of which includes a command, a logical address for at least a block of data associated with the command, and a hint associated with the command. For the given request, the composite memory device executes the command on the block of data at the logical address in at least one of the types of non-volatile memory devices. Furthermore, the composite memory device conditionally executes the hint based on one or more criteria, such as: available memory in the types of non-volatile memory devices, traffic through an interface circuit in the composite memory device, operational states of the types of non-volatile memory devices, a target performance characteristic of the composite memory device, and an environmental condition of the composite memory device.Type: GrantFiled: July 26, 2011Date of Patent: August 16, 2016Assignee: Apple Inc.Inventors: Cheng P. Tan, Khalu C. Bazzani, Sergio J. Henriques, Christopher J. Sarcone, Joseph Sokol, Jr., Dominic B. Giampaolo
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Patent number: 9361215Abstract: In one embodiment, a memory allocator of a memory manager can service memory allocation requests within a specific size-range from a section of pre-reserved virtual memory. The pre-reserved virtual memory allows allocation requests within a specific size range to be allocated in the pre-reserved region, such that the virtual memory address of a memory allocation serviced from the pre-reserved region can indicate elements of metadata associated with the allocations that would otherwise contribute to overhead for the allocation.Type: GrantFiled: September 6, 2013Date of Patent: June 7, 2016Assignee: Apple Inc.Inventors: Stephen C. Peters, Joseph Sokol, Jr.
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Patent number: 9208116Abstract: Multiple variants of a data processing system, which maintains I/O priority from the time a process makes an I/O request until the hardware services that request, will be described. In one embodiment, a data processing system has one or more processors having one or more processor cores, which execute an operating system and one or more applications of the data processing system. The data processing system also can have one or more non-volatile memory device coupled to the one or more processors to store data of the data processing system, and one or more non-volatile memory controller coupled to the one or more processors. The one or more non-volatile memory controller enables a transfer of data to at least one non-volatile memory device, and the priority level assigned by the operating system is maintained throughout the logical data path of the data processing system.Type: GrantFiled: January 12, 2015Date of Patent: December 8, 2015Assignee: Apple Inc.Inventors: Joseph Sokol, Jr., Manoj Radhakrishnan, Matthew J. Byom, Robert Hoopes, Christopher Sarcone
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Publication number: 20150347327Abstract: In one embodiment, input-output (I/O) scheduling system detects and resolves priority inversions by expediting previously dispatched requests to an I/O subsystem. In response to detecting the priority inversion, the system can transmit a command to expedite completion of the blocking I/O request. The pending request can be located within the I/O subsystem and expedited to reduce the pendency period of the request.Type: ApplicationFiled: May 30, 2014Publication date: December 3, 2015Applicant: Apple Inc.Inventors: Russell A. BLAINE, Kushal DALMIA, Joseph SOKOL, JR., Andrew W. VOGAN, Matthew J. BYOM
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Publication number: 20150347330Abstract: A method and apparatus of a device that manages a thermal profile of a device by selectively throttling input/output operations of the device is described. In an exemplary embodiment, the device monitors the thermal profile of the device, where the device executes a plurality of processes that utilize storage of the device. In addition, the plurality of processes include a high priority process and a low priority process. If the thermal profile of the device exceeds a thermal threshold, the device decreases a first bandwidth range for the low priority process and maintains a second bandwidth range for the high priority process. The device further processes a storage request of the low priority process using the first bandwidth range and processing a storage request of the high priority process using the second bandwidth range.Type: ApplicationFiled: September 30, 2014Publication date: December 3, 2015Inventors: Umesh Suresh Vaishampayan, Derek R. Kumar, Christopher John Sarcone, Russell Alexader Blaine, Tejas Arun Bahulkar, Shachar Katz, Joseph Sokol, JR., Matthew John Byom
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Patent number: 9195581Abstract: A two-level paging mechanism. The first level gathers data from reclaimable memory locations for a process and compacts the data into a single container. The second level sends the compact container's contents to a swap file and may use optimal I/O operations to the target memory device. On-demand paging is made possible by having a first pager locate the requested data in the compact container and then having a second pager retrieve the corresponding data from the swap file.Type: GrantFiled: July 1, 2011Date of Patent: November 24, 2015Assignee: Apple Inc.Inventors: Francois Barbou-Des-Places, Neil G. Crane, Lionel D. Desai, Joseph Sokol, Jr.
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Publication number: 20150286500Abstract: A method for resource management of a data processing system is described herein. According to one embodiment, a token is periodically pushed into a memory usage queue, where the token includes a timestamp indicating time entering the memory usage queue. The memory usage queue stores a plurality of memory page identifiers (IDs) identifying a plurality of memory pages currently allocated to a plurality of programs running within the data processing system. In response to a request to reduce memory usage, a token is popped from the memory usage queue. A timestamp of the popped token is then compared with current time to determine whether a memory usage reduction action should be performed.Type: ApplicationFiled: February 12, 2015Publication date: October 8, 2015Inventors: Lionel D. Desai, Neil G. Crane, Damien P. Sorresso, Joseph Sokol, JR.
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Patent number: 9135059Abstract: Services for a personal electronic device are provided through which a form of background processing or multitasking is supported. The disclosed services permit user applications to take advantage of background processing without significant negative consequences to a user's experience of the foreground process or the personal electronic device's power resources. To effect the disclosed multitasking, one or more of a number of operational restrictions may be enforced. By way of example, thread priority levels may be overlapped between the foreground and background states. In addition, system resource availability may be restricted based on whether a process is receiving user input. In some instances, an application may be suspended rather than being placed into the background state. Implementation of the disclosed services may be substantially transparent to the executing user applications and, in some cases, may be performed without the user application's explicit cooperation.Type: GrantFiled: December 2, 2010Date of Patent: September 15, 2015Assignee: Apple Inc.Inventors: Lucia Ballard, David W. Goodwin, Joseph Sokol, Jr., Matthew G. Watson, Neil G. Crane, Cahya Masputra, Charles Srisuwananukorn, Christopher Marcellino, Scott Forstall, Gregory Novick
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Publication number: 20150127863Abstract: Multiple variants of a data processing system, which maintains I/O priority from the time a process makes an I/O request until the hardware services that request, will be described. In one embodiment, a data processing system has one or more processors having one or more processor cores, which execute an operating system and one or more applications of the data processing system. The data processing system also can have one or more non-volatile memory device coupled to the one or more processors to store data of the data processing system, and one or more non-volatile memory controller coupled to the one or more processors. The one or more non-volatile memory controller enables a transfer of data to at least one non-volatile memory device, and the priority level assigned by the operating system is maintained throughout the logical data path of the data processing system.Type: ApplicationFiled: January 12, 2015Publication date: May 7, 2015Inventors: Joseph Sokol, JR., Manoj Radhakrishnan, Matthew J. Byom, Robert Hoopes, Christopher Sarcone
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Patent number: 8990534Abstract: A method for resource management of a data processing system is described herein. According to one embodiment, a token is periodically pushed into a memory usage queue, where the token includes a timestamp indicating time entering the memory usage queue. The memory usage queue stores a plurality of memory page identifiers (IDs) identifying a plurality of memory pages currently allocated to a plurality of programs running within the data processing system. In response to a request to reduce memory usage, a token is popped from the memory usage queue. A timestamp of the popped token is then compared with current time to determine whether a memory usage reduction action should be performed.Type: GrantFiled: May 31, 2012Date of Patent: March 24, 2015Assignee: Apple Inc.Inventors: Lionel D. Desai, Neil G. Crane, Damien P. Sorresso, Joseph Sokol, Jr.
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Patent number: 8959263Abstract: Multiple variants of a data processing system, which maintains I/O priority from the time a process makes an I/O request until the hardware services that request, will be described. In one embodiment, a data processing system has one or more processors having one or more processor cores, which execute an operating system and one or more applications of the data processing system. The data processing system also can have one or more non-volatile memory device coupled to the one or more processors to store data of the data processing system, and one or more non-volatile memory controller coupled to the one or more processors. The one or more non-volatile memory controller enables a transfer of data to at least one non-volatile memory device, and the priority level assigned by the operating system is maintained throughout the logical data path of the data processing system.Type: GrantFiled: January 8, 2013Date of Patent: February 17, 2015Assignee: Apple Inc.Inventors: Joseph Sokol, Jr., Manoj Radhakrishnan, Matthew J. Byom, Robert Hoopes, Christopher Sarcone
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Patent number: 8924739Abstract: Disclosed herein are systems, methods, and non-transitory computer-readable storage media for performing in-place encryption. A system configured to practice the method receives a request from a user to encrypt an unencrypted volume of a computing device and identifies, generates, and/or randomly selects a volume key. Then the system converts the unencrypted volume to an encryptable format divided into portions. The system then encrypts, based on the volume key, the encryptable volume, portion by portion, to enable the user to use the computing device while encrypting. The system can maintain an encryption progress status and display the encryption progress status. The system can monitor disk accesses to the encryptable volume, and, when the disk accesses exceed a first threshold, apply a back-off algorithm to stop encrypting until the disk accesses fall below a second threshold. Thus, the computing device can be used while the encryption occurs in the background.Type: GrantFiled: January 5, 2011Date of Patent: December 30, 2014Assignee: Apple Inc.Inventors: Deric S. Horn, Joseph Sokol, Jr., Owen Joseph Strain, Wenguang Wang
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Publication number: 20140359248Abstract: In one embodiment, a memory allocator of a memory manager can service memory allocation requests within a specific size-range from a section of pre-reserved virtual memory. The pre-reserved virtual memory allows allocation requests within a specific size range to be allocated in the pre-reserved region, such that the virtual memory address of a memory allocation serviced from the pre-reserved region can indicate elements of metadata associated with the allocations that would otherwise contribute to overhead for the allocation.Type: ApplicationFiled: September 6, 2013Publication date: December 4, 2014Applicant: Apple Inc.Inventors: Stephen C. Peters, Joseph Sokol, JR.
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Patent number: 8782454Abstract: A system and method are described for utilizing task urgency information when making power management decisions. For example, one embodiment of a method for managing power states of a processor comprises: executing a first power management state machine based on a first urgency level associated with a first task; detecting the execution of a second task having a second urgency level associated therewith; if the second urgency level is greater than the first urgency level, then executing a second power management state machine associated with the second urgency level.Type: GrantFiled: October 28, 2011Date of Patent: July 15, 2014Assignee: Apple Inc.Inventors: Daniel S. Heller, Guy G. Sotomayor, Joseph Sokol, Jr.
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Publication number: 20140195699Abstract: Multiple variants of a data processing system, which maintains I/O priority from the time a process makes an I/O request until the hardware services that request, will be described. In one embodiment, a data processing system has one or more processors having one or more processor cores, which execute an operating system and one or more applications of the data processing system. The data processing system also can have one or more non-volatile memory device coupled to the one or more processors to store data of the data processing system, and one or more non-volatile memory controller coupled to the one or more processors. The one or more non-volatile memory controller enables a transfer of data to at least one non-volatile memory device, and the priority level assigned by the operating system is maintained throughout the logical data path of the data processing system.Type: ApplicationFiled: January 8, 2013Publication date: July 10, 2014Applicant: Apple Inc.Inventors: Joseph Sokol, JR., Manoj Radhakrishnan, Matthew J. Byom, Robert Hoopes, Christopher Sarcone
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Publication number: 20140189281Abstract: A method and an apparatus for a memory device including a dynamically updated portion of compressed memory for a virtual memory are described. The memory device can include an uncompressed portion of memory separate from the compressed portion of memory. The virtual memory may be capable of mapping a memory address to the compressed portion of memory. A memory region allocated in the uncompressed portion of memory can be compressed into the compressed portion of memory. As a result, the memory region can become available (e.g. after being compressed) for future allocation requested in the memory device. The compressed portion of memory may be updated to store the compressed memory region. The compressed memory region may be decompressed back to the uncompressed portion in the memory device in response to a request to access data in the compressed memory region.Type: ApplicationFiled: December 28, 2012Publication date: July 3, 2014Applicant: Apple Inc.Inventor: Joseph Sokol, JR.
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Publication number: 20130326166Abstract: A method for resource management of a data processing system is described herein. According to one embodiment, a token is periodically pushed into a memory usage queue, where the token includes a timestamp indicating time entering the memory usage queue. The memory usage queue stores a plurality of memory page identifiers (IDs) identifying a plurality of memory pages currently allocated to a plurality of programs running within the data processing system. In response to a request to reduce memory usage, a token is popped from the memory usage queue. A timestamp of the popped token is then compared with current time to determine whether a memory usage reduction action should be performed.Type: ApplicationFiled: May 31, 2012Publication date: December 5, 2013Applicant: Apple Inc.Inventors: Lionel D. Desai, Neil G. Crane, Damien P. Sorresso, Joseph Sokol, JR.
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Publication number: 20130111242Abstract: A system and method are described for utilizing task urgency information when making power management decisions. For example, one embodiment of a method for managing power states of a processor comprises: executing a first power management state machine based on a first urgency level associated with a first task; detecting the execution of a second task having a second urgency level associated therewith; if the second urgency level is greater than the first urgency level, then executing a second power management state machine associated with the second urgency level.Type: ApplicationFiled: October 28, 2011Publication date: May 2, 2013Inventors: Daniel S. HELLER, Guy G. SOTOMAYOR, Joseph SOKOL, JR.