Patents by Inventor Joseph Sokol, Jr.
Joseph Sokol, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20130031298Abstract: A composite memory device that includes different types of non-volatile memory devices, which have different performance characteristics, is described. This composite memory device may receive requests, a given one of which includes a command, a logical address for at least a block of data associated with the command, and a hint associated with the command. For the given request, the composite memory device executes the command on the block of data at the logical address in at least one of the types of non-volatile memory devices. Furthermore, the composite memory device conditionally executes the hint based on one or more criteria, such as: available memory in the types of non-volatile memory devices, traffic through an interface circuit in the composite memory device, operational states of the types of non-volatile memory devices, a target performance characteristic of the composite memory device, and an environmental condition of the composite memory device.Type: ApplicationFiled: July 26, 2011Publication date: January 31, 2013Applicant: APPLE INC.Inventors: Cheng P. Tan, Khalu C. Bazzani, Sergio J. Henriques, Christopher J. Sarcone, Joseph Sokol, JR., Dominic B. Giampaolo
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Publication number: 20130007492Abstract: An indication that a subsystem is about to enter an idle state is received, and an original fire time for a next timer interrupt is determined. An idle state for a subsystem is selected based on the original fire time; and a new fire time for the next timer interrupt is determined based on the selected idle state to reduce timer interrupt latency. A current latency in exiting an idle state is measured. The measured latency is added to a running average of latencies for the idle state. A latency value is determined based on the running average and a worst case latency to adjust an original fire time for a next timer interrupt.Type: ApplicationFiled: June 30, 2011Publication date: January 3, 2013Inventors: JOSEPH SOKOL, JR., Daniel S. Heller, Umesh S. Vaishampayan, Guy G. Sotomayor, JR.
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Publication number: 20130007345Abstract: A two-level paging mechanism. The first level gathers data from reclaimable memory locations for a process and compacts the data into a single container. The second level sends the compact container's contents to a swap file and may use optimal I/O operations to the target memory device. On-demand paging is made possible by having a first pager locate the requested data in the compact container and then having a second pager retrieve the corresponding data from the swap file.Type: ApplicationFiled: July 1, 2011Publication date: January 3, 2013Inventors: FRANCOIS BARBOU-DES-PLACES, Neil G. Crane, Lionel D. Desai, Joseph Sokol, JR.
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Patent number: 8225079Abstract: A method for accelerating an operating system boot process is disclosed. In one exemplary embodiment, during a first operating system boot, information regarding the physical locations of disk access performed by the operating system to complete the boot are recorded and stored in a control data file. The control data file is used during a second operating system boot to predict which data will be required during the second operating system, and to populate a cache with that data. The cache can then be used to improve the second operating system boot to improve the boot time. In one embodiment, the information is independent of a file system of the operating system. In another embodiment, the cache can be populated by copying data from a mass storage device to a cache, and when the data is used, it can be moved from the cache to another cache.Type: GrantFiled: September 25, 2009Date of Patent: July 17, 2012Assignee: Apple Inc.Inventors: Mike Smith, Joseph Sokol, Jr.
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Publication number: 20120173882Abstract: Disclosed herein are systems, methods, and non-transitory computer-readable storage media for performing in-place encryption. A system configured to practice the method receives a request from a user to encrypt an unencrypted volume of a computing device and identifies, generates, and/or randomly selects a volume key. Then the system converts the unencrypted volume to an encryptable format divided into portions. The system then encrypts, based on the volume key, the encryptable volume, portion by portion, to enable the user to use the computing device while encrypting. The system can maintain an encryption progress status and display the encryption progress status. The system can monitor disk accesses to the encryptable volume, and, when the disk accesses exceed a first threshold, apply a back-off algorithm to stop encrypting until the disk accesses fall below a second threshold. Thus, the computing device can be used while the encryption occurs in the background.Type: ApplicationFiled: January 5, 2011Publication date: July 5, 2012Applicant: Apple Inc.Inventors: Deric S. Horn, Joseph Sokol, JR., Owen Joseph Strain, Wenguang Wang
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Publication number: 20110252429Abstract: Services for a personal electronic device are provided through which a form of background processing or multitasking is supported. The disclosed services permit user applications to take advantage of background processing without significant negative consequences to a user's experience of the foreground process or the personal electronic device's power resources. To effect the disclosed multitasking, one or more of a number of operational restrictions may be enforced. By way of example, thread priority levels may be overlapped between the foreground and background states. In addition, system resource availability may be restricted based on whether a process is receiving user input. In some instances, an application may be suspended rather than being placed into the background state. Implementation of the disclosed services may be substantially transparent to the executing user applications and, in some cases, may be performed without the user application's explicit cooperation.Type: ApplicationFiled: December 2, 2010Publication date: October 13, 2011Applicant: APPLE INC.Inventors: Lucia Ballard, David W. Goodwin, Joseph Sokol, Jr., Matthew G. Watson, Neil G. Crane, Cahya Masputra, Charles Srisuwananukorn, Christopher Marcellino, Scott Forstall, Gregory Novick
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Patent number: 8001359Abstract: Embodiments of the present invention provide a system that maps an N-bit application to virtual memory. The N-bit application may be obtained by porting an M-bit application to an N-bit architecture where N is greater than M. During operation, the system receives a request to map an N-bit application to a computer's virtual memory. The system then maps the N-bit application to a section of virtual memory which begins at a memory address that is greater than or equal to 2M. If the N-bit application accesses a memory address which is less than 2M, the system can generate a trap, thereby facilitating the discovery of M-bit memory references in the N-bit application.Type: GrantFiled: September 30, 2008Date of Patent: August 16, 2011Assignee: Apple Inc.Inventors: Christopher G. Peak, Martin Scheinberg, Joseph Sokol, Jr.
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Patent number: 7849169Abstract: A method and apparatus are provided for supplying a reliable and maintainable operating system in a net-booted environment. According to one embodiment, a network computer (NC) client boots from a boot image provided by an NC server. The boot image includes information identifying the location of one or more system volumes on the NC server that contain operating system software. In response to an attempt to modify the contents of the one or more system volumes, the NC client causes information identifying the modification to be recorded on the NC server separate from the one or more system volumes in a storage area associated with the NC client.Type: GrantFiled: June 18, 2007Date of Patent: December 7, 2010Assignee: Apple Inc.Inventors: C. K. Haun, Craig Harvey Prouse, Joseph Sokol, Jr., Paul M. Resch
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Publication number: 20100017591Abstract: A method for accelerating an operating system boot process is disclosed. In one exemplary embodiment, during a first operating system boot, information regarding the physical locations of disk access performed by the operating system to complete the boot are recorded and stored in a control data file. The control data file is used during a second operating system boot to predict which data will be required during the second operating system, and to populate a cache with that data. The cache can then be used to improve the second operating system boot to improve the boot tine. In one embodiment, the information is independent of a file system of the operating system. In another embodiment, the cache can be populated by copying data from a mass storage device to a cache, and when the data is used, it can be moved from the cache to another cache.Type: ApplicationFiled: September 25, 2009Publication date: January 21, 2010Inventors: Mike Smith, Joseph Sokol, JR.
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Patent number: 7607000Abstract: A method for accelerating an operating system boot process is disclosed. In one exemplary embodiment, during a first operating system boot, information regarding the physical locations of disk access performed by the operating system to complete the boot are recorded and stored in a control data file. The control data file is used during a second operating system boot to predict which data will be required during the second operating system, and to populate a cache with that data. The cache can then be used to improve the second operating system boot to improve the boot time. In one embodiment, the information is independent of a file system of the operating system. In another embodiment, the cache can be populated by copying data from a mass storage device to a cache, and when the data is used, it can be moved from the cache to another cache.Type: GrantFiled: May 13, 2003Date of Patent: October 20, 2009Assignee: Apple Inc.Inventors: Mike Smith, Joseph Sokol, Jr.
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Patent number: 7562362Abstract: In response to user action, lower priority tasks are scheduled as high priority tasks. This allows lower priority tasks to function even if a higher priority task has malfunctioned and starved the lower priority tasks of instructions. This advantageously provides the user with increased abilities to solve or work around malfunctioning tasks.Type: GrantFiled: June 18, 2003Date of Patent: July 14, 2009Assignee: Apple Inc.Inventors: Michael J Paquette, Joseph Sokol, Jr.
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Publication number: 20090031102Abstract: Embodiments of the present invention provide a system that maps an N-bit application to virtual memory. The N-bit application may be obtained by porting an M-bit application to an N-bit architecture where N is greater than M. During operation, the system receives a request to map an N-bit application to a computer's virtual memory. The system then maps the N-bit application to a section of virtual memory which begins at a memory address that is greater than or equal to 2M. If the N-bit application accesses a memory address which is less than 2M, the system can generate a trap, thereby facilitating the discovery of M-bit memory references in the N-bit application.Type: ApplicationFiled: September 30, 2008Publication date: January 29, 2009Applicant: APPLE INC.Inventors: Christopher G. Peak, Martin Scheinberg, Joseph Sokol, JR.
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Patent number: 7451298Abstract: One embodiment of the present invention provides a system that uses an M-bit operating system (OS) kernel to support N-bit user processes. During operation, the system receives an exception. Note that the exception can be any event that needs to be handled by executing OS kernel code. Specifically, the exception can be a hardware interrupt, a software interrupt, an asynchronous interrupt, a synchronous interrupt, a signal, a trap, or a system call. Next, the system handles the exception by first switching the processor to the M-bit mode, and then executing M-bit OS kernel code which is designed to handle the exception. Note that the processor may primarily be designed to operate in the N-bit mode; the M-bit mode may primarily be provided for backward compatibility reasons.Type: GrantFiled: August 3, 2006Date of Patent: November 11, 2008Assignee: Apple Inc.Inventors: Christopher G. Peak, Martin Scheinberg, Joseph Sokol, Jr.
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Patent number: 7233985Abstract: A method and apparatus are provided for supplying a reliable and maintainable operating system in a net-booted environment. According to one embodiment, a network computer (NC) client boots from a boot image provided by an NC server. The boot image includes information identifying the location of one or more system volumes on the NC server that contain operating system software. In response to an attempt to modify the contents of the one or more system volumes, the NC client causes information identifying the modification to be recorded on the NC server separate from the one or more system volumes in a storage area associated with the NC client.Type: GrantFiled: January 23, 2004Date of Patent: June 19, 2007Assignee: Apple Inc.Inventors: C. K. Hahn, Craig Harvey Prouse, Joseph Sokol, Jr., Paul M. Resch
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Patent number: 6751658Abstract: A method and apparatus are provided for supplying a reliable and maintainable operating system in a net-booted environment. According to one embodiment, a network computer (NC) client boots from a boot image provided by an NC server. The boot image includes information identifying the location of one or more system volumes on the NC server that contain operating system software. In response to an attempt to modify the contents of the one or more system volumes, the NC client causes information identifying the modification to be recorded on the NC server separate from the one or more system volumes in a storage area associated with the NC client.Type: GrantFiled: October 18, 1999Date of Patent: June 15, 2004Assignee: Apple Computer, Inc.Inventors: Christopher K. Haun, Craig Harvey Prouse, Joseph Sokol, Jr., Paul M. Resch