Patents by Inventor Joseph T. Kennedy
Joseph T. Kennedy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10727044Abstract: A method for preventing the collapse of patterned, high aspect ratio features formed in semiconductor substrates upon removal of an initial fluid of the type used to clean etch residues from the spaces between the features. In the present method, the spaces are at least partially filled with a displacement solution, such as via spin coating, to substantially displace the initial fluid. The displacement solution includes at least one solvent and at least one, or combination of, a first fill material in the form of a phenol-formaldehyde polymer and/or a second fill material in the form of a polyalkene carbonate (PAC). The solvent is then volatized to deposit the fill materials in substantially solid form within the spaces. The fill materials may be removed by known plasma etch process via a high etch rate as compared to use of current fill materials, which prevents or mitigates silicon loss.Type: GrantFiled: September 10, 2018Date of Patent: July 28, 2020Assignee: Honeywell International Inc.Inventors: Desaraju Varaprasad, Songyuan Xie, Joseph T. Kennedy
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Patent number: 10544330Abstract: A composition for planarizing a semiconductor device surface includes poly(methyl silsesquioxane) resin, at least one of a quaternary ammonium salt and an aminopropyltriethoxysilane salt, and at least one solvent. The poly(methyl silsesquioxane) resin ranges from 1 wt. % to 40 wt. % of the composition. The poly(methyl silsesquioxane) resin has a weight average molecular weight between 500 Da and 5,000 Da. The at least one of the quaternary ammonium salt and the aminopropyltriethoxysilane salt ranges from 0.01 wt. % to 0.20 wt. % of the composition. The at least one solvent comprises the balance of the composition.Type: GrantFiled: August 30, 2017Date of Patent: January 28, 2020Assignee: Honeywell International Inc.Inventors: Yamini Pandey, Helen Xiao Xu, Joseph T. Kennedy
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Publication number: 20190127529Abstract: A polyimide polymer includes one or more aromatic dianhydride monomers and one or more aromatic diamine monomers as recited herein. A method for making a flexible display device includes preparing a polyimide solution including a polyimide polymer dissolved in a solvent, coating a substrate with the polyimide solution, heating the coating to evaporate the solvent and form a polyimide layer, forming a display device layer on the polyimide layer, dicing through the display device layer and through the polyimide polymer layer, and delaminating the layer from the substrate to form the flexible display device. A flexible display device can include a polyimide polymer backing layer and a display device disposed on the polyimide polymer backing layer, the polyimide polymer including one or more aromatic dianhydride monomers and one or more aromatic diamine monomers as recited herein.Type: ApplicationFiled: October 29, 2018Publication date: May 2, 2019Inventors: Ya Qun Liu, Ying Han, Mingchang Lin, Deguang Zhang, Chunqing Liu, Joseph T. Kennedy
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Publication number: 20190088470Abstract: A method for preventing the collapse of patterned, high aspect ratio features formed in semiconductor substrates upon removal of an initial fluid of the type used to clean etch residues from the spaces between the features. In the present method, the spaces are at least partially filled with a displacement solution, such as via spin coating, to substantially displace the initial fluid. The displacement solution includes at least one solvent and at least one, or combination of, a first fill material in the form of a phenol-formaldehyde polymer and/or a second fill material in the form of a polyalkene carbonate (PAC). The solvent is then volatized to deposit the fill materials in substantially solid form within the spaces. The fill materials may be removed by known plasma etch process via a high etch rate as compared to use of current fill materials, which prevents or mitigates silicon loss.Type: ApplicationFiled: September 10, 2018Publication date: March 21, 2019Inventors: Desaraju Varaprasad, Songyuan Xie, Joseph T. Kennedy
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Publication number: 20180208796Abstract: A composition for planarizing a semiconductor device surface includes poly(methyl silsesquioxane) resin, at least one of a quaternary ammonium salt and an aminopropyltriethoxysilane salt, and at least one solvent. The poly(methyl silsesquioxane) resin ranges from 1 wt. % to 40 wt. % of the composition. The poly(methyl silsesquioxane) resin has a weight average molecular weight between 500 Da and 5,000 Da. The at least one of the quaternary ammonium salt and the aminopropyltriethoxysilane salt ranges from 0.01 wt. % to 0.20 wt. % of the composition. The at least one solvent comprises the balance of the composition.Type: ApplicationFiled: August 30, 2017Publication date: July 26, 2018Inventors: Yamini Pandey, Helen Xiao Xu, Joseph T. Kennedy
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Publication number: 20170355826Abstract: A composition comprising a carbosilane polymer formed from at least one carbosilane monomer and at least one carbonyl contributing monomer. In some embodiments, the composition is suitable as gap filling and planarizing material, and may optionally include at least one chromophore for photolithography applications.Type: ApplicationFiled: November 22, 2015Publication date: December 14, 2017Inventors: Yamini Pandey, Joseph T. Kennedy, Helen X. Xu
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Publication number: 20170260419Abstract: A composition includes a solvent, a catalyst, a polysiloxane including methyl and phenyl pendant groups, and a crosslinker comprising at least one of a phenylene disilyl group and para-disilyl phenylene group. Exemplary crosslinkers include bis silyl benzene, bis alkoxysilane, 1,3 bistriethoxysilyl benzene, and 1,4 bistriethoxysilyl benzene 2,6-bis(triethoxysilyl)-naphthalene, 9,10-bis(triethoxysilyl)-anthracene, and 1,6-bis(trimethoxysilyl)-pyrene.Type: ApplicationFiled: February 28, 2017Publication date: September 14, 2017Inventors: Nancy E. Iwamoto, Joseph T. Kennedy, Desaraju Varaprasad, Sudip Mukhopadhyay, Songyuan Xie
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Patent number: 8889334Abstract: Anti-reflective coating materials for ultraviolet photolithography include at least one absorbing compounds and at least one pH tuning agent that are incorporated into spin-on materials. Suitable absorbing compounds are those that absorb around wavelengths such as 365 nm, 248 nm, 193 nm and 157 nm that may be used in photolithography. Suitable pH tuning agents not only adjust the pH of the final spin-on composition, but also influence the chemical performance and characteristics, mechanical performance and structural makeup of the final spin-on composition that is part of the layered material, electronic component or semiconductor component, such that the final spin-on composition is more compatible with the resist material that is coupled to it. A method of making absorbing and pH tuned spin-on materials includes combining at least one organic absorbing compound and at least one pH tuning agent with at least one silane reactant during synthesis of the spin-on materials and compositions.Type: GrantFiled: December 3, 2012Date of Patent: November 18, 2014Assignee: Honeywell International Inc.Inventors: Joseph T Kennedy, Teresa Baldwin-Hendricks
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Patent number: 8344088Abstract: Anti-reflective coating materials for ultraviolet photolithography include at least one absorbing compounds and at least one pH tuning agent that are incorporated into spin-on materials. Suitable absorbing compounds are those that absorb around wavelengths such as 365 nm, 248 nm, 193 nm and 157 nm that may be used in photolithography. Suitable pH tuning agents not only adjust the pH of the final spin-on composition, but also influence the chemical performance and characteristics, mechanical performance and structural makeup of the final spin-on composition that is part of the layered material, electronic component or semiconductor component, such that the final spin-on composition is more compatible with the resist material that is coupled to it. A method of making absorbing and pH tuned spin-on materials includes combining at least one organic absorbing compound and at least one pH tuning agent with at least one silane reactant during synthesis of the spin-on materials and compositions.Type: GrantFiled: November 15, 2001Date of Patent: January 1, 2013Assignee: Honeywell International Inc.Inventors: Joseph T. Kennedy, Teresa Baldwin-Hendricks
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Patent number: 7653165Abstract: A system and method for encoding and receiving data is provided. The data is encoded as a pulse amplitude modulated signal such that the amplitude signals do not transition from the highest signal level to the lowest signal level and do not transition from the lowest signal level to the highest signal level. The encoding and decoding is performed in some embodiments via a lookup table, and in further embodiments is designed to minimize the step between sequential pulse amplitude modulated symbols.Type: GrantFiled: March 24, 2008Date of Patent: January 26, 2010Assignee: Intel CorporationInventors: Bryan K. Casper, Shekhar Y. Borkar, Stephen R. Mooney, Aaron K. Martin, Joseph T. Kennedy, Matthew B. Haycock, James E. Jaussi
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Publication number: 20090275694Abstract: The present invention provides a siloxane polymer family comprising siloxane polymer made from: (a) a strongly absorbing compound; (b) at least one silane having good leaving groups; and (c) at least one silane having good leaving groups that is different than (b); wherein the siloxane polymer family exhibits a relationship that is concave/convex or is located in the region enclosed by a concave/convex relationship for the ratio of (a) to (b) to (c) and the siloxane polymer's extinction coefficient k value. These siloxane polymers are preferably used as spin-on glass compositions for films in the microelectronics applications.Type: ApplicationFiled: November 16, 2001Publication date: November 5, 2009Applicant: HONEYWELL INTERNATIONAL INC.Inventors: Teresa Baldwin-Hendricks, Joseph T. Kennedy, Mary E. Richey
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Publication number: 20080181331Abstract: A system and method for encoding and receiving data is provided. The data is encoded as a pulse amplitude modulated signal such that the amplitude signals do not transition from the highest signal level to the lowest signal level and do not transition from the lowest signal level to the highest signal level. The encoding and decoding is performed in some embodiments via a lookup table, and in further embodiments is designed to minimize the step between sequential pulse amplitude modulated symbols.Type: ApplicationFiled: March 24, 2008Publication date: July 31, 2008Inventors: Bryan K. Casper, Shekhar Y. Borkar, Stephen R. Mooney, Aaron K. Martin, Joseph T. Kennedy, Matthew B. Haycock, James E. Jaussi
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Patent number: 7391834Abstract: A system and method for encoding and receiving data is provided. The data is encoded as a pulse amplitude modulated signal such that the amplitude signals do not transition from the highest signal level to the lowest signal level and do not transition from the lowest signal level to the highest signal level. The encoding and decoding is performed in some embodiments via a lookup table, and in further embodiments is designed to minimize the step between sequential pulse amplitude modulated symbols.Type: GrantFiled: October 1, 2002Date of Patent: June 24, 2008Assignee: Intel CorporationInventors: Bryan K. Casper, Shekhar Y. Borkar, Stephen R. Mooney, Aaron K. Martin, Joseph T. Kennedy, Matthew B. Haycock, James E. Jaussi
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Patent number: 7177205Abstract: In some embodiments, a chip includes a chip interface to accept a delay control signal from outside the chip. The chip also includes a controllable delay line to delay an input signal responsive to the delay control signal to provide an output signal with a particular phase relationship to the input signal. Other embodiments are described and claimed.Type: GrantFiled: April 27, 2004Date of Patent: February 13, 2007Assignee: Intel CorporationInventors: Joseph T. Kennedy, Stephen R. Mooney
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Patent number: 7177288Abstract: A device includes a bus, a first transmitter connected to the bus and configured to transmit a first signal over the bus in a first frequency band, a second transmitter connected to the bus and configured to transmit a second signal over the bus in a second frequency band at the same time that the first transmitter is transmitting the first signal, a first receiver connected to the bus and configured to receive the first signal transmitted over the bus in the first frequency band, and a second receiver connected to the bus and configured to receive the second signal transmitted over the bus in the second frequency band. The first frequency band and the second frequency band occupy different portions of the frequency spectrum.Type: GrantFiled: November 28, 2001Date of Patent: February 13, 2007Assignee: Intel CorporationInventors: Stephen R. Mooney, Aaron K. Martin, Matthew B. Haycock, Bryan K. Casper, Shekhar Y. Borkar, Joseph T. Kennedy, James E. Jaussi
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Patent number: 7171510Abstract: The invention provides, in an embodiment, an apparatus, method and means for unintrusively observing, echoing and reading signals transmitted by one of a bus and wireless communication, without disturbing electrical properties of the bus, without adding bus latency, and without adding signal discontinuities. In an aspect, a buffer having a trigger is coupled with a component that connects to a memory bus, the buffer echoes signals to an observability port, and a diagnostic device reads the echoed signals. In an aspect, the bus is one of a simultaneous bi-directional (SBD) bus having ternary logic levels, a single ended bus, a differential bus, an optically coupled bus, a chipset bus, a frontside bus, an input/output (I/O) bus, a peripheral component interface (PCI) bus, and an industry standard architecture (ISA) bus. In an aspect, the buffer echoes bus signals having frequencies between 500 MHz. and 5 GHz. In an aspect, the buffer echoes bus signals having frequencies of at least 5 GHz.Type: GrantFiled: December 28, 2000Date of Patent: January 30, 2007Assignee: Intel CorporationInventors: Matthew B. Haycock, Shekhar Y. Borkar, Stephen R. Mooney, Aaron K. Martin, Joseph T. Kennedy
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Patent number: 7120838Abstract: A clock deskew method includes receiving a data signal and a clock signal, processing the data signal to generate a jitter characterization parameter, shifting the clock signal by about 90° from the jitter characterization parameter to generate a sampling clock signal, and sampling the data signal with the sampling clock signal to generate a deskewed data signal. A clock deskew unit includes a clock unit, a sampling unit, and a deskew unit. The deskew unit includes a jitter characterization unit that generates a jitter characterization parameter. The jitter characterization parameter establishes a phase location for aligning a clock signal. Shifting the clock signal by about 90° from the phase location of the jitter characterization parameter provides a location for sampling a data signal to generate a deskewed data signal.Type: GrantFiled: March 26, 2002Date of Patent: October 10, 2006Assignee: Intel CorporationInventors: Bryan K. Casper, Stephen R. Mooney, Aaron K. Martin, Joseph T. Kennedy, Matthew B. Haycock
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Patent number: 7085152Abstract: A memory device having memory cells supplied with a separate higher voltage power than the separate power supplied to memory logic, and a lower power state that entails removing power from at least some of the logic such that refresh operations to preserve the contents of the memory cells continue to take place, but at least some of the interface to the memory device is powered down to reduce power consumption.Type: GrantFiled: December 29, 2003Date of Patent: August 1, 2006Assignee: Intel CorporationInventors: Robert M. Ellis, Stephen R. Mooney, Joseph T. Kennedy
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Patent number: 7031221Abstract: In some embodiments, a chip includes first and second ports to provide first and second received data signals and first and second received strobe signal, respectively. An internal clock signal has a fixed phase relationship to the first received strobe signal and the second received strobe signal has an arbitrary phase relationship with the internal clock signal. First and second write blocks latch the first and second received data signals synchronously with the first and second received strobe signals, respectively. Other embodiments are described and claimed.Type: GrantFiled: December 30, 2003Date of Patent: April 18, 2006Assignee: Intel CorporationInventors: Stephen R. Mooney, Joseph T. Kennedy
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Patent number: 6933781Abstract: An amplifier includes multiple stages. Early stages of the multi-stage amplifier have low gain and preserve bandwidth.Type: GrantFiled: April 30, 2003Date of Patent: August 23, 2005Assignee: Intel CorporationInventors: James E. Jaussi, Joseph T. Kennedy, Stephen R. Mooney