Patents by Inventor Joshua Haeseok Cho

Joshua Haeseok Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12021495
    Abstract: Disclosed herein are signal amplifiers that include a plurality of switchable amplifier architectures so that particular gain modes can use dedicated amplifier architectures to provide desired characteristics for those gain modes, such as low noise figure or high linearity. The disclosed signal amplifier architectures provide tailored impedances using a degeneration block or matrix without using switches in the degeneration switching block. The disclosed signal amplifier architectures provide a plurality of gain modes where different gain modes use different paths through the amplifier architecture. Switches that are used to select the path through the amplifier architecture also provide targeted impedances in a degeneration block or matrix. The switches that select the gain path are provided in the amplifier architecture and are thus not needed or used in the degeneration block, thereby reducing the size of the package for the amplifier architecture.
    Type: Grant
    Filed: December 30, 2021
    Date of Patent: June 25, 2024
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Junhyung Lee, Johannes Jacobus Emile Maria Hageraats, Yan Yan, Bumkyum Kim, Aravind Kumar Padyana, Joshua Haeseok Cho, Rimal Deep Singh, Bipul Agarwal
  • Publication number: 20240048167
    Abstract: Radio frequency front end modules implementing coexisting time division duplexing and frequency division duplexing are provided. In one aspect, a front end system includes a time-division duplexing transmit terminal, a time-division duplexing receive terminal, a frequency division duplexing terminal, and an antenna terminal. The front end system further includes first, second, and third switches configured to selectively connect the terminals to either a node or the antenna. The front end system also includes a controller configured to provide delays between disconnecting the terminals from the antenna and connecting the terminals to the node.
    Type: Application
    Filed: August 21, 2023
    Publication date: February 8, 2024
    Inventors: Joshua Haeseok Cho, Stephane Richard Marie Wloczysiak, Thomas Obkircher, Junhyung Lee, Rimal Deep Singh, Bipul Agarwal
  • Patent number: 11777549
    Abstract: Radio frequency front end modules implementing coexisting time division duplexing and frequency division duplexing are provided. In one aspect, a front end system includes a time-division duplexing transmit terminal, a time-division duplexing receive terminal, a frequency division duplexing terminal, and an antenna terminal. The front end system further includes first, second, and third switches configured to selectively connect the terminals to either a node or the antenna. The front end system also includes a controller configured to provide delays between disconnecting the terminals from the antenna and connecting the terminals to the node.
    Type: Grant
    Filed: February 3, 2022
    Date of Patent: October 3, 2023
    Inventors: Joshua Haeseok Cho, Stephane Richard Marie Wloczysiak, Thomas Obkircher, Junhyung Lee, Rimal Deep Singh, Bipul Agarwal
  • Patent number: 11563460
    Abstract: Described herein are methods for amplifying radio-frequency signals using a variable-gain amplifier with a plurality of input nodes. The methods provide a plurality of gain modes with a low gain mode or bypass mode that follows a bypass path through the variable-gain amplifier and a plurality of higher gain modes that take advantage of tailored impedances for particular gain modes. The tailored impedances can be configured to improve linearity of the amplification process in targeted gain modes. The methods can selectively couple the bypass path to a reference potential node in the plurality of higher gain modes and can selectively decouple the input nodes from a degeneration switching block in the bypass mode.
    Type: Grant
    Filed: October 13, 2020
    Date of Patent: January 24, 2023
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Johannes Jacobus Emile Maria Hageraats, Junhyung Lee, Joshua Haeseok Cho, Aravind Kumar Padyana, Bipul Agarwal
  • Patent number: 11527997
    Abstract: Disclosed herein are signal amplifiers having a plurality of amplifier cores. Individual amplifier cores can be designed to enhance particular advantages while reducing other disadvantages. The signal amplifier can then switch between amplifier cores in a particular gain mode to achieve desired performance characteristics (e.g., improving noise figure or linearity). Examples of signal amplifiers disclosed herein include amplifier architectures with a low noise figure amplifier core that reduces the noise figure and a linearity boost amplifier core that increases linearity. The disclosed signal amplifiers can switch between a first active core and a second active core for a single or particular gain mode to achieve desired signal characteristics during different time periods.
    Type: Grant
    Filed: September 15, 2020
    Date of Patent: December 13, 2022
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Junhyung Lee, Johannes Jacobus Emile Maria Hageraats, Joshua Haeseok Cho, Aravind Kumar Padyana, Bipul Agarwal
  • Publication number: 20220255520
    Abstract: Disclosed herein are signal amplifiers that include a plurality of switchable amplifier architectures so that particular gain modes can use dedicated amplifier architectures to provide desired characteristics for those gain modes, such as low noise figure or high linearity. The disclosed signal amplifier architectures provide tailored impedances using a degeneration block or matrix without using switches in the degeneration switching block. The disclosed signal amplifier architectures provide a plurality of gain modes where different gain modes use different paths through the amplifier architecture. Switches that are used to select the path through the amplifier architecture also provide targeted impedances in a degeneration block or matrix. The switches that select the gain path are provided in the amplifier architecture and are thus not needed or used in the degeneration block, thereby reducing the size of the package for the amplifier architecture.
    Type: Application
    Filed: December 30, 2021
    Publication date: August 11, 2022
    Inventors: Junhyung Lee, Johannes Jacobus Emile Maria Hageraats, Yan Yan, Bumkyum Kim, Aravind Kumar Padyana, Joshua Haeseok Cho, Rimal Deep Singh, Bipul Agarwal
  • Publication number: 20220247441
    Abstract: Radio frequency front end modules implementing coexisting time division duplexing and frequency division duplexing are provided. In one aspect, a front end system includes a time-division duplexing transmit terminal, a time-division duplexing receive terminal, a frequency division duplexing terminal, and an antenna terminal. The front end system further includes first, second, and third switches configured to selectively connect the terminals to either a node or the antenna. The front end system also includes a controller configured to provide delays between disconnecting the terminals from the antenna and connecting the terminals to the node.
    Type: Application
    Filed: February 3, 2022
    Publication date: August 4, 2022
    Inventors: Joshua Haeseok Cho, Stephane Richard Marie Wloczysiak, Thomas Obkircher, Junhyung Lee, Rimal Deep Singh, Bipul Agarwal
  • Publication number: 20220158599
    Abstract: Methods related to amplification of radio-frequency signals. In some embodiments, a method for amplifying a radio-frequency signal can include configuring a gain stage to be in a selected one of a plurality of gain settings, with at least some of the gain settings resulting in different phases for the radio-frequency signal. The method can further include adjusting the phase of the radio-frequency signal for the selected gain setting, such that the adjusted phase is part of desired phases adjusted from the different phases.
    Type: Application
    Filed: November 23, 2021
    Publication date: May 19, 2022
    Inventors: Junhyung LEE, Johannes Jacobus Emile Maria HAGERAATS, Joshua Haeseok CHO
  • Patent number: 11329621
    Abstract: Described herein are variable gain amplifiers and multiplexers that embed programmable attenuators into switchable paths to provide variable gain for individual amplifier inputs. The variable gain for an individual input is provided using an amplification stage that is common for each input of the amplifier. A variable attenuation is provided for individual inputs through a combination of a band selection switch and an attenuation selection branch. Individual inputs can be configured to bypass the variable attenuation in a high gain mode.
    Type: Grant
    Filed: October 6, 2020
    Date of Patent: May 10, 2022
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Junhyung Lee, Rimal Deep Singh, Johannes Jacobus Emile Maria Hageraats, Joshua Haeseok Cho, Bipul Agarwal, Aravind Kumar Padyana
  • Patent number: 11183984
    Abstract: Variable-phase amplifier circuits and devices. In some embodiments, an amplifier can include a variable-gain stage having a plurality of switchable amplification branches, with each being capable of being activated, such that a combination of one or more activated amplification branches provides respective gain level and phase shift. The plurality of switchable amplification branches can be configured such that the phase shift provided by each combination of one or more activated amplification branches compensates for a phase shift associated with the amplifier operating with the respective gain level of the variable-gain stage.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: November 23, 2021
    Assignee: Skyworks Solutions, Inc.
    Inventors: Junhyung Lee, Johannes Jacobus Emile Maria Hageraats, Joshua Haeseok Cho
  • Publication number: 20210143859
    Abstract: Described herein are methods for amplifying radio-frequency signals using a variable-gain amplifier with a plurality of input nodes. The methods provide a plurality of gain modes with a low gain mode or bypass mode that follows a bypass path through the variable-gain amplifier and a plurality of higher gain modes that take advantage of tailored impedances for particular gain modes. The tailored impedances can be configured to improve linearity of the amplification process in targeted gain modes. The methods can selectively couple the bypass path to a reference potential node in the plurality of higher gain modes and can selectively decouple the input nodes from a degeneration switching block in the bypass mode.
    Type: Application
    Filed: October 13, 2020
    Publication date: May 13, 2021
    Inventors: Johannes Jacobus Emile Maria Hageraats, Junhyung Lee, Joshua Haeseok Cho, Aravind Kumar Padyana, Bipul Agarwal
  • Publication number: 20210111685
    Abstract: Described herein are variable gain amplifiers and multiplexers that embed programmable attenuators into switchable paths to provide variable gain for individual amplifier inputs. The variable gain for an individual input is provided using an amplification stage that is common for each input of the amplifier. A variable attenuation is provided for individual inputs through a combination of a band selection switch and an attenuation selection branch. Individual inputs can be configured to bypass the variable attenuation in a high gain mode.
    Type: Application
    Filed: October 6, 2020
    Publication date: April 15, 2021
    Inventors: Junhyung LEE, Rimal Deep Singh, Johannes Jacobus Emile Maria Hageraats, Joshua Haeseok Cho, Bipul Agarwal, Aravind Kumar Padyana
  • Publication number: 20210111675
    Abstract: Disclosed herein are signal amplifiers having a plurality of amplifier cores. Individual amplifier cores can be designed to enhance particular advantages while reducing other disadvantages. The signal amplifier can then switch between amplifier cores in a particular gain mode to achieve desired performance characteristics (e.g., improving noise figure or linearity). Examples of signal amplifiers disclosed herein include amplifier architectures with a low noise figure amplifier core that reduces the noise figure and a linearity boost amplifier core that increases linearity. The disclosed signal amplifiers can switch between a first active core and a second active core for a single or particular gain mode to achieve desired signal characteristics during different time periods.
    Type: Application
    Filed: September 15, 2020
    Publication date: April 15, 2021
    Inventors: Junhyung Lee, Johannes Jacobus Emile Maria Hageraats, Joshua Haeseok Cho, Aravind Kumar Padyana, Bipul Agarwal
  • Patent number: 10804951
    Abstract: Described herein are variable-gain amplifier configurations that include a multi-input gain stage, a cascode buffer, and a bypass block. Degeneration switching blocks can be used for the entire multi-input gain stage or for individual input nodes of the multi-input gain stage. This advantageously reduces or eliminates performance penalties in one or more gain modes. The variable impedances can be configured to improve linearity of the amplification process in targeted gain modes. The variable gain amplifier can be configured to provide a low-loss bypass mode in a low gain mode to improve signal quality.
    Type: Grant
    Filed: January 7, 2020
    Date of Patent: October 13, 2020
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Johannes Jacobus Emile Maria Hageraats, Junhyung Lee, Joshua Haeseok Cho, Aravind Kumar Padyana, Bipul Agarwal
  • Patent number: 10797668
    Abstract: Described herein are variable gain amplifiers and multiplexers that embed programmable attenuators into switchable paths to provide variable gain for individual amplifier inputs. The variable gain for an individual input is provided using a amplification stage that is common for each input of the amplifier. A variable attenuation is provided for individual inputs through a combination of a band selection switch and an attenuation selection branch. The attenuation can be tailored for individual inputs and can depend on a gain mode of the amplifier.
    Type: Grant
    Filed: July 6, 2019
    Date of Patent: October 6, 2020
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Junhyung Lee, Rimal Deep Singh, Johannes Jacobus Emile Maria Hageraats, Joshua Haeseok Cho, Bipul Agarwal, Aravind Kumar Padyana
  • Patent number: 10778150
    Abstract: Disclosed herein are signal amplifiers having a plurality of amplifier cores. Individual amplifier cores can be designed for particular gain modes to enhance particular advantages while reducing other disadvantages. The signal amplifier can then switch between amplifier cores when switching gain modes to achieve desired performance characteristics (e.g., improving noise figure or linearity). Examples of signal amplifiers disclosed herein include amplifier architectures with a high gain amplifier core that reduces the noise figure and a linearity boost amplifier core that increases linearity (e.g., for lower gain modes). The disclosed signal amplifiers have a first active core with amplification chains for each of a plurality of inputs and a second active core with a single amplification chain to amplify signals received at the plurality of inputs.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: September 15, 2020
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Junhyung Lee, Johannes Jacobus Emile Maria Hageraats, Joshua Haeseok Cho, Aravind Kumar Padyana, Bipul Agarwal
  • Publication number: 20200153403
    Abstract: Variable-phase amplifier circuits and devices. In some embodiments, an amplifier can include a variable-gain stage having a plurality of switchable amplification branches, with each being capable of being activated, such that a combination of one or more activated amplification branches provides respective gain level and phase shift. The plurality of switchable amplification branches can be configured such that the phase shift provided by each combination of one or more activated amplification branches compensates for a phase shift associated with the amplifier operating with the respective gain level of the variable-gain stage.
    Type: Application
    Filed: November 11, 2019
    Publication date: May 14, 2020
    Inventors: Junhyung LEE, Johannes Jacobus Emile Maria HAGERAATS, Joshua Haeseok CHO
  • Publication number: 20200145039
    Abstract: Described herein are variable-gain amplifier configurations that include a multi-input gain stage, a cascode buffer, and a bypass block. Degeneration switching blocks can be used for the entire multi-input gain stage or for individual input nodes of the multi-input gain stage. This advantageously reduces or eliminates performance penalties in one or more gain modes. The variable impedances can be configured to improve linearity of the amplification process in targeted gain modes. The variable gain amplifier can be configured to provide a low-loss bypass mode in a low gain mode to improve signal quality.
    Type: Application
    Filed: January 7, 2020
    Publication date: May 7, 2020
    Inventors: Johannes Jacobus Emile Maria Hageraats, Junhyung Lee, Joshua Haeseok Cho, Aravind Kumar Padyana, Bipul Agarwal
  • Publication number: 20200052652
    Abstract: Disclosed herein are signal amplifiers having a plurality of amplifier cores. Individual amplifier cores can be designed for particular gain modes to enhance particular advantages while reducing other disadvantages. The signal amplifier can then switch between amplifier cores when switching gain modes to achieve desired performance characteristics (e.g., improving noise figure or linearity). Examples of signal amplifiers disclosed herein include amplifier architectures with a high gain amplifier core that reduces the noise figure and a linearity boost amplifier core that increases linearity (e.g., for lower gain modes). The disclosed signal amplifiers have a first active core with amplification chains for each of a plurality of inputs and a second active core with a single amplification chain to amplify signals received at the plurality of inputs.
    Type: Application
    Filed: August 20, 2019
    Publication date: February 13, 2020
    Inventors: Junhyung Lee, Johannes Jacobus Emile Maria Hageraats, Joshua Haeseok Cho, Aravind Kumar Padyana, Bipul Agarwal
  • Patent number: 10530412
    Abstract: Described herein are variable gain amplifiers that selectively provide variable or tailored impedances at a degeneration block and/or feedback block depending at least in part on a gain mode of the variable gain amplifier. This advantageously reduces or eliminates performance penalties in one or more gain modes. The variable impedances can be configured to improve linearity of the amplification process in targeted gain modes. The variable gain amplifier can be configured to provide a low-loss bypass mode in a low gain mode to improve signal quality. The degeneration block can be selectively isolated from a reference potential node to improve performance.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: January 7, 2020
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Johannes Jacobus Emile Maria Hageraats, Junhyung Lee, Joshua Haeseok Cho, Aravind Kumar Padyana, Bipul Agarwal