Abstract: Systems, devices, and techniques are disclosed selective synchronization of linked records. A criteria may be received for a primary database that includes records. Records of the primary database may be linked to records of a first instance database. The criteria may include an inclusion of an expression or value in a specified field of a record. Records of the primary database may be determined to meet the criteria by determining that the records of the primary database include the expression or value of the criteria in the specified field. Records of the primary database that meet the criteria may be synchronized with the first instance database. The synchronization of records of the primary database that do not meet the criteria may be prevented.

Abstract: A system to display a route of a user over a period of time is configured to perform operations that include: causing display of a map image that depicts a location; accessing user profile data associated with a user profile, the user profile data comprising a user identifier and location data associated with the user profile; identifying a sequence of locations associated with the user profile based on the user profile data; and causing display of a presentation of a trail indicating the sequence of locations associated with the user profile, the trail terminating at a display of the user identifier.

Abstract: A method for diagnostic and condition monitoring of a system includes receiving data from one or more sensors, the data associated with the system; generating an audio feature based on the data; inputting the audio feature into a neural network model; and receiving one or more attribute predictions and a state prediction from the neural network model. In some embodiments, the monitored system is a vehicle and the one or more sensors are vibroacoustic sensors.

Abstract: Systems, devices, and techniques are disclosed access to data in multiple instances through a single record. A selection of a record may be received through a user interface. The record may be stored in a database. Aspects of the record may be received from the first database. and displayed on the user interface. A first additional aspect associated with the record may be received from a first instance database associated with a first instance of a secondary application and displayed on the user interface. A selection to switch to a second instance of the secondary application may be received through the user interface. A second additional aspect associated with the record may be received from a second instance database associated with the second instance of the secondary application and displayed on the user interface the in place of the first additional aspect associated with the record from the database.

Abstract: Various disclosed embodiments pertain to a distributed audit trail system for use in a connected system including: a master unit to control a first aspect of the connected system and to create a blockchain light client and a distributed hash table (DHT); a first node to control a second aspect of the connected system; a second node to control a third aspect of the connected system; and one or more remote servers to form a blockchain full node, where the master unit, the first node, and the second node electronically communicate with each other through the DHT in order to form a combined audit trail, where the master unit creates a meta-hash of the software version of the software in the master unit, the first node, and the second node, system identification data, system sensor data, and system hardware configuration.

Abstract: According to an embodiment of the present invention, a system provides data stream transform. The system comprises: an input configured to receive a data stream, the data stream comprising a serialized data structure comprising segments and segment identifiers; a parser configured to identify a segment identifier associated with the data stream and further configured to generate a set of operators based on the data stream, wherein each operator is programmed to perform a predetermined action on the data stream; and a display interface configured to present the set of operators as a set of visual icons responsive to a user's input within the display interface and further configured to present a plurality of distinct node types.

Abstract: Systems, devices, and techniques are disclosed access to data in multiple instances through a single record. A selection of a record may be received through a user interface. The record may be stored in a database. Aspects of the record may be received from the first database. and displayed on the user interface. A first additional aspect associated with the record may be received from a first instance database associated with a first instance of a secondary application and displayed on the user interface. A selection to switch to a second instance of the secondary application may be received through the user interface. A second additional aspect associated with the record may be received from a second instance database associated with the second instance of the secondary application and displayed on the user interface the in place of the first additional aspect associated with the record from the database.

Abstract: Systems, devices, and techniques are disclosed selective synchronization of linked records. A criteria may be received for a primary database that includes records. Records of the primary database may be linked to records of a first instance database. The criteria may include an inclusion of an expression or value in a specified field of a record. Records of the primary database may be determined to meet the criteria by determining that the records of the primary database include the expression or value of the criteria in the specified field. Records of the primary database that meet the criteria may be synchronized with the first instance database. The synchronization of records of the primary database that do not meet the criteria may be prevented.

Abstract: According to an embodiment of the present invention, a computer implemented method and system comprises: receiving, via an electronic input, a transaction having a serialized structure; identifying, using a computer processor, a transaction type for the transaction; identifying, using the computer processor, a schema for the transaction type; retrieving, from a memory, a schema correlated transform process wherein the schema correlated transform process transforms the serialized structure to a hierarchical structure; and parsing, using the computer processor, the transaction into a hierarchical format based on the schema.

Abstract: According to an embodiment of the present invention, a system provides a graph that identifies data mapping rules for a data transformation type and comprises: a display interface configured to present a plurality of distinct node types, each with a distinct location and is displayed at corresponding a first display location, a second display location and a third display location on the display surface, a first distinct node type is a pure data type with one or more value output ports; a second distinct node type is a data mapping type with one or more value input ports and at least one output port; and a third distinct node type is a sequence instruction type with one or more stream input ports and at least one output data transform port; a computer processor that generates a rules configuration representing a graph construct; and a memory that stores the rules configuration.

Abstract: An integrated circuit includes enable circuitry coupled to receive transmit data and configured to set a clock enable to a first logic state when a data value of the transmit data changes to a different logic state. The circuit also includes clock control circuitry coupled to receive the clock enable and a data rate clock and configured to provide a filtered data rate clock, wherein the data rate clock is provided as the filtered data rate clock while the clock enable is the first logic state. The circuit also includes a flip flop having a clock input coupled to receive the filtered data rate clock, a data output coupled to provide final transmit data in response to the filtered data rate clock, and an inverting data input coupled to the data output, wherein the final transmit data corresponds to a first delayed version of the transmit data.

Abstract: A band gap reference circuit including a band gap reference generator having an output for providing a reference voltage and a startup circuit for controlling current provided to the band gap reference generator when activated. The startup circuit includes a turnoff circuit having an output to deactivate the startup circuit to not control current to the band gap reference generator based on a voltage of the output of the band gap reference generator. The turnoff circuit includes an inverter having a first transistor of a first conductivity type in series with a second transistor of a second conductivity type opposite the first conductivity type. The startup circuit includes a body bias circuit connected to a body of the first transistor to provide a voltage differential between the body of the first transistor and a source terminal of the first transistor.

Abstract: A computer-implemented location determination method is disclosed. The method includes initiating, on computing device, a native application that provides data storage and data synchronization with a remote server; receiving a call to the native application from an application running within a browser on the device; and providing information indicating a location of the device in response to the call.

Abstract: A computer-implemented location determination method is disclosed. The method includes initiating, on computing device, a native application that provides data storage and data synchronization with a remote server; receiving a call to the native application from an application running within a browser on the device; and providing information indicating a location of the device in response to the call.

Abstract: A band gap reference circuit including a band gap reference generator having an output for providing a reference voltage and a startup circuit for controlling current provided to the band gap reference generator when activated. The startup circuit includes a turnoff circuit having an output to deactivate the startup circuit to not control current to the band gap reference generator based on a voltage of the output of the band gap reference generator. The turnoff circuit includes an inverter having a first transistor of a first conductivity type in series with a second transistor of a second conductivity type opposite the first conductivity type. The startup circuit includes a body bias circuit connected to a body of the first transistor to provide a voltage differential between the body of the first transistor and a source terminal of the first transistor.

Abstract: An amplifying circuit has an offset calibration mode and a normal mode. The amplifying circuit includes an amplifier having a non-inverting input and an inverting input for receiving, during the normal mode, a first input signal and a second input signal and an output for providing a high speed output signal, wherein the first input signal is a reference voltage or a high speed signal and the second input signal is a high speed signal. The amplifying circuit further includes a first transmission gate and a second transmission gate coupled in series between the non-inverting input and an inverting input that are enabled during the offset calibration mode. A benefit of this approach is that capacitance between the inverting and non-inverting inputs is reduced by the first and second transmission gates being in series. There is further benefit in reducing this capacitance by having each transmission gate receive an enable signal from a different source.

Abstract: Components of a memory controller are calibrated in a select sequence to compensate for variances in skew and signal level variations. The offset bias of the receiver of the I/O cell and the termination resistance of the I/O cell are calibrated. The duty cycles of the transmit path and receive path associated with the I/O cell can be calibrated using the calibrated receiver. In one aspect, the driver of the I/O cell can be calibrated prior to calibrating the receiver. Performing the calibration processes of the memory controller in one of the particular sequences described herein improves the timing budgets for the signaling conducted by the memory controller.

Abstract: Components of a memory controller are calibrated in a select sequence to compensate for variances in skew and signal level variations. The offset bias of the receiver of the I/O cell and the termination resistance of the I/O cell are calibrated. The duty cycles of the transmit path and receive path associated with the I/O cell can be calibrated using the calibrated receiver. In one aspect, the driver of the I/O cell can be calibrated prior to calibrating the receiver. Performing the calibration processes of the memory controller in one of the particular sequences described herein improves the timing budgets for the signaling conducted by the memory controller.

Abstract: An amplifying circuit has an offset calibration mode and a normal mode. The amplifying circuit includes an amplifier having a non-inverting input and an inverting input for receiving, during the normal mode, a first input signal and a second input signal and an output for providing a high speed output signal, wherein the first input signal is a reference voltage or a high speed signal and the second input signal is a high speed signal. The amplifying circuit further includes a first transmission gate and a second transmission gate coupled in series between the non-inverting input and an inverting input that are enabled during the offset calibration mode. A benefit of this approach is that capacitance between the inverting and non-inverting inputs is reduced by the first and second transmission gates being in series. There is further benefit in reducing this capacitance by having each transmission gate receive an enable signal from a different source.

Abstract: Disclosed are biocompatible implants that combine a scaffold material for supporting long term repair of a soft tissue with an elongated member such as a suture for aiding in placement of the scaffold during a surgical procedure as well as for immediate mechanical reinforcement of a repair site. The components of an implant are combined such that a longitudinal load placed upon a composite structure can be borne primarily by the elongated member and the scaffold material is isolated from the longitudinal load. Thus, the scaffold material of a composite can be protected from damage due to applied loads and stresses during and following a surgical procedure.