Abstract: In one embodiment, the clock management circuitry includes a first master clock controller configured to provide a first command to a first slave clock controller via a first channel based on a received first clock request. The clock management circuitry also includes the first slave clock controller configured to control outputting a first clock signal based on the first command.

Abstract: In one embodiment, the clock management circuitry includes a first master clock controller configured to provide a first command to a first slave clock controller via a first channel based on a received first clock request. The clock management circuitry also includes the first slave clock controller configured to control outputting a first clock signal based on the first command.

Abstract: Pharmaceutical formulations and methods for the topical or transdermal delivery of 1-isobutyl-1H-imidazo[4,5-c]-quinolin-4-amine or 1-(2-methylpropyl)-1H-imidazo[4,5-c]quinolin-4-amine, imiquimod, to treat actinic keratosis with short durations of therapy, than currently prescribed for the commercially available Aldara® 5% imiquimod cream, as now approved by the U.S. Food & Drug Administration (“FDA”), are disclosed and described. More specifically, lower dosage strength imiquimod formulations to deliver an efficacious dose of imiquimod for treating actinic keratosis with an acceptable safety profile and dosing regimens that are short and more convenient for patient use than the dosing regimen currently approved by the U.S. Food & Drug Administration (“FDA”) for Aldara® 5% imiquimod cream to treat actinic keratosis are also disclosed and described.

Abstract: A method of forming an oxide structure is disclosed. The method includes forming trenches on a top surface of a substrate and performing a surface treatment process on the substrate. The surface treatment includes forming an amorphous layer on the substrate, removing a portion of the amorphous layer to form a liner layer, and forming a dielectric liner on the liner layer. The liner layer formed are substantially uniform in thickness to prevent contamination and pinhole defects on the oxide structure.

Abstract: Provided is a semiconductive resin composition which may be used for both an internal semiconductive layer and an external semiconductive layer of a power cable, and in particular has excellent peelability to be used for the external semiconductive layer. In addition, a novel semiconductive resin composition having improved thermal resistance and mechanical physical properties, and an improved deterioration property is provided. The semiconductive resin composition for a power cable includes: 20 to 70 parts by weight of any one or two or more conductive particles selected from the group consisting of carbon black, graphite and graphene, based on 100 parts by weight of a composite resin including a polypropylene homopolymer having a melting point of 150 to 170° C. and an ethylene-(meth)acrylate-based resin.

Abstract: In one embodiment, the clock management circuitry includes a first master clock controller configured to provide a first command to a first slave clock controller via a first channel based on a received first clock request. The clock management circuitry also includes the first slave clock controller configured to control outputting a first clock signal based on the first command.

Abstract: A semiconductor device includes a first serializer configured to collect at least one event in a first domain to generate a first serial data stream and transmit the first serial data stream periodically at a first period, a first de-serializer configured to receive the first serial data stream to restore the first serial data stream into first parallel data streams, the first parallel data stream encoding first parallel data items, a timer configured to provide a clock signal having a second period, a direct memory access (DMA) configured to capture the first parallel data items periodically at a second period using the clock signal to generate capture data items, and a first memory configured to store the capture data items. The addresses of the first memory at which the respective capture data items are stored are arranged in an order that the respective capture data items are captured.

Abstract: A semiconductor device includes a first clock control circuit for controlling a first clock source; a second clock control circuit for sending a first clock request to the first clock control circuit in response to a block clock request from an intellectual property (IP) block, and controlling a second clock source, which receives a clock signal from the first clock source, to generate a stopped clock signal, which is a clock signal turned off for a predetermined amount of time; and a driver circuit for receiving a block control signal, and outputting the block control signal to the IP block while the short stopped clock signal is output to the IP block.

Abstract: In one embodiment, the clock management circuitry includes a first master clock controller configured to provide a first command to a first slave clock controller via a first channel based on a received first clock request. The clock management circuitry also includes the first slave clock controller configured to control outputting a first clock signal based on the first command.

Abstract: Provided is a semi-conductive composition for a power cable, more particularly, a semi-conductive composition for a power cable having excellent mechanical properties and electrical properties, and more specifically, a semi-conductive composition for a power cable capable of having improved scorch stability, improved surface smoothness, improved space charge accumulation suppression characteristic to thereby be applicable to an ultra-high voltage direct current power cable.

Abstract: A system on chip (SoC) includes a control circuit configured to determine whether a requested operating mode is one of a functional mode and a monitoring mode. The control circuit is configured to provide a request signal to at least one clock circuit to request at least one clock signal and selectively output one of the at least one clock signal in response to at least one acknowledgment signal received from the at least one clock circuit, when the requested operating mode is the functional mode. The control circuit is configured to selectively output one of the at least one clock signal without providing the request signal, when the requested operating mode is the monitoring mode.

Abstract: Pharmaceutical formulations and methods for the topical or transdermal delivery of 1-isobutyl-1H-imidazo[4,5-c]-quinolin-4-amine or 1-(2-methylpropyl)-1H-imidazo[4,5-c]quinolin-4-amine, i.e., imiquimod, to treat actinic keratosis with short durations of therapy, than currently prescribed for the commercially available Aldara® 5% imiquimod cream, as now approved by the U.S. Food & Drug Administration (“FDA”), are disclosed and described. More specifically, lower dosage strength imiquimod formulations to deliver an efficacious dose of imiquimod for treating actinic keratosis with an acceptable safety profile and dosing regimens that are short and more convenient for patient use than the dosing regimen currently approved by the U.S. Food & Drug Administration (“FDA”) for Aldara® 5% imiquimod cream to treat actinic keratosis are also disclosed and described.

Abstract: A semiconductor device includes a first serializer configured to collect at least one event in a first domain to generate a first serial data stream and transmit the first serial data stream periodically at a first period, a first de-serializer configured to receive the first serial data stream to restore the first serial data stream into first parallel data streams, the first parallel data stream encoding first parallel data items, a timer configured to provide a clock signal having a second period, a direct memory access (DMA) configured to capture the first parallel data items periodically at a second period using the clock signal to generate capture data items, and a first memory configured to store the capture data items. The addresses of the first memory at which the respective capture data items are stored are arranged in an order that the respective capture data items are captured.

Abstract: A clock management unit (CMU) includes a first clock control circuit controlling a first clock source, a second clock control circuit sending a first clock request to the first clock control circuit in response to an intellectual property (IP) block clock request from an IP block and controlling a second clock source, and a CMU controller. The second clock source receives a clock signal from the first clock source. A power management unit (PMU) sends a PMU clock request to the CMU controller. The CMU provides the clock signal to the IP block in response to the PMU clock request.

Abstract: Provided is a semiconductive resin composition which may be used for both an internal semiconductive layer and an external semiconductive layer of a power cable, and in particular has excellent peelability to be used for the external semiconductive layer. In addition, a novel semiconductive resin composition having improved thermal resistance and mechanical physical properties, and an improved deterioration property is provided. The semiconductive resin composition for a power cable includes: 20 to 70 parts by weight of any one or two or more conductive particles selected from the group consisting of carbon black, graphite and graphene, based on 100 parts by weight of a composite resin including a polypropylene homopolymer having a melting point of 150 to 170° C. and an ethylene-(meth)acrylate-based resin.

Abstract: A clock management unit (CMU) includes a first clock control circuit controlling a first clock source, a second clock control circuit sending a first clock request to the first clock control circuit in response to an intellectual property (IP) block clock request from an IP block and controlling a second clock source, and a CMU controller. The second clock control circuit receives a clock signal from the first clock source. A power management unit (PMU) sends a PMU clock request to the CMU controller. The CMU provides the clock signal to the IP block in response to the PMU clock request.

Abstract: A system on chip (SoC) includes a control circuit configured to determine whether a requested operating mode is one of a functional mode and a monitoring mode. The control circuit is configured to provide a request signal to at least one clock circuit to request at least one clock signal and selectively output one of the at least one clock signal in response to at least one acknowledgment signal received from the at least one clock circuit, when the requested operating mode is the functional mode. The control circuit is configured to selectively output one of the at least one clock signal without providing the request signal, when the requested operating mode is the monitoring mode.

Abstract: A semiconductor device includes a first clock control circuit for controlling a first clock source; a second clock control circuit for sending a first clock request to the first clock control circuit in response to a block clock request from an intellectual property (IP) block, and controlling a second clock source, which receives a clock signal from the first clock source, to generate a stopped clock signal, which is a clock signal turned off for a predetermined amount of time; and a driver circuit for receiving a block control signal, and outputting the block control signal to the IP block while the short stopped clock signal is output to the IP block.

Abstract: In one embodiment, the clock management circuitry includes a first master clock controller configured to provide a first command to a first slave clock controller via a first channel based on a received first clock request. The clock management circuitry also includes the first slave clock controller configured to control outputting a first clock signal based on the first command.

Abstract: Pharmaceutical formulations and methods for the topical or transdermal delivery of 1-isobutyl-1H-imidazo[4,5-c]-quinolin-4-amine or 1-(2-methylpropyl)-1H-imidazo[4,5-c]quinolin-4-amine, imiquimod, to treat actinic keratosis with short durations of therapy, than currently prescribed for the commercially available Aldara® 5% imiquimod cream, as now approved by the U.S. Food & Drug Administration (“FDA”), are disclosed and described. More specifically, lower dosage strength imiquimod formulations to deliver an efficacious dose of imiquimod for treating actinic keratosis with an acceptable safety profile and dosing regimens that are short and more convenient for patient use than the dosing regimen currently approved by the U.S. Food & Drug Administration (“FDA”) for Aldara® 5% imiquimod cream to treat actinic keratosis are also disclosed and described.