Abstract: The embodiments herein generally deal with semiconductor processing methods and apparatus. More specifically, the embodiments relate to methods and apparatus for etching a semiconductor substrate. A partially fabricated semiconductor substrate is provided in a reaction chamber. The reaction chamber is divided into an upper sub-chamber and a lower sub-chamber by a grid assembly. Plasma is generated in the upper sub-chamber, and the substrate is positioned in the lower sub-chamber. The grid assembly includes at least two grids, each of which is negatively biased, and each of which includes perforations which allow certain species to pass through. The uppermost grid is negatively biased in order to repel electrons. The lowermost grid is biased further negative (compared to the uppermost grid) in order to accelerate positive ions from the upper to the lower sub-chamber. Etching gas is supplied directly to the lower sub-chamber.

Abstract: A method for processing a substrate includes providing the substrate including a photoresist/bottom anti-reflection coating (PR/BARC) layer, a hard mask layer, a stop layer, a carbon layer and a stack including a plurality of layers. The method includes defining a hole pattern including a plurality of holes in the PR/BARC layer using photolithography; transferring the hole pattern into the carbon layer; filling the plurality of holes in the hole pattern with oxide to create oxide pillars; using a planarization technique to remove the hard mask layer, a remaining portion of the PR/BARC layer and the stop layer; stripping the carbon layer to expose the oxide pillars; filling space between the oxide pillars with hard a mask material including metal; planarizing at least part of the hard mask material; and stripping the oxide pillars to expose the hole pattern in the hard mask material.

Abstract: The embodiments herein generally deal with semiconductor processing methods and apparatus. More specifically, the embodiments relate to methods and apparatus for etching a semiconductor substrate. A partially fabricated semiconductor substrate is provided in a reaction chamber. The reaction chamber is divided into an upper sub-chamber and a lower sub-chamber by a grid assembly. Plasma is generated in the upper sub-chamber, and the substrate is positioned in the lower sub-chamber. The grid assembly includes at least two grids, each of which is negatively biased, and each of which includes perforations which allow certain species to pass through. The uppermost grid is negatively biased in order to repel electrons. The lowermost grid is biased further negative (compared to the uppermost grid) in order to accelerate positive ions from the upper to the lower sub-chamber. Etching gas is supplied directly to the lower sub-chamber.

Abstract: A method for etching features in a stack is provided. A combination hardmask is formed by forming a first hardmask layer comprising carbon or silicon oxide over the stack, forming a second hardmask layer comprising metal over the first hardmask layer, and patterning the first and second hardmask layers. The stack is etched through the combination hardmask.

Abstract: Disclosed herein are methods of filling a 3-D structure of a semiconductor substrate with a tungsten-containing material. The 3-D structure may include sidewalls, a plurality of openings in the sidewalls leading to a plurality of features having a plurality of interior regions. The methods may include depositing a first layer of the tungsten-containing material within the 3-D structure such that the first layer partially fills a plurality of interior regions of the 3-D structure, etching vertically and horizontally after depositing the first layer, and depositing a second layer of the tungsten-containing material within the 3-D structure after the vertical and horizontal etching such that the second layer fills at least a portion of the interior regions left unfilled by the first layer. Also disclosed herein are apparatuses for filling a 3-D structure of a semiconductor substrate with a tungsten-containing material having a controller with instructions for etching vertically and horizontally.

Abstract: A method for etching features in a stack is provided. A combination hardmask is formed by forming a first hardmask layer comprising carbon or silicon oxide over the stack, forming a second hardmask layer comprising metal over the first hardmask layer, and patterning the first and second hardmask layers. The stack is etched through the combination hardmask.

Abstract: A method for etching features in a stack is provided. A combination hardmask is formed by forming a first hardmask layer comprising carbon or silicon oxide over the stack, forming a second hardmask layer comprising metal over the first hardmask layer, and patterning the first and second hardmask layers. The stack is etched through the combination hardmask.

Abstract: A solution for processing devices is provided, comprising an activator comprising at least one of pyridine, pyrole, pyrrolidine, pyrimidine, N,N-dimethylformamide, tetraethylamine chloride, 4 pyridinethiol, or other organic compounds with a single N with a lone pair electron activator and an etchant comprising at least one of thionly chloride, Cl2, Br2, I2, SOF2, SOF4, SO2Cl2, SOBr2, S2O6F2, HSO3F, or C2Cl4O2.

Abstract: The embodiments herein generally deal with semiconductor processing methods and apparatus. More specifically, the embodiments relate to methods and apparatus for etching a semiconductor substrate. A partially fabricated semiconductor substrate is provided in a reaction chamber. The reaction chamber is divided into an upper sub-chamber and a lower sub-chamber by a grid assembly. Plasma is generated in the upper sub-chamber, and the substrate is positioned in the lower sub-chamber. The grid assembly includes at least two grids, each of which is negatively biased, and each of which includes perforations which allow certain species to pass through. The uppermost grid is negatively biased in order to repel electrons. The lowermost grid is biased further negative (compared to the uppermost grid) in order to accelerate positive ions from the upper to the lower sub-chamber. Etching gas is supplied directly to the lower sub-chamber.

Abstract: Disclosed herein are methods of filling a 3-D structure of a semiconductor substrate with a tungsten-containing material. The 3-D structure may include sidewalls, a plurality of openings in the sidewalls leading to a plurality of features having a plurality of interior regions. The methods may include depositing a first layer of the tungsten-containing material within the 3-D structure such that the first layer partially fills a plurality of interior regions of the 3-D structure, etching vertically and horizontally after depositing the first layer, and depositing a second layer of the tungsten-containing material within the 3-D structure after the vertical and horizontal etching such that the second layer fills at least a portion of the interior regions left unfilled by the first layer. Also disclosed herein are apparatuses for filling a 3-D structure of a semiconductor substrate with a tungsten-containing material having a controller with instructions for etching vertically and horizontally.

Abstract: A method for forming MRAM (magnetoresistive random access memory) devices is provided. A bottom electrode assembly is formed. A magnetic junction assembly is formed, comprising, depositing a magnetic junction assembly layer over the bottom electrode assembly, forming a patterned mask over the magnetic junction assembly layer, etching the magnetic junction assembly layer to form the magnetic junction assembly with gaps, gap filling the magnetic junction assembly, and planarizing the magnetic junction assembly. A top electrode assembly is formed.

Abstract: A system and method of ion milling performed in a plasma etch system including a plasma etch chamber, multiple process gas sources coupled to the plasma etch chamber, a radio frequency bias source and a controller. The plasma etch chamber including a substrate support. The substrate support being a non-pivoting and non-rotating substrate support. The substrate support capable of supporting a substrate to be processed on a top surface of the substrate support without use of a mechanical clamp device. The plasma etch chamber also including an upper electrode disposed opposite from the top surface of the substrate support. The radio frequency bias source is coupled to the substrate support. The controller is coupled to the plasma etch chamber, the multiple process gas sources and the radio frequency bias source. The controller including logic stored on computer readable media for performing an ion milling process in the plasma etch chamber.

Abstract: A method for reducing contamination in an etch chamber is provided. A substrate with a metal containing layer is placed in the etch chamber. The metal containing layer is etched, producing nonvolatile metal residue deposits on surfaces of the etch chamber, wherein some of the metal residue of the metal residue deposits is in a first state. The substrate is removed from the etch chamber. The chamber is conditioned by converting metal residue in the first state to metal residue in a second state, where metal residue in the second state has stronger adhesion to surfaces of the etch chamber than metal residue in the first state.

Abstract: A plasma processing apparatus includes a baffle ring which separates an internal space of a vacuum chamber into a plasma space and an exhaust space. Plasma is generated in the plasma space by exciting a process gas using an energy source. The process gas is then exhausted out of the plasma space through the plasma baffle ring which surrounds an outer periphery of a substrate support. The plasma baffle ring comprises an inner support ring, an outer support ring, and vertically spaced apart circumferentially overlapping rectangular blades extending between the inner ring and the outer ring. Each blade has a major surface used to block a line of sight from the plasma space to the exhaust space, wherein the major surfaces of the blades are configured to capture nonvolatile by-products, such as plasma etch by-products, before the by-products evacuate the plasma space.

Abstract: A method for etching a metal layer, comprising plurality of cycles is provided. In each cycle, an etch gas comprising PF3, CO and NO, or COF2 is flowed into a process chamber. In each cycle, the etch gas is formed into a plasma. In each cycle, the flow of the etch gas is stopped.

Abstract: A method for etching a metal layer, comprising plurality of cycles is provided. In each cycle, an etch gas comprising PF3, CO and NO, or COF2 is flowed into a process chamber. In each cycle, the etch gas is formed into a plasma. In each cycle, the flow of the etch gas is stopped.

Abstract: A method for etching a metal layer dispose below a mask is provided. The metal layer is placed in an etch chamber. A precursor gas is flowed into the etch chamber. The precursor gas is adsorbed into the metal layer to form a precursor metal complex. The precursor metal complex is heated to a temperature above a vaporization temperature of the precursor metal complex, while the metal layer is exposed to the precursor gas. The vaporized precursor metal complex is exhausted from the etch chamber.

Abstract: A method for reducing contamination in an etch chamber is provided. A substrate with a metal containing layer is placed in the etch chamber. The metal containing layer is etched, producing nonvolatile metal residue deposits on surfaces of the etch chamber, wherein some of the metal residue of the metal residue deposits is in a first state. The substrate is removed from the etch chamber. The chamber is conditioned by converting metal residue in the first state to metal residue in a second state, where metal residue in the second state has stronger adhesion to surfaces of the etch chamber than metal residue in the first state.

Abstract: A method for processing substrate in a processing chamber that has at least one plasma generating source and a gas source for providing a process gas into the chamber is provided. The method includes exciting the plasma generating source with an RF signal having an RF frequency. The method also includes pulsing the RF signal using at least one of amplitude, phase, and frequency of the RF signal having a first value during first portion of an RF pulsing period and a second value during second portion of RF pulsing period, which is associated with first source pulsing frequency. The method further includes pulsing the gas source such that the process gas flows into the chamber at a first rate during a first portion of a gas pulsing period and a second rate during a second portion of the gas pulsing period, which is associated with the gas pulsing frequency.