Patents by Inventor Jr-Sheng Chen

Jr-Sheng Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10964547
    Abstract: A method of fabricating a semiconductor structure including the following steps is provided. A mask layer is formed on a semiconductor substrate. The semiconductor substrate revealed by the mask layer is anisotropically etched until a cavity is formed in the semiconductor substrate, wherein anisotropically etching the semiconductor substrate revealed by the mask layer comprises performing a plurality of first cycles and performing a plurality of second cycles after performing the first cycles, each cycle among the first and second cycles respectively includes performing a passivating step and performing an etching step after performing the passivating step. During the first cycles, a first duration ratio of the etching step to the passivating step is variable and ramps up step by step. During the second cycles, a second duration ratio of the etching step to the passivating step is constant, and the first duration ratio is less than the second duration ratio.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: March 30, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Han Meng, Chih-Hsien Hsu, Jr-Sheng Chen, An-Chi Li, Lin-Ching Huang, Yu-Pei Chiang
  • Patent number: 10957516
    Abstract: A multi-zone gas distribution plate (GDP) for high uniformity in plasma-based etching is provided. A housing defines a process chamber and comprises a gas inlet configured to receive a process gas. A GDP is arranged in the process chamber and is configured to distribute the process gas within the process chamber. The GDP comprises a plurality of holes extending through the GDP, and further comprises a plurality of zones into which the holes are grouped. The zones comprise a first zone and a second zone. Holes of the first zone share a first cross-sectional profile and holes of the second zone share a second cross-sectional profile different than the first cross-sectional profile. A method for designing the multi-zone GDP is also provided.
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: March 23, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Han Meng, Jr-Sheng Chen, Yin-Tun Chou, Chih-Hua Chan, Lin-Ching Huang, Yu-Pei Chiang
  • Patent number: 10654713
    Abstract: Methods for manufacturing MEMS structures are provided. The method for manufacturing a microelectromechanical system (MEMS) structure includes etching a MEMS substrate to form a first trench and a second trench and etching the MEMS substrate through the first trench and the second trench to form a first through hole and an extended second trench. The method for manufacturing a MEMS structure further includes etching the MEMS substrate through the extended second trench to form a second through hole. In addition, a height of the first trench is greater than ¾ of a height of the MEMS substrate, and a height of the second trench is smaller than ? of the height of the MEMS substrate.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: May 19, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chin-Han Meng, Jr-Sheng Chen, Chih-Hsien Hsu, Yu-Pei Chiang, Lin-Ching Huang
  • Publication number: 20200098583
    Abstract: A method of fabricating a semiconductor structure including the following steps is provided. A mask layer is formed on a semiconductor substrate. The semiconductor substrate revealed by the mask layer is anisotropically etched until a cavity is formed in the semiconductor substrate, wherein anisotropically etching the semiconductor substrate revealed by the mask layer comprises performing a plurality of first cycles and performing a plurality of second cycles after performing the first cycles, each cycle among the first and second cycles respectively includes performing a passivating step and performing an etching step after performing the passivating step. During the first cycles, a first duration ratio of the etching step to the passivating step is variable and ramps up step by step. During the second cycles, a second duration ratio of the etching step to the passivating step is constant, and the first duration ratio is less than the second duration ratio.
    Type: Application
    Filed: November 25, 2019
    Publication date: March 26, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Han Meng, Chih-Hsien Hsu, Jr-Sheng Chen, An-Chi Li, Lin-Ching Huang, Yu-Pei Chiang
  • Publication number: 20200075294
    Abstract: Devices and methods for controlling wafer uniformity using a gas baffle plate are disclosed. In one example, a device for plasma-based processes is disclosed. The device includes: a housing defining a process chamber and a baffle plate arranged above a wafer in the process chamber. The baffle plate is configured to control plasma distribution on the wafer. The baffle plate has a shape of an annulus that comprises a first annulus sector and a second annulus sector. The first annulus sector has a first inner radius. The second annulus sector has a second inner radius that is different from the first inner radius.
    Type: Application
    Filed: May 24, 2019
    Publication date: March 5, 2020
    Inventors: Jr-Sheng CHEN, An-Chi Li, Shih-Che Huang, Chih-Hsien Hsu, Zhi-Hao Huang, Alex Wang, Yu-Pei Chiang, Chen-Chun Yan
  • Publication number: 20200043705
    Abstract: Devices and methods for controlling wafer uniformity in plasma-based process is disclosed. In one example, a device for plasma-based processes is disclosed. The device includes: a housing defining a process chamber and a gas distribution plate (GDP) arranged in the process chamber. The housing comprises: a gas inlet configured to receive a process gas, and a gas outlet configured to expel processed gas. The GDP is configured to distribute the process gas within the process chamber. The GDP has a plurality of holes evenly distributed thereon. The GDP comprises a first zone and a second zone. The first zone is closer to the gas outlet than the second zone. At least one hole in the first zone is closed.
    Type: Application
    Filed: July 29, 2019
    Publication date: February 6, 2020
    Inventors: Jr-Sheng CHEN, An-Chi Li, Shih-Che Huang, Chih-Hsien Hsu, Zhi-Hao Huang, Alex Wang, Yu-Pei Chiang, Chen-Chun Yan
  • Patent number: 10529578
    Abstract: A method of fabricating a semiconductor structure including the following steps is provided. A mask layer is formed on a semiconductor substrate. The semiconductor substrate revealed by the mask layer is anisotropically etched until a cavity is formed in the semiconductor substrate, wherein anisotropically etching the semiconductor substrate revealed by the mask layer comprises performing a plurality of first cycles and performing a plurality of second cycles after performing the first cycles, each cycle among the first and second cycles respectively includes performing a passivating step and performing an etching step after performing the passivating step. During the first cycles, a first duration ratio of the etching step to the passivating step is variable and ramps up step by step. During the second cycles, a second duration ratio of the etching step to the passivating step is constant, and the first duration ratio is less than the second duration ratio.
    Type: Grant
    Filed: October 30, 2018
    Date of Patent: January 7, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Han Meng, Chih-Hsien Hsu, Jr-Sheng Chen, An-Chi Li, Lin-Ching Huang, Yu-Pei Chiang
  • Publication number: 20190256350
    Abstract: Methods for manufacturing MEMS structures are provided. The method for manufacturing a microelectromechanical system (MEMS) structure includes etching a MEMS substrate to form a first trench and a second trench and etching the MEMS substrate through the first trench and the second trench to form a first through hole and an extended second trench. The method for manufacturing a MEMS structure further includes etching the MEMS substrate through the extended second trench to form a second through hole. In addition, a height of the first trench is greater than ¾ of a height of the MEMS substrate, and a height of the second trench is smaller than ? of the height of the MEMS substrate.
    Type: Application
    Filed: April 29, 2019
    Publication date: August 22, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Han MENG, Jr-Sheng CHEN, Chih-Hsien HSU, Yu-Pei CHIANG, Lin-Ching HUANG
  • Patent number: 10338726
    Abstract: The present disclosure provides a mobile device and a method of distinguishing between different touch forces. The method includes steps of: preloading an area of a maximum touch region with a maximum force, presetting a relationship among a current force, an area of a current touch region, the maximum force and the area of the maximum touch region, and presetting at least two force levels, wherein each of the at least two force levels corresponds to a respective range of a ratio of the current force to the maximum force; detecting and calculating the area of the current touch region of the touch component when touched; according to the relationship, calculating the ratio of the current force to the maximum force by using the area of the current touch region, so as to determine a corresponding one of the at least two force levels.
    Type: Grant
    Filed: August 3, 2016
    Date of Patent: July 2, 2019
    Assignee: EverDisplay Optronics (Shanghai) Limited
    Inventors: Wei Sheng Su, Jr-Hong Chen, Hsiao-Yi Lin, Feng-Shuen Huang
  • Publication number: 20190148161
    Abstract: A method of fabricating a semiconductor structure including the following steps is provided. A mask layer is formed on a semiconductor substrate. The semiconductor substrate revealed by the mask layer is anisotropically etched until a cavity is formed in the semiconductor substrate, wherein anisotropically etching the semiconductor substrate revealed by the mask layer comprises performing a plurality of first cycles and performing a plurality of second cycles after performing the first cycles, each cycle among the first and second cycles respectively includes performing a passivating step and performing an etching step after performing the passivating step. During the first cycles, a first duration ratio of the etching step to the passivating step is variable and ramps up step by step. During the second cycles, a second duration ratio of the etching step to the passivating step is constant, and the first duration ratio is less than the second duration ratio.
    Type: Application
    Filed: October 30, 2018
    Publication date: May 16, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Han Meng, Chih-Hsien Hsu, Jr-Sheng Chen, An-Chi Li, Lin-Ching Huang, Yu-Pei Chiang
  • Patent number: 10273152
    Abstract: Methods for manufacturing MEMS structures are provided. The method includes forming a first trench and a second trench in a MEMS substrate by performing a main etching process and etching the MEMS substrate through the first trench and the second trench to form a first through hole and an extended second trench by performing a first step of an over-etching process. The method further includes etching the MEMS substrate through the extended second trench to form a second through hole by performing a second step of the over-etching process. In addition, a width of the first trench is greater than a width of the second trench, and a height of the first trench is greater than ¾ of a height of the MEMS substrate, and a height of the second trench is smaller than ? of the MEMS substrate.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: April 30, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chin-Han Meng, Jr-Sheng Chen, Chih-Hsien Hsu, Yu-Pei Chiang, Lin-Ching Huang
  • Publication number: 20190092625
    Abstract: Methods for manufacturing MEMS structures are provided. The method includes forming a first trench and a second trench in a MEMS substrate by performing a main etching process and etching the MEMS substrate through the first trench and the second trench to form a first through hole and an extended second trench by performing a first step of an over-etching process. The method further includes etching the MEMS substrate through the extended second trench to form a second through hole by performing a second step of the over-etching process. In addition, a width of the first trench is greater than a width of the second trench, and a height of the first trench is greater than ¾ of a height of the MEMS substrate, and a height of the second trench is smaller than ? of the MEMS substrate.
    Type: Application
    Filed: January 31, 2018
    Publication date: March 28, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Han MENG, Jr-Sheng CHEN, Chih-Hsien HSU, Yu-Pei CHIANG, Lin-Ching HUANG
  • Patent number: 10131539
    Abstract: A method for forming a micro-electro-mechanical system (MEMS) device structure is provided. The method includes forming a second substrate over a first substrate, and a cavity is formed between the first substrate and the second substrate. The method includes forming a hole through the second substrate using an etching process, and the hole is connected to the cavity. The etching process includes a plurality of etching cycles, and each of the etching cycles includes an etching step, and the etching step has a first stage and a second stage. The etching time of each of the etching steps during the second stage is gradually increased as the number of etching cycles is increased.
    Type: Grant
    Filed: October 5, 2017
    Date of Patent: November 20, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chin-Han Meng, Chih-Hsien Hsu, Chia-Chi Chung, Yu-Pei Chiang, Wen-Chih Chen, Chen-Huang Huang, Zhi-Sheng Xu, Jr-Sheng Chen, Kuo-Chin Liu, Lin-Ching Huang
  • Publication number: 20180286634
    Abstract: A multi-zone gas distribution plate (GDP) for high uniformity in plasma-based etching is provided. A housing defines a process chamber and comprises a gas inlet configured to receive a process gas. A GDP is arranged in the process chamber and is configured to distribute the process gas within the process chamber. The GDP comprises a plurality of holes extending through the GDP, and further comprises a plurality of zones into which the holes are grouped. The zones comprise a first zone and a second zone. Holes of the first zone share a first cross-sectional profile and holes of the second zone share a second cross-sectional profile different than the first cross-sectional profile. A method for designing the multi-zone GDP is also provided.
    Type: Application
    Filed: June 5, 2018
    Publication date: October 4, 2018
    Inventors: Chin-Han Meng, Jr-Sheng Chen, Yin-Tun Chou, Chih-Hua Chan, Lin-Ching Huang, Yu-Pei Chiang
  • Patent number: 9997336
    Abstract: A multi-zone gas distribution plate (GDP) for high uniformity in plasma-based etching is provided. A housing defines a process chamber and comprises a gas inlet configured to receive a process gas. A GDP is arranged in the process chamber and is configured to distribute the process gas within the process chamber. The GDP comprises a plurality of holes extending through the GDP, and further comprises a plurality of zones into which the holes are grouped. The zones comprise a first zone and a second zone. Holes of the first zone share a first cross-sectional profile and holes of the second zone share a second cross-sectional profile different than the first cross-sectional profile. A method for designing the multi-zone GDP is also provided.
    Type: Grant
    Filed: April 26, 2016
    Date of Patent: June 12, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Han Meng, Jr-Sheng Chen, Yin-Tun Chou, Chih-Hua Chan, Lin-Ching Huang, Yu-Pei Chiang
  • Publication number: 20180148324
    Abstract: A method for forming a micro-electro-mechanical system (MEMS) device structure is provided. The method includes forming a second substrate over a first substrate, and a cavity is formed between the first substrate and the second substrate. The method includes forming a hole through the second substrate using an etching process, and the hole is connected to the cavity. The etching process includes a plurality of etching cycles, and each of the etching cycles includes an etching step, and the etching step has a first stage and a second stage. The etching time of each of the etching steps during the second stage is gradually increased as the number of etching cycles is increased.
    Type: Application
    Filed: October 5, 2017
    Publication date: May 31, 2018
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Han MENG, Chih-Hsien HSU, Chia-Chi CHUNG, Yu-Pei CHIANG, Wen-Chih CHEN, Chen-Huang HUANG, Zhi-Sheng XU, Jr-Sheng CHEN, Kuo-Chin LIU, Lin-Ching HUANG
  • Publication number: 20170309500
    Abstract: A multi-zone gas distribution plate (GDP) for high uniformity in plasma-based etching is provided. A housing defines a process chamber and comprises a gas inlet configured to receive a process gas. A GDP is arranged in the process chamber and is configured to distribute the process gas within the process chamber. The GDP comprises a plurality of holes extending through the GDP, and further comprises a plurality of zones into which the holes are grouped. The zones comprise a first zone and a second zone. Holes of the first zone share a first cross-sectional profile and holes of the second zone share a second cross-sectional profile different than the first cross-sectional profile. A method for designing the multi-zone GDP is also provided.
    Type: Application
    Filed: April 26, 2016
    Publication date: October 26, 2017
    Inventors: Chin-Han Meng, Jr-Sheng Chen, Yin-Tun Chou, Chih-Hua Chan, Lin-Ching Huang, Yu-Pei Chiang