Patents by Inventor Ju Chen

Ju Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230007603
    Abstract: A method of operating a wireless device in a wireless communication network. The method includes detecting first synchronization signaling of a first cell on first time and frequency resources. The first synchronization signaling comprises at least a first synchronization signal and a second synchronization signal. The method further includes detecting indication signaling on second time and frequency resources. The second time and frequency resources are derived based on the first time and frequency resources. The method further includes accessing the first cell if the indication signaling is detected on the second time and frequency resources. Accessing the first cell includes decoding a first system information message on a broadcast channel of the first cell. The first system information message indicates time and frequency resources of a first resource set. The disclosure also pertains to related devices and methods.
    Type: Application
    Filed: December 7, 2020
    Publication date: January 5, 2023
    Inventors: Yutao SUI, Yi-Pin Eric WANG, Johan LING, Andreas HÖGLUND, Olaf LIBERG, Yi-Ju CHEN, Mohammad MOZAFFARI
  • Publication number: 20230007524
    Abstract: A method by a reduced capability wireless device includes receiving system information from a network node. The system information comprising information specific to the reduced capability wireless device. The reduced capability wireless device performs an operation using at least the information specific to the reduced capability wireless device received in the system information.
    Type: Application
    Filed: December 4, 2020
    Publication date: January 5, 2023
    Inventors: Yi-Pin Eric Wang, Xingqin Lin, Yutao Sui, Mohammad Mozaffari, Luca Faltrin, Yi-Ju Chen, Andreas Höglund
  • Patent number: 11545611
    Abstract: A very small piezoelectric sensor capable of being mass produced includes a core, a piezoelectric layer on a surface of the core; and a conductive layer on a surface of the piezoelectric layer away from the core. The core is flexible and threadlike, the core is a first electrode of the piezoelectric sensor, and the conductive layer is a second electrode of the piezoelectric sensor. An array of such sensors allows the “skin” of a robot for example to simulate the sensitivity of hair-covered human skin. A method for making the piezoelectric sensor and an electronic device using the piezoelectric sensor are also disclosed.
    Type: Grant
    Filed: July 5, 2019
    Date of Patent: January 3, 2023
    Assignees: Interface Technology (ChengDu) Co., Ltd., INTERFACE OPTOELECTRONICS (SHENZHEN) CO., LTD., GENERAL INTERFACE SOLUTION LIMITED
    Inventors: Ming-Ta Chiang, Min-Yu Kan, Meng-Zhu Ma, Huan Ding, Yu-Ju Chen
  • Patent number: 11545432
    Abstract: An exemplary semiconductor device includes a source feature and a drain feature disposed over a substrate. The semiconductor device further includes a source via electrically coupled to the source feature, and a drain via electrically coupled to the drain feature. The source via has a first size; the drain via has a second size; and the first size is greater than the second size. The semiconductor device may further include a first metal line electrically coupled to the source via and a second metal line electrically coupled to the drain via. The source via has a first dimension matching a dimension of the first metal line, and the drain via has a second dimension matching a dimension of the second metal line. The first metal line may be wider than the second metal line.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: January 3, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Kuo-Chiang Tsai, Yi-Ju Chen, Jyh-Huei Chen
  • Publication number: 20220401831
    Abstract: A gaming system and an operation method of a gaming server thereof are provided. The gaming system includes multiple player devices and the gaming server. The gaming server establishes a network connection with the player devices. In response to one of the player devices initiating a game, the gaming server sends a game notification to the player devices according to a player list. The gaming server determines a common throughput between the player devices based on a response of each of the player devices to the game notification.
    Type: Application
    Filed: May 9, 2022
    Publication date: December 22, 2022
    Applicant: Acer Incorporated
    Inventors: Kuan-Ju Chen, Hung-Ming Chang
  • Publication number: 20220406655
    Abstract: Semiconductor devices and methods of manufacturing semiconductor devices are described herein. A method includes implanting neutral elements into a dielectric layer, an etch stop layer, and a metal feature, the dielectric layer being disposed over the etch stop layer and the metal feature being disposed through the dielectric layer and the etch stop layer. The method further includes using a germanium gas as a source for the neutral elements and using a beam current above 6.75 mA to implant the neutral elements.
    Type: Application
    Filed: February 18, 2022
    Publication date: December 22, 2022
    Inventors: Kuo-Ju Chen, Shih-Hsiang Chiu, Meng-Han Chou, Su-Hao Liu, Liang-Yin Chen, Huicheng Chang, Yee-Chia Yeo
  • Patent number: 11530479
    Abstract: In an embodiment, a method of forming a semiconductor device includes forming a hydrophobic coating on an inner surface of an exhaust line, connecting the exhaust line to a semiconductor processing chamber, introducing a first precursor into the semiconductor processing chamber, introducing a second precursor into the semiconductor processing chamber, wherein the first precursor reacts with the second precursor to form a layer of oxide material, and pumping the first precursor and the second precursor from the semiconductor processing chamber and through the exhaust line.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: December 20, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chung-Ting Ko, Wen-Ju Chen, Wan-Chen Hsieh, Ming-Fa Wu, Tai-Chun Huang, Yung-Cheng Lu, Chi On Chui
  • Publication number: 20220392811
    Abstract: The present disclosure provides a method and a system therefore for processing wafer. The method includes: monitoring a distribution of particles in a chamber while processing the wafer; determining at least one parameter according to the distribution of the particles for configuring at least one device of the chamber; configuring the at least one device of the chamber according to the at least one parameter; and processing another wafer based on a recipe after configuring the at least one device of the chamber.
    Type: Application
    Filed: June 7, 2021
    Publication date: December 8, 2022
    Inventors: PO-JU CHEN, SHENG-JEN CHENG, CHA-HSIN CHAO, CHIH-TENG LIAO
  • Publication number: 20220391252
    Abstract: A computing resource sharing system and a computing resource sharing method are provided. The method includes: in response to receiving a resource request signal from a resource request device, obtaining a foreground process, a background process, a name of a software service, and an operating status of the software service of a resource sharing device; determining a specific graphic computing resource to be shared according to the foreground process, the background process, the name of the software service, and the operating status of the software service; applying the specific graphic computing resource to assist the resource request device in performing a graphic computing operation; transmitting a graphic computing result of the graphic computing operation back to the resource request device.
    Type: Application
    Filed: August 16, 2021
    Publication date: December 8, 2022
    Applicant: Acer Incorporated
    Inventors: Kuan-Ju Chen, Chia-Jen Tao
  • Publication number: 20220394877
    Abstract: An electronic device configured to be connected to external heat dissipation device and including chassis, heat source and heat dissipation assembly. The heat source is disposed in the chassis. The heat dissipation assembly includes evaporator, condenser and fin assembly. The evaporator is in thermal contact with the heat source. The condenser has outer surface, condensation space and liquid-cooling space. The outer surface faces away from the condensation space and the liquid-cooling space. The condensation space and the liquid-cooling space are not in fluid communication with each other. The condensation space is in fluid communication with the evaporator. The liquid-cooling space is configured to be in fluid communication with the external heat dissipation device. The fin assembly is in thermal contact with the condenser and protrudes from the outer surface of the condenser along direction away from the condensation space or the liquid-cooling space.
    Type: Application
    Filed: June 16, 2021
    Publication date: December 8, 2022
    Inventors: Kai-Yang TUNG, Hung-Ju Chen
  • Publication number: 20220381520
    Abstract: A heat dissipating device includes a thermosyphon, a first liquid cooling tube and a first heat dissipating fin set. The thermosyphon has an evaporation portion and a condensation portion. The first liquid cooling tube is sleeved on the condensation portion. The first heat dissipating fin set is sleeved on the first liquid cooling tube.
    Type: Application
    Filed: June 16, 2021
    Publication date: December 1, 2022
    Applicants: Inventec (Pudong) Technology Corp., Inventec Corporation
    Inventors: Kai-Yang Tung, Hung-Ju Chen
  • Publication number: 20220386512
    Abstract: An electronic device connected to external heat dissipation device and including chassis, heat source, and heat dissipation assembly. Heat dissipation assembly includes evaporator, tubing, and liquid-cooling plate. Evaporator is in thermal contact with heat source. Tubing includes evaporation portion and condensation portion. Evaporation portion is in fluid communication with condensation portion and in thermal contact with evaporator. Liquid-cooling plate is disposed on chassis and spaced apart from heat source. Liquid-cooling plate includes liquid-cooling accommodation space and is configured to be in fluid communication with external heat dissipation device. Condensation portion is located in liquid-cooling accommodation space. Condensation portion includes first tube part, second tube part and connecting tube parts. Two opposite ends of each connecting tube part are respectively in fluid communication with first and second tube parts. Connecting tube parts are connected in parallel.
    Type: Application
    Filed: June 16, 2021
    Publication date: December 1, 2022
    Inventors: Kai-Yang TUNG, Hung-Ju Chen
  • Publication number: 20220384261
    Abstract: A method of forming a semiconductor device includes: forming first electrical components in a substrate in a first device region of the semiconductor device; forming a first interconnect structure over and electrically coupled to the first electrical components; forming a first passivation layer over the first interconnect structure, the first passivation layer extending from the first device region to a scribe line region adjacent to the first device region; after forming the first passivation layer, removing the first passivation layer from the scribe line region while keeping a remaining portion of the first passivation layer in the first device region; and dicing along the scribe line region after removing the first passivation layer.
    Type: Application
    Filed: August 9, 2022
    Publication date: December 1, 2022
    Inventors: Hsien-Wei Chen, Ying-Ju Chen, Ming-Fa Chen
  • Publication number: 20220386502
    Abstract: A gas storage device includes a casing, a lift platform, a lift mechanism, a driving mechanism, an exhaust valve and a gas joint. The lift platform is movably disposed in the casing, wherein a gas storage space is between a bottom of the casing and the lift platform. The lift mechanism is disposed in the casing and connected to the lift platform. The driving mechanism is connected to the lift mechanism. The driving mechanism drives the lift mechanism to drive the lift platform to move. The exhaust valve is connected to the lift platform and communicates with the gas storage space. The gas joint is connected to the bottom of the casing and communicates with the gas storage space.
    Type: Application
    Filed: June 8, 2021
    Publication date: December 1, 2022
    Inventors: Kai-Yang Tung, Hung-Ju Chen
  • Patent number: 11516599
    Abstract: Disclosed is a personal hearing device, an external acoustic processing device and an associated computer program product. The personal hearing device includes: a microphone, for receiving an input acoustic signal, wherein the input acoustic signal is a mixture of sounds coming from a first acoustic source and from other acoustic source(s); a speaker; and an acoustic processing circuit, for automatically distinguishing within the input acoustic signal the sound of the first acoustic source from the sound of other acoustic source(s); wherein the acoustic processing circuit further processes the input acoustic signal by having different modifications to the sound of the first acoustic source and to the sound of other acoustic source(s), whereby the acoustic processing circuit produces an output acoustic signal to be played on the speaker.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: November 29, 2022
    Assignee: RELAJET TECH (TAIWAN) CO., LTD.
    Inventors: Yun-Shu Hsu, Po-Ju Chen
  • Patent number: 11515206
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a gate structure over a fin structure. The semiconductor structure also includes a source/drain structure in the fin structure and adjacent to the gate structure. The semiconductor structure also includes a first contact plug over the source/drain structure. The semiconductor structure also includes a first via plug over the first contact plug. The semiconductor structure also includes a dielectric layer surrounding the first via plug. The first via plug includes a first group IV element and the dielectric layer includes the first group IV element and a second group IV element.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: November 29, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tung-Po Hsieh, Su-Hao Liu, Hong-Chih Liu, Jing-Huei Huang, Jie-Huang Huang, Lun-Kuang Tan, Huicheng Chang, Liang-Yin Chen, Kuo-Ju Chen
  • Publication number: 20220377913
    Abstract: A method for manufacturing a circuit board, includes: stacking a first peelable film on a second peelable film, and disposing fluffy carbon nanotubes between the first peelable film and the second peelable film, thereby obtaining a carbon nanotube layer; pressing the first peelable film, the carbon nanotube layer, and the second peelable film to compact the fluffy carbon nanotubes, thereby obtaining a thermal conductive layer; removing the first peelable film, and disposing a first adhesive layer, a first dielectric layer, and a first circuit layer on a side of the thermal conductive layer away from the second peelable film; removing the second peelable film, and disposing a second adhesive layer, a second dielectric layer, and a second circuit layer on a side of the thermal conductive layer away from the first adhesive layer; mounting an electronic component on the first circuit layer.
    Type: Application
    Filed: June 22, 2021
    Publication date: November 24, 2022
    Inventors: YIN-JU CHEN, JING-CYUAN YANG, YEN-CHANG CHU
  • Publication number: 20220367632
    Abstract: The present disclosure relates generally to doping for conductive features in a semiconductor device. In an example, a structure includes an active region of a transistor. The active region includes a source/drain region, and the source/drain region is defined at least in part by a first dopant having a first dopant concentration. The source/drain region further includes a second dopant with a concentration profile having a consistent concentration from a surface of the source/drain region into a depth of the source/drain region. The consistent concentration is greater than the first dopant concentration. The structure further includes a conductive feature contacting the source/drain region at the surface of the source/drain region.
    Type: Application
    Filed: July 25, 2022
    Publication date: November 17, 2022
    Inventors: Su-Hao Liu, Huicheng Chang, Chia-Cheng Chen, Liang-Yin Chen, Kuo-Ju Chen, Chun-Hung Wu, Chang-Miao Liu, Huai-Tei Yang, Lun-Kuang Tan, Wei-Ming You
  • Publication number: 20220365805
    Abstract: A device pass-through method for a virtual machine (VM) and a server using the same method are provided. The method includes the following. A host operating system (OS) kernel including a device driver and a socket node corresponding to a hardware device and a VM including a guest OS and a guest kernel are established, and the guest OS includes an application and an analyzer. The guest kernel receives an I/O request command from the application and transmits an I/O request packet corresponding to the I/O request command to the analyzer. According to a virtual function (VF) name in the I/O request packet, the analyzer transmits an access packet corresponding to the I/O request command to the socket node corresponding to the VF name. The socket node accesses the device driver according to the access packet to drive the hardware device.
    Type: Application
    Filed: April 19, 2022
    Publication date: November 17, 2022
    Applicant: Acer Incorporated
    Inventor: Kuan-Ju Chen
  • Patent number: 11502000
    Abstract: A method includes forming a metallic feature, forming an etch stop layer over the metallic feature, implanting the metallic feature with a dopant, forming a dielectric layer over the etch stop layer, performing a first etching process to etch the dielectric layer and the etch stop layer to form a first opening, performing a second etching process to etch the metallic feature and to form a second opening in the metallic feature, wherein the second opening is joined with the first opening, and filling the first opening and the second opening with a metallic material to form a contact plug.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: November 15, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Meng-Han Chou, Su-Hao Liu, Kuo-Ju Chen, Liang-Yin Chen, Huicheng Chang, Yee-Chia Yeo