Abstract: An inspection method for electronic devices includes the steps of: providing an object under test; inspecting the object under test through an inspection system having an optical apparatus, including the steps of: using the optical apparatus to provide a first inspection light to inspect a first position of the object under test, and then receiving a first reflection light for being recorded in a controller; moving the optical apparatus; and using the optical apparatus to provide a second inspection light to inspect the first position of the object under test, and then receiving a second reflection light for being recorded in the controller; and determining whether there is an abnormality through the first reflection light and the second reflection light.

Abstract: An electronic device includes a substrate, a circuit layer, at least one electronic unit, a stress adjustment layer, and a buffer layer. The substrate has a first surface and a second surface opposite to each other and at least one side connected to the first surface and the second surface. The circuit layer is disposed on the first surface of the substrate. The at least one electronic unit is electronically connected to the circuit layer. The stress adjustment layer is disposed on the second surface of the substrate. The buffer layer surrounds the substrate, wherein the stress adjustment layer is located between the substrate and the buffer layer, and the buffer layer is in contact with the at least one side of the substrate.

Abstract: A circuit structure, an electronic device, and a manufacturing method of the electronic device are provided. The circuit structure includes a support layer, a base layer, and a circuit layer. The base layer is disposed on the support layer. The circuit layer is disposed on the base layer and includes a first conductive layer, a first insulating layer, and a second conductive layer. The first conductive layer is disposed on the base layer. The first insulating layer is disposed on the first conductive layer. The second conductive layer is disposed on the first insulating layer. The elongation of the support layer is smaller than the elongation of the base layer.

Abstract: An electronic device is provided. The electronic device includes a chip, a redistribution structure, a contact pad, a buffer layer, and a first connection pad. The redistribution structure is electrically connected to the chip. The redistribution structure includes a metal pad, and the metal pad is disposed opposite to the chip. The contact pad is disposed on the metal pad. The buffer layer is disposed on the redistribution structure and includes an opening. The opening exposes at least a portion of the contact pad. The first connection pad is disposed on the contact pad and extends in the opening. Moreover, in a normal direction of the chip, the metal pad, the contact pad and the first connection pad overlap. A method of manufacturing an electronic device is also provided.

Abstract: The present disclosure provides an electronic device and a manufacturing method. The electronic device includes a base layer, a first redistribution structure, a first electronic unit, a second electronic unit, a protecting layer, and a connecting component. The base layer includes at least one via structure. The first redistribution structure is disposed on the base layer, and the first electronic unit and the second electronic unit are disposed on the first redistribution structure. The protecting layer surrounds the first electronic unit and the second electronic unit, and the first electronic unit and the second electronic unit are electrically connected to the connecting component through the first redistribution structure and the at least one via structure.

Abstract: A manufacturing method of an electronic device and an electronic device are disclosed. The method includes: forming an intermediate layer on a first carrier, patterning the intermediate layer to form alignment marks; forming a release layer on the first carrier; disposing chips on the release layer, each chip including a bonding pad and a surface; forming an insulating layer surrounding the chips on the release layer to form a package structure; transferring the package structure to a second carrier, enabling the surface of each chip to face away from the second carrier and to be exposed by an upper surface of the insulating layer, a step difference formed between the surface of each chip and at least a portion of the upper surface of the insulating layer in a normal direction; and forming a redistribution layer electrically connected to each chip through the bonding pads on the package structure.

Abstract: The electronic device of the present disclosure includes a redistribution structure, chip units, and a protective layer. The redistribution structure includes alignment marks. The chip units are electrically connected to the redistribution structure, and include a first chip unit and a second chip unit. The protective layer surrounds the first chip unit and the second chip unit. The chip units and the alignment marks are arranged along a direction. The first chip unit is disposed between the first alignment mark and the third alignment mark, and the second chip unit is disposed between the second alignment mark and the fourth alignment mark. The second alignment mark and the third alignment mark are disposed between the first chip unit and the second chip unit. The number of the alignment marks is greater than the number of the chip units.

Abstract: Disclosed are a conductive film and a test component. A conductive film includes a supporting layer, a circuit layer and a protective layer. The supporting layer has a first surface and a second surface opposite to the first surface. The supporting layer supports the circuit layer. The circuit layer includes a first protruding part, a second protruding part and a connecting part. The first protruding part is disposed on the first surface. The second protruding part is disposed on the second surface. The connecting part is disposed between the first protruding part and the second protruding part. The first protruding part is connected to the second protruding part through the connecting part. The protective layer covers the first protruding part. The conductive film and the test component of the disclosed embodiments may have a buffering effect or increase the service life.

Abstract: An electronic device and a related tiled electronic device are disclosed. The electronic device includes a protective layer, a circuit structure, a sensing element and a control unit. The circuit structure is disposed on the protective layer and surrounds the sensing element. The control unit is disposed between the circuit structure and the protective layer and electrically connected to the sensing element. The protective layer surrounds the control unit and contacts a surface of the circuit structure.

Abstract: An electronic device includes a chip and a circuit structure layer overlapped with the chip. The circuit structure layer includes a redistribution structure layer and an element structure layer, and the redistribution structure layer and the element structure layer are electrically connected to the chip. At least one of the redistribution structure layer and the element structure layer includes at least one opening, and in a normal direction of the electronic device, the at least one opening is overlapped with aside of the chip.

Abstract: The present disclosure discloses a manufacturing method of an electronic device. A seed layer is formed on a substrate. After patterning the seed layer to form a plurality of sub-seed layers and a plurality of conductive lines, a metal layer is formed on a plurality of the sub-seed layers. The sub-seed layers include a first sub-seed layer and a second sub-seed layer, and the first sub-seed layer and the second sub-seed layer are separated from each other.