Patents by Inventor Ju-Yong Lee

Ju-Yong Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080266927
    Abstract: A semiconductor integrated circuit device having a 6F2 layout is provided. The semiconductor integrated circuit device includes a substrate; a plurality of unit active regions disposed in the substrate and extending in a first direction; first and second access transistors including first and second gate lines disposed on the substrate and extending across the unit active regions in a second direction forming an acute angle with the first direction; a first junction area disposed in the substrate between the first and second gate lines and second junction areas disposed on sides of the first and second gate lines where the first junction area is not disposed; a plurality of bitlines disposed on the substrate and extending in a third direction forming an acute angle with the first direction; and a plurality of bitline contacts directly connecting the first junction area and the bitlines.
    Type: Application
    Filed: March 25, 2008
    Publication date: October 30, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ju-Yong LEE, Sung-Ho JANG, Tae-Young CHUNG, Joon HAN
  • Publication number: 20080248807
    Abstract: A method for controlling a call, by a base station, in a communication system is provided. The method includes receiving a call admission request for call connection from a mobile station; determining whether to admit the call admission request taking into account a backhaul section capacity available in a backhaul section and a wireless section capacity available in a wireless section; and transmitting information indicating the determination result to the mobile station. The wireless section indicates a section between the base station and the mobile station, and the backhaul section indicates a section between the base station and a base station controller.
    Type: Application
    Filed: April 4, 2008
    Publication date: October 9, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ki-Back Kim, Ju-Yong Lee, Dong-Soo Park
  • Publication number: 20080198797
    Abstract: Disclosed is an apparatus and method for an MBS service in a BWA system. An apparatus of a base station includes a time controller, a CAC processor, and a buffer controller. The time controller manages a broadcast start time and a broadcast end time and generates a broadcast start message at a predetermined time before the actual broadcast start time. Upon receipt of the generated broadcast start message from the time controller, the CAC processor calculates a capacity decrease due to broadcast service and subtracts the capacity decrease from the current available capacity to update the available capacity. Upon receipt of the generated broadcast start message from the time controller, the buffer controller controls the buffer occupation of unicast traffic in order to provide the buffer space required for a broadcast service.
    Type: Application
    Filed: February 21, 2008
    Publication date: August 21, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Eun-Chan Park, Ki-Back Kim, Ju-Yong Lee
  • Publication number: 20070111437
    Abstract: A semiconductor device including storage nodes and a method of manufacturing the same: The method includes forming an insulating layer and an etch stop layer on a semiconductor substrate; forming storage node contact bodies to be electrically connected to the semiconductor substrate by penetrating the insulating layer and the etch stop layer; forming landing pads on the etch stop layer to be electrically connected to the storage node contact bodies, respectively; and forming storage nodes on the landing pads, respectively, the storage nodes of which outward sidewalls are completely exposed and which are arranged at an angle to each other.
    Type: Application
    Filed: January 9, 2007
    Publication date: May 17, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chang-Hyun CHO, Tae-Young CHUNG, Cheol-Ju YUN, Jae-Goo LEE, Ju-Yong LEE
  • Patent number: 7180118
    Abstract: A semiconductor device including storage nodes and a method of manufacturing the same: The method includes forming an insulating layer and an etch stop layer on a semiconductor substrate; forming storage node contact bodies to be electrically connected to the semiconductor substrate by penetrating the insulating layer and the etch stop layer; forming landing pads on the etch stop layer to be electrically connected to the storage node contact bodies, respectively; and forming storage nodes on the landing pads, respectively, the storage nodes of which outward sidewalls are completely exposed and which are arranged at an angle to each other.
    Type: Grant
    Filed: April 22, 2004
    Date of Patent: February 20, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Hyun Cho, Tae-Young Chung, Cheol-Ju Yun, Jae-Goo Lee, Ju-Yong Lee
  • Publication number: 20070004129
    Abstract: In one embodiment, a semiconductor device includes a plurality of fin-shaped active regions defined by a trench formed in a substrate with a predetermined depth; an isolation layer formed inside the trench and comprising a first insulating material; and a plurality of word lines formed on the isolation layer inside the trench and covering a sidewall of the active region inside the trench. A separation layer is formed between two neighboring word lines to separate the two neighboring word lines of the plurality of word lines inside the trench with a predetermined distance. The separation layer comprises a second insulating material having an etch selectivity with respect to the first insulating material.
    Type: Application
    Filed: June 29, 2006
    Publication date: January 4, 2007
    Inventors: Ju-Yong LEE, Tae-Young CHUNG, Kyu-Hyun LEE, Yong-Sung KIM
  • Patent number: 7153727
    Abstract: Disclosed herein are a semiconductor device and a method of manufacturing the same that increases the reliability of these devices as size design limitations decrease. Generally, a first insulating film, and wiring, including conductive film patterns and second insulating film patterns are formed on a substrate. Third insulating film patterns including a silicon-oxide-based material are formed on sidewalls of the wiring, and contact patterns and spacers on the sidewalls thereof for defining contact hole regions are formed on the wiring. The contact holes contact surfaces of the third insulating film patterns and pass through the first insulating film. Thus, the thickness of a second insulating film pattern used in the wiring can be minimized, thereby increasing a gap-fill margin between the wiring. A parasitic capacitance between the wiring can be reduced because silicon oxide spacers with a low dielectric constant are formed on sidewalls of the wiring.
    Type: Grant
    Filed: November 20, 2003
    Date of Patent: December 26, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ju-Yong Lee, Kyu-Hyun Lee
  • Publication number: 20060261392
    Abstract: Disclosed herein are a semiconductor device and a method of manufacturing the same that increases the reliability of these devices as size design limitations decrease. Generally, a first insulating film, and wiring, including conductive film patterns and second insulating film patterns are formed on a substrate. Third insulating film patterns including a silicon-oxide-based material are formed on sidewalls of the wiring, and contact patterns and spacers on the sidewalls thereof for defining contact hole regions are formed on the wiring. The contact holes contact surfaces of the third insulating film patterns and pass through the first insulating film. Thus, the thickness of a second insulating film pattern used in the wiring can be minimized, thereby increasing a gap-fill margin between the wiring. A parasitic capacitance between the wiring can be reduced because silicon oxide spacers with a low dielectric constant are formed on sidewalls of the wiring.
    Type: Application
    Filed: July 18, 2006
    Publication date: November 23, 2006
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ju-Yong LEE, Kyu-Hyun LEE
  • Publication number: 20040217407
    Abstract: A semiconductor device including storage nodes and a method of manufacturing the same: The method includes forming an insulating layer and an etch stop layer on a semiconductor substrate; forming storage node contact bodies to be electrically connected to the semiconductor substrate by penetrating the insulating layer and the etch stop layer; forming landing pads on the etch stop layer to be electrically connected to the storage node contact bodies, respectively; and forming storage nodes on the landing pads, respectively, the storage nodes of which outward sidewalls are completely exposed and which are arranged at an angle to each other.
    Type: Application
    Filed: April 22, 2004
    Publication date: November 4, 2004
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Chang-Hyun Cho, Tae-Young Chung, Cheol-Ju Yun, Jae-Goo Lee, Ju-Yong Lee
  • Publication number: 20040140486
    Abstract: Disclosed herein are a semiconductor device and a method of manufacturing the same that increases the reliability of these devices as size design limitations decrease. Generally, a first insulating film, and wiring, including conductive film patterns and second insulating film patterns are formed on a substrate. Third insulating film patterns including a silicon-oxide-based material are formed on sidewalls of the wiring, and contact patterns and spacers on the sidewalls thereof for defining contact hole regions are formed on the wiring. The contact holes contact surfaces of the third insulating film patterns and pass through the first insulating film. Thus, the thickness of a second insulating film pattern used in the wiring can be minimized, thereby increasing a gap-fill margin between the wiring. A parasitic capacitance between the wiring can be reduced because silicon oxide spacers with a low dielectric constant are formed on sidewalls of the wiring.
    Type: Application
    Filed: November 20, 2003
    Publication date: July 22, 2004
    Inventors: Ju-Yong Lee, Kyu-Hyun Lee
  • Patent number: 6388993
    Abstract: An ATM switch having the buffer threshold controller to control the cell input into the switching element using the back-pressure signal and a method for determining the buffer threshold according to the buffer threshold controller are disclosed. The ATM switch includes buffer pool storing the cell input to the switch; buffer pool control part storing the buffer pool occupancy information per input port of the buffer pool; threshold control part receiving the buffer pool occupancy information from the buffer pool control part and calculating the threshold per input port periodically and then sending it to the buffer pool control part; input crosspoint control part controlling the cells input to the buffer pool by receiving the control signal from the buffer pool control part; and output crosspoint control part controlling the cells output from the buffer pool by receiving the control signal from the buffer pool control part.
    Type: Grant
    Filed: June 11, 1998
    Date of Patent: May 14, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Jin Shin, Kyung-Geun Lee, Dan-Keun Sung, Jeong-Won Heo, Sung-Hyuk Byun, Ju-Yong Lee, Jin-Woo Yang
  • Patent number: 6259698
    Abstract: A controller for the logical buffer depth in ATM switching system and a method for determining the logical queue depth, using the back-pressure signal and the occupied buffer depth information and supporting the P classes, are disclosed. The controller includes Routing Table Element making tag for routing of input cell; Input Buffer storing the cell that a tag is attached to in said routing table element; Switch fabric that reads the cell from said input buffer and then switches it to the output port; and Input buffer controller controlling the logical queue size in said input buffer.
    Type: Grant
    Filed: June 11, 1998
    Date of Patent: July 10, 2001
    Assignee: SamSung Electronics Co., Ltd.
    Inventors: Jae-Jin Shin, Kyung-Geun Lee, Dan-Keun Sung, Jeong-Won Heo, Sung-Hyuk Byun, Ju-Yong Lee, Jin-Woo Yang
  • Patent number: 6023469
    Abstract: An idle address controller for a shared buffer type ATM switch controls the addresses of output cells in a common memory to be stored directly in an idle address buffer without passing through the conventional idle address delay controller, by improving the idle address control scheme of a unit switch. The idle address controller includes an idle address control signal generator for generating idle address control signals based on the buffer length information from counters, idle address control signal buffers for storing the idle address control signals, and an idle address control signal multiplexer. Therefore, the idle addresses can be efficiently provided, and this mechanism lowers cell loss and reduces required memory capacity.
    Type: Grant
    Filed: June 13, 1997
    Date of Patent: February 8, 2000
    Assignees: Electronics and Telecommunications Research Institute, Korea Telecom
    Inventors: Dan-Keun Sung, Kyeong-Ho Lee, Soo-Jong Lee, Tae-Won Kim, Jeong-Won Heo, Sung-Hyuk Byun, Ju-Yong Lee
  • Patent number: 5924765
    Abstract: A shock absorber for side sills of a chassis is disclosed. The shock absorber is installed in each side sill of a chassis and effectively absorbs a side impact at the side sill in the event of a side collision of a car, thus effectively reducing impact transmission velocity and preventing the side sill from being badly thrust into the passenger compartment in such a collision. In the shock absorber, a fixed guide pipe penetrates the center of a reinforcing member of a side sill box with both ends of the pipe being projected into inner and outer panels of the side sill box. A retractable damper is movably inserted into the guide pipe at a position inside the outer panel, thus primarily absorbing the side impact. A support member is elastically and movably inserted into the guide pipe at a position inside the inner panel, thus finally absorbing the impact.
    Type: Grant
    Filed: October 1, 1997
    Date of Patent: July 20, 1999
    Assignee: Hyundai Motor Company
    Inventor: Ju-Yong Lee