Abstract: Optimizing the time that a link is active in a data storage device is desirable. Changing the way the device processes commands will minimize the link uptime and maximize the time that the link can remain in a low power mode. The data storage device will control the command arbitration from the host to aggregate together command chunks as large as possible, such that will extend the link down durations, and won't need to wake the link up occasionally. In another approach the execution of commands from internal buffers of the host will be prioritized according to command-batch completion criteria, and not based on minimizing the latency of a single command.

Abstract: A data storage device having a flash translation layer configured to handle file-system defragmentation in a manner that avoids, reduces, and/or optimizes physical data movement in flash memory. In an example embodiment, the memory controller maintains in a volatile memory thereof a lookaside table that supplants pertinent portions of the logical-to-physical table. Entries of the lookaside table are configured to track source and destination addresses of the host defragmentation requests and are logically linked to the corresponding entries of the logical-to-physical table such that end-to-end data protection including the use of logical-address tags to the user data can be supported by logical means and without physical data rearrangement in the flash memory. In some embodiments, physical data rearrangement corresponding to the file-system defragmentation is performed in the flash memory in response to certain trigger events, which can improve the input/output performance of the data-storage device.

Abstract: A controller memory buffer (CMB) is a portion of volatile memory of a controller of a data storage device that is allocated to a host device for use by the host device. When the CMB is not fully utilized, the controller may determine that at least a portion of the unutilized space of the CMB may be used for non-host data. The at least a portion is based on a number of past workloads and a current workload of the CMB. An amount of available space of the CMB that the controller may utilize is dependent on the number of past workloads and the current workload of the CMB. Thus, the volatile memory of the controller may be more optimally utilized.

Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller and a media unit. The capacity of the media unit is divided into a plurality of zones. The controller is configured to make informed use of errors by update zone metadata to indicate one or more first logical block addresses were skipped and to indicate the next valid logical block address is available to store data. The controller is further configured to update zone metadata to recommend to the host device to reset one or more full zones, to recommend to the host device to transition one or more open zones to a full state, to alert the host device that one or more open zones have been transitioned to the full state, and to notify the host device of the writeable zone capacity of each of the plurality of zones.

Abstract: When copy commands are queued in a submission queue, there can potentially be many queued input-output (I/O) commands directed to the same logical range as the queued commands. This can result in data being invalidated immediately after it is written in memory, leading to write amplification and inefficient backend processing. To address this problem, the embodiments presented herein can be used to lock the range of logical block addresses of the queued commands, so that I/O commands are prevented from accessing the range of logical block addresses until the queued copy commands are completed.

Abstract: A Controller Memory Buffer (CMB) caching mechanism can be used for increased CMB performance. Rather than reading data and writing data from the static random access memory (SRAM), data is read from the SRAM. When data is read from the CMB in SRAM there is increase performance, but little space to process both read and write commands. Using a dynamic random access memory (DRAM) for write commands and CMB in SRAM for read commands allows for increased performance. Due to limited space in the SRAM, when the read commands are read from the host, the commands are deleted. This allows for relevant data stored in the SRAM to be used for the next command, but then deleted for the next command to be processed. The increase in performance is allowed, while not using extra SRAM or DRAM.

Abstract: A data storage device and method for device-initiated hibernation are provided. In one embodiment, the data storage device comprises a non-volatile memory and a controller. The controller is configured to: receive, from a host during a set-up phase of a hibernation process, a plurality of write commands with a current state of a volatile memory in the host; store the plurality of write commands in a queue, wherein the plurality of write commands are not executed during the set-up phase of the hibernation process; receive a trigger from the host to perform an execution phase of the hibernation process; and in response to receiving the trigger, execute the plurality of write commands to store the current state of the host's volatile memory in the non-volatile memory of the data storage device. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

Abstract: The present disclosure generally relates to host memory buffer (HMB) cache management in DRAM-less SSDs. HMB is transient memory and may not always be available. For example, when the link between the data storage device and the host device is not active, the data storage device can't access the HMB. Placing an HMB log in the HMB controller that is disposed in the data storage device provides access to data that would otherwise be inaccessible in the HMB. The HMB log contains any deltas that have occurred since either the last copying to an HMB cache in the memory device or any delta that have occurred since the link became inactive. The HMB cache mirrors the HMB. In so doing, the data of the HMB is available to the data storage device not only when the link is active, but also when the link is not active.

Abstract: A system and method are disclosed for flexible emergency power fail management for multiple persistent memory regions. In one embodiment, a method is provided that is performed in a host in communication with a plurality of data storage devices, each data storage device having a persistent memory region, wherein the host comprises a capacitor shared by the plurality of data storage devices. The method comprises determining an allocation of power from the capacitor to each of the plurality of data storage devices; and dynamically changing the allocation of power from the capacitor to at least one data storage device of the plurality of data storage devices. Other embodiments are disclosed.

Abstract: A data storage device having a flash translation layer configured to handle file-system defragmentation in a manner that avoids, reduces, and/or optimizes physical data movement in flash memory. In an example embodiment, the memory controller maintains in a volatile memory thereof a lookaside table that supplants pertinent portions of the logical-to-physical table. Entries of the lookaside table are configured to track source and destination addresses of the host defragmentation requests and are logically linked to the corresponding entries of the logical-to-physical table such that end-to-end data protection including the use of logical-address tags to the user data can be supported by logical means and without physical data rearrangement in the flash memory. In some embodiments, physical data rearrangement corresponding to the file-system defragmentation is performed in the flash memory in response to certain trigger events, which can improve the input/output performance of the data-storage device.

Abstract: A data storage device stores files in its memory. The files may be logically fragmented in that various parts of a given file may be located in non-continuous logical addresses, which can be disadvantageous. The host can send a request to the data storage device to reduce such logical fragmentation. For example, the host can send a swap command to the data storage device, in response to which the data storage device swaps the logical addresses of data fragments of two different files. This results in the logical address of one or both of the data fragments being continuous with the logical address of another data fragment of the same file. This logical address swap can take place without physically moving the data in the memory.

Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to receive a dataset management (DSM) hint, determine if a second physical memory range associated with a next read operation is located within a threshold number of physical block addresses (PBAs) to a first physical memory range associated with a current read operation, where the next read operation is provided by the DSM hint, and utilize at least a portion of a latency budget associated with the current read operation to optimize a read parameter of the first physical memory range.

Abstract: A data storage device comprises a first memory, a second memory, and a controller. The first memory has a faster access time than the second memory. The controller is configured to store host-initialization code in the first memory, store a copy of the host-initialization code in the second memory, determine that the copy of the host-initialization code should be designated as the main version of the host-initialization code, and relocate the copy of the host-initialization code to the first memory, which makes the copy of the host-initialization code the main version of the host-initialization code that is accessed to boot-up the host. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller and a media unit. The capacity of the media unit is divided into a plurality of zones. The controller is configured to make informed use of errors by update zone metadata to indicate one or more first logical block addresses were skipped and to indicate the next valid logical block address is available to store data. The controller is further configured to update zone metadata to recommend to the host device to reset one or more full zones, to recommend to the host device to transition one or more open zones to a full state, to alert the host device that one or more open zones have been transitioned to the full state, and to notify the host device of the writeable zone capacity of each of the plurality of zones.

Abstract: A data storage device and method for device-initiated hibernation are provided. In one embodiment, the data storage device comprises a non-volatile memory and a controller. The controller is configured to: receive, from a host during a set-up phase of a hibernation process, a plurality of write commands with a current state of a volatile memory in the host; store the plurality of write commands in a queue, wherein the plurality of write commands are not executed during the set-up phase of the hibernation process; receive a trigger from the host to perform an execution phase of the hibernation process; and in response to receiving the trigger, execute the plurality of write commands to store the current state of the host's volatile memory in the non-volatile memory of the data storage device. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

Abstract: A data storage device and method for prediction-based improved power-loss handling. In one embodiment, a data storage device is provided comprising a memory and a controller. The controller is configured to predict a probability of an ungraceful shutdown of the data storage device; determine whether the probability is greater than a threshold; and in response to determining that the probability is greater than the threshold, reduce a risk of data loss that would occur in response to the ungraceful shutdown of the data storage device. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

Abstract: A non-volatile memory device that performs stream temperature interleave monitoring includes a plurality of regions of non-volatile memory and a controller. The controller is configured to monitor different access frequencies for data received by the non-volatile memory device. The controller is configured to determine interleave metrics indicating amounts of data of different access frequencies stored by each of the plurality of regions of non-volatile memory. The controller is configured to perform a subsequent action for the non-volatile memory device based on the determined interleave metrics.

Abstract: A data storage device and method for dynamic controller memory buffer allocation are disclosed. In one embodiment, a data storage device is provided comprising a memory and a controller with a controller memory buffer. The controller is configured to communicate with the non-volatile memory and is further configured to configure a size of the controller memory buffer; receive a request from the host to modify the size of the controller memory buffer during operation of the data storage device; and determine whether to grant the request to modify the size of the controller memory buffer. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

Abstract: Example storage systems, data storage devices, and methods provide redundant array of independent disk (RAID) control among peer storage devices. A master storage device among peer storage devices receives host commands and determines, based on a peer RAID configuration, data blocks for redundantly storing the host data unit among the peer storage devices. The master storage device allocates the data blocks among the peer storage devices and sends them to the peer storage devices using a peer communication channel.

Abstract: The present disclosure generally relates to determining host device read patterns and then matching autonomous defragmentation to the read pattern to reduce latency impact and avoid unnecessary write amplification (WA). Host devices tend to read data in similar sized chunks. Additionally, host devices tend to read certain data sequentially. Based upon the typical chunk size and data read, the data can be defragmented in sizes to match the typical host device read chunks, and the data defragmented can then be read sequentially within a same plane even if the defragmented data is on different dies. The data is defragmented without relying upon a host command to be presented. Background operation time is used to move updated data such that a future sequential read is supported.