Abstract: A display panel and a display device are provided. The display panel includes a first substrate, a second substrate arranged opposite to the first substrate, an electrophoresis layer, a liquid-blocking portion and a supporting structure. The electrophoresis layer is arranged between the first substrate and the second substrate and includes multiple electrophoresis particles. The liquid-blocking portion is arranged at an edge of the first substrate and/or the second substrate. The supporting structure is arranged between the first substrate and the second substrate and includes a first supporting portion and a second supporting portion. A height of the first supporting portion is greater than that of the second supporting portion in a direction perpendicular to a plane where the first substrate is located. A minimum distance between the second supporting portion and the liquid-blocking portion is less than that between the first supporting portion and the liquid-blocking portion.

Abstract: A display panel includes at least one pixel circuit and a light emitting element. One pixel circuit includes a driving transistor, and second and third transistors. The second transistor is connected between data line and a source of the driving transistor. The third transistor is connected between voltage adjusting signal line and the source. During a data writing phase, the second transistor is turned on, the data line provides data signal equal to VData to the source, a gate of the driving transistor receives the data signal, and voltage of the gate is VData+Vth. Vth denotes threshold voltage of the driving transistor. During a reset and adjustment phase, the third transistor is turned on, the voltage adjusting signal line provides adjusting voltage to the source, voltage of the source of the driving transistor is VJ, and the voltage of the gate remains VData+Vth. VData+Vth?VJ??2V.

Abstract: A pixel circuit in a display panel includes a drive transistor, a first terminal of the drive transistor is electrically connected to a power signal line; and drive modes of the display panel comprise at least a first drive mode, a second drive mode, and a third drive mode, wherein the first drive mode corresponds to a first drive frequency F1 and a first power signal Vdd1, the second drive mode corresponds to a second drive frequency F2 and a second power signal Vdd2, and the third drive mode corresponds to a third drive frequency F3 and a third power signal Vdd3, wherein F 1 > F 2 > F 3 , F 2 - F 3 F 1 - F 3 ? ? "\[LeftBracketingBar]" V dd ? 2 - V dd ? 3 ? "\[RightBracketingBar]" ? "\[LeftBracketingBar]" V dd ? 1 - V dd ? 3 ? "\[RightBracketingBar]" .

Abstract: A pixel circuit in a display panel includes a drive transistor and a first transistor, a first terminal of the drive transistor is electrically connected to a power signal line, a first terminal of the first transistor is electrically connected to an initialization signal line; a second terminal of the first transistor is electrically connected to the drive transistor or a light-emitting element; drive modes of the display panel include an i-th drive mode and a j-th drive mode, and the i-th drive mode corresponds to an i-th drive frequency Fi and an i-th initialization signal Vrefi, the j-th drive mode corresponds to a j-th drive frequency Fj, a signal writing stage in the j-th drive mode corresponds to a j1-th initialization signal Vrefj1, and a light emission holding stage in the j-th drive mode corresponds to a j2-th initialization signal Vrefj2.

Abstract: A pixel circuit in a display panel includes a drive transistor and a first transistor, a first terminal of the drive transistor is electrically connected to a power signal line, a first terminal of the first transistor is electrically connected to an initialization signal line; a second terminal of the first transistor is electrically connected to the drive transistor, or the second terminal of the first transistor is electrically connected to the light-emitting element; and drive modes of the display panel include a first drive mode, a second drive mode, and a third drive mode, the first drive mode corresponds to a first drive frequency F1 and a first initialization signal Vref1, the second drive mode corresponds to a second drive frequency F2 and a second initialization signal Vref2, and the third drive mode corresponds to a third drive frequency F3 and a third initialization signal Vref3.

Abstract: A display panel and a display device are provided. One pixel circuit of the display panel includes a driving transistor, a second transistor, a third transistor, a reset module, and a first light-emission controlling module. The second transistor is connected between a data line and a source of the driving transistor, the third transistor is connected between a voltage adjusting signal line and the source of the driving transistor, the reset module is connected between a reset voltage input terminal and a gate of the driving transistor, and the first light-emission controlling module is connected between a first power supply terminal and the source of the driving transistor. An operation process of the display panel includes a light emitting phase, a data writing phase, a reset and adjustment phase, and a reset phase.

Abstract: A display panel and a display apparatus are provided in the present disclosure. The display panel includes a first display region and a light-blocking layer. The first display region includes a plurality of light-transmitting regions and a plurality of pixel regions; and a transmittance of a light-transmitting region is greater than a transmittance of a pixel region. The light-blocking layer includes a first opening region and a second opening region; along a direction perpendicular to a plane of the display panel, the first opening region is overlapped with the light-transmitting region, and the second opening region is overlapped with the pixel region; and along a direction in parallel with the plane of the display panel, a minimum distance between the light-transmitting region and the pixel region is D1, and a minimum distance between two adjacent pixel regions is D2, where D1<D2.

Abstract: Provided are a display panel and a display device. The display panel includes a light-emitting element and a pixel drive circuit electrically connected to the light-emitting element. The pixel drive circuit includes a drive transistor and a first reset module. The drive transistor is configured to control a drive current. The first reset module is connected to a first node and configured to provide a first reset voltage to the first node. The light-emitting element is connected to the first node. A working mode of the display panel comprise a first drive mode. A display frame in the first drive mode includes a valid frame and an invalid frame. In the first drive mode, a first reset voltage for the valid frame is different from a first reset voltage for the invalid frame.

Abstract: Provided are a display panel, a driving method thereof, and a display device. A pixel circuit in the display panel includes a drive transistor, an initialization transistor, and an initialization signal line. An initialization signal terminal is electrically connected to a first terminal of the initialization transistor and the initialization signal line, a first terminal of the drive transistor is electrically connected to a power signal terminal, a second terminal of the drive transistor is electrically connected to a first terminal of a light-emitting element.

Abstract: A display panel and a fabrication method, and a display device are provided. The display panel includes a substrate, and a plurality of sub-pixels disposed on the substrate. Each sub-pixel includes a light-emitting element and a light-shielding structure corresponding to the light-emitting element. The plurality of sub-pixels are divided into N types, wherein N is an integer greater than or equal to two. For light-emitting elements in sub-pixels of different types of the plurality of sub-pixels, light-shielding structures are disposed in different directions of corresponding light-emitting elements, and light-emitting directions of the sub-pixels of different types are different.

Abstract: The application provides a display panel, integrated chip component and display device. The display panel includes: a first display area and a second display area; pixel circuits comprising first pixel circuits and second pixel circuits, the first pixel circuits and the second pixel circuits being configured to provide driving currents for light-emitting elements in the first display area and the second display area, respectively; and first pixel units and second pixel units, each first pixel unit comprising a first pixel circuit and a light-emitting element connected to the first pixel circuit, and each second pixel unit comprising a second pixel circuit and a light-emitting element connected to the second pixel circuit; wherein each first pixel unit is configured to receive a first power supply signal V1 and a second power supply signal V2, V1>V2.

Abstract: A display panel includes a pixel circuit that includes a light emitting module, a driving module, a first dual control module, and a second dual control module. A control end of the driving module is connected to a first node. The first dual control module has a control end connected to a first scanning line and has a first end connected to the first node. A first capacitor is formed between an intermediate node of the first dual control module and a first potential line. The second dual control module has a first end connected to the first node and has a second end connected to the driving module. A second capacitor is formed between an intermediate node of the second dual control module and a second potential line. Capacitance of one of the first capacitor and the second capacitor is greater than another.

Abstract: Provided display panel includes at least one pixel circuit and at least one light-emitting element. The at least one pixel circuit is configured to drive the at least one light-emitting element to emit light. The at least one pixel circuit includes a drive module and a light emission control module. The drive module is configured to generate a drive current. The light emission control module is configured to control the drive current to be transmitted to a light-emitting element in response to a light emission control signal. A display period of the display panel includes a first display stage and a second display stage, where in the first display stage, an ineffective pulse duration for the light emission control signal is T1, in the second display stage, an ineffective pulse duration for the light emission control signal is T2, and T1 > T2.

Abstract: A display panel and a display device are provided. One pixel circuit of the display panel includes a driving transistor, a second transistor, a third transistor, a reset module, and a first light-emission controlling module. The second transistor is connected between a data line and a source of the driving transistor, the third transistor is connected between a voltage adjusting signal line and the source of the driving transistor, the reset module is connected between a reset voltage input terminal and a gate of the driving transistor, and the first light-emission controlling module is connected between a first power supply terminal and the source of the driving transistor. An operation process of the display panel includes a light emitting phase, a data writing phase, a reset and adjustment phase, and a reset phase.

Abstract: A display panel and a display device are provided. The display panel includes at least one pixel circuit and a light emitting element. One pixel circuit includes a driving transistor, a second transistor, a third transistor, and a first light-emission controlling module. The second transistor is connected between a data line and a source of the driving transistor and is configured to provide a data signal. The third transistor is connected between a voltage adjusting signal line and the source of the driving transistor and is configured to provide an adjusting voltage. The first light-emission controlling module is connected between a first power supply terminal and the source of the driving transistor and is configured to provide a power supply voltage. The power supply voltage provided by the first power supply terminal is VP, and the adjusting voltage is VJ, where VP<VJ?VP+3.5V, and/or VP+1V<VJ.

Abstract: A display panel includes at least one pixel circuit and a light emitting element. One pixel circuit includes a driving transistor, and second and third transistors. The second transistor is connected between data line and a source of the driving transistor. The third transistor is connected between voltage adjusting signal line and the source. During a data writing phase, the second transistor is turned on, the data line provides data signal equal to VData to the source, a gate of the driving transistor receives the data signal, and voltage of the gate is VData+Vth. Vth denotes threshold voltage of the driving transistor. During a reset and adjustment phase, the third transistor is turned on, the voltage adjusting signal line provides adjusting voltage to the source, voltage of the source of the driving transistor is VJ, and the voltage of the gate remains VData+Vth. VData+Vth?VJ??2V.

Abstract: Provided are a display panel and a display device. The display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a drive module and a first initialization module. The drive module is configured to generate a drive current. The first initialization module is configured to supply a first initialization voltage to a first node. The first node is connected to the light-emitting element. A first control terminal of the first initialization module is configured to transmit the first initialization voltage to the first node in response to a first scan control signal. A display period of the display panel includes a first display stage and a second display stage. In the first display stage, a total effective-pulse duration of the first scan control signal is T1. In the second display stage, the total effective-pulse duration of the first scan control signal is T2. T1 < T2.

Abstract: A display panel and a display device are provided. The display panel includes pixel circuits. Each pixel circuit includes a driving transistor, a data writing circuit, a light-emitting control circuit, a threshold compensation circuit and a bias adjustment circuit. The driving transistor includes a gate electrically connected to a first node, a first terminal electrically connected to a second node, and a second terminal electrically connected to the third node, and is configured to generate a driving current. The third node is connected to a light-emitting element through the light-emitting control circuit. The bias adjustment circuit is configured to provide a signal of a bias adjustment signal terminal to the second node under control of a signal of a first scanning signal terminal in such a manner that a bias state of the driving transistor is adjusted.

Abstract: A display panel includes a substrate; first electrodes and an auxiliary electrode disposed on a top side of the substrate, a plurality of light-emitting elements disposed on first electrodes and an auxiliary electrode, a second electrode, and a conductive barrier. The first pole of one light-emitting element is connected to one of the first electrodes. The second electrode is disposed on the light-emitting elements and connected to a second pole of one of the light-emitting elements. The conductive barrier is disposed between two adjacent light-emitting elements and electrically connected to the auxiliary electrode and the second electrode. Each of the two sidewalls of the conductive barrier includes a reflective electrode for reflecting light emitted by an adjacent light-emitting element.

Abstract: A display panel and a method for driving the same, and a display device are provided. The display panel includes a light emitting element and a pixel circuit that includes a data writing module configured to provide a data signal and an adjusting voltage, a driving module configured to provide a driving current to the light emitting element and including a driving transistor, and a compensation module configured to compensate a threshold voltage of the driving transistor. An operation process of the display panel includes a period of a data writing frame during which the pixel circuit executes a data writing phase during which the data writing module writes the data signal and a light emitting phase, and a period of a holding frame during which the pixel circuit executes a reset and adjustment phase during which the data writing module writes the adjusting voltage and the light emitting phase.