Patents by Inventor Julian J. Hsieh

Julian J. Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8241991
    Abstract: A method for forming an interconnect structure with airgaps, includes: providing a structure having a trench formed on a substrate; depositing a spacer oxide layer on sidewalls of the trench as sidewall spacers by plasma enhanced atomic layer deposition; filling the trench having the sidewall spacers with copper; removing the sidewall spacers to form an airgap structure; and encapsulating the airgap structure, wherein airgaps are formed between the filled copper and the sidewalls of the trench.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: August 14, 2012
    Assignee: ASM Japan K.K.
    Inventors: Julian J. Hsieh, Nobuyoshi Kobayashi, Akira Shimizu, Kiyohiro Matsushita, Atsuki Fukazawa
  • Publication number: 20110217838
    Abstract: A method for forming an interconnect structure with airgaps, includes: providing a structure having a trench formed on a substrate; depositing a spacer oxide layer on sidewalls of the trench as sidewall spacers by plasma enhanced atomic layer deposition; filling the trench having the sidewall spacers with copper; removing the sidewall spacers to form an airgap structure; and encapsulating the airgap structure, wherein airgaps are formed between the filled copper and the sidewalls of the trench.
    Type: Application
    Filed: March 5, 2010
    Publication date: September 8, 2011
    Applicant: ASM JAPAN K.K.
    Inventors: Julian J. Hsieh, Nobuyoshi Kobayashi, Akira Shimizu, Kiyohiro Matsushita, Atsuki Fukazawa
  • Patent number: 6403501
    Abstract: A method is provided that conditions the chamber walls of a HDP CVD reactor by forming a layer of doped material prior to depositing dielectric layers of the doped material onto wafers. A consistent deposition rate can be maintained during subsequent deposition. When deposition is halted, the chamber is cleaned and a thin layer of the doped material is formed on the walls. Consequently, the chamber is kept at equilibrium even during periods of idle, thereby allowing the deposition rates to be consistent even after deposition resumes after the idle periods. For prolonged idle times, the chamber is re-cleaned and the doped material is re-deposited periodically, such as every 12 hours.
    Type: Grant
    Filed: December 27, 2000
    Date of Patent: June 11, 2002
    Assignee: Novellus Systems, Inc.
    Inventors: Jonathan W. Hander, Mahesh K. Sanganeria, Julian J. Hsieh
  • Patent number: 5290358
    Abstract: System and method for controlling the thickness profile of deposited thin film layers over three-dimensional topography are disclosed, wherein low pressure chemical vapor deposition conditions are employed with the reactant beam collimated and chosen to impinge at a specific angle onto the surface, such that the reactive sticking coefficient s.sub.r with the deposition surface is <1. Compared with conventional approaches, this method permits new shapes of the deposited thin film layer to be achieved over topography (such as trenches), including (i) tapered rather than re-entrant shapes (i.e., thicker at bottom rather than at top), (ii) enhanced sidewall and/or bottom coverage of trench structures (cf. the top surface), (iii) voidless, seamless filling of trench or via structures even at high aspect ratio (depth/width), and (iv) asymmetric sidewall coverage.
    Type: Grant
    Filed: September 30, 1992
    Date of Patent: March 1, 1994
    Assignee: International Business Machines Corporation
    Inventors: Gary W. Rubloff, Julian J. Hsieh