Patents by Inventor Jumpei Sato

Jumpei Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070268064
    Abstract: A power source circuit adapted to output a first set potential which is set according to a first selection signal, or a second set potential which is set according to a second selection signal and higher than the first set potential, has an output terminal adapted to output the first set potential or the second set potential; a first boosting circuit adapted to boost a voltage supplied from a power source and to output the boosted voltage to the output terminal; a second boosting circuit adapted to boost the voltage supplied from the power source and to output the boosted voltage to the output terminal; a voltage dividing circuit adapted to output a monitor potential by dividing the output potential outputted from the output terminal according to the first selection signal, or to output a monitor potential by dividing the output potential and reducing a voltage dividing ratio of the monitor potential with respect to the output potential according to the second selection signal; a comparison amplifier adapted
    Type: Application
    Filed: May 14, 2007
    Publication date: November 22, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshikazu TAKEYAMA, Jumpei Sato
  • Publication number: 20070040599
    Abstract: A semiconductor integrated circuit device includes: a boost circuit configured to boost power supply voltage so as to generate a boosted voltage; a voltage detecting circuit configured to detect the boosted voltage of the boost circuit and control ON/OFF of the boost circuit for keeping the boosted voltage at a certain level; and a gate circuit configured to set the voltage detecting circuit to be in such an inactive state that current passage thereof is shut off, thereby stopping the operation of the boost circuit while a load is separated from an output node of the boost circuit.
    Type: Application
    Filed: July 17, 2006
    Publication date: February 22, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Jumpei Sato