Patents by Inventor Jun Funakoshi

Jun Funakoshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8477384
    Abstract: A solid-state image pickup device and image pickup method eliminate a dark-current component by adjusting the black level appropriately even if the dark-current component varies among horizontal lines. A pixel array includes light-receiving pixel elements and light-blocking pixel elements disposed such that horizontal lines include the light-blocking pixel elements individually. A readout circuit block reads pixel signals of each of the horizontal lines from the pixel array, inputs the pixel signals to ADC circuits (column ADC circuit block), and outputs the pixel signals of the light-blocking pixel elements. A ramp signal generation circuit obtains the pixel signals of the light-blocking pixel elements output from the readout circuit block, generates a ramp signal by using a reference level of AD conversion adjusted for each of the horizontal lines in accordance with the obtained pixel signals of the light-blocking pixel elements, and inputs the ramp signal to the ADC circuits.
    Type: Grant
    Filed: September 16, 2008
    Date of Patent: July 2, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Toshitaka Mizuguchi, Katsuyoshi Yamamoto, Jun Funakoshi, Tsuyoshi Higuchi
  • Patent number: 8143916
    Abstract: A level shift circuit includes a level shift section for receiving a low potential signal oscillating between a high potential and a ground potential and converting it into a high potential signal oscillating between the high potential and the ground potential, the level shift section being connected to at least a high potential power supply for generating the high potential, a low potential power supply for generating the low potential, and a ground power supply for generating the ground potential, an inverter section for inverting-amplifying the high potential signal from the level shift section, and an N-type MOS transistor for supplying the ground potential to the inverter section, the N-type MOS transistor being connected in series to the inverter section between the high potential power supply and the ground power supply and having its gate electrode connected to the low potential power supply.
    Type: Grant
    Filed: June 5, 2009
    Date of Patent: March 27, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Jun Funakoshi
  • Patent number: 8098307
    Abstract: According to an aspect of an embodiment, an imaging device has a black level reference generator for generating a reference value of a black level by calculating an average value of the accumulated pixel values for which the maximum values and/or minimum values has been replaced by the compensational pixel values, and an output compensator for compensating an output from the light sensitive pixels with the reference value of the black level.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: January 17, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Jun Funakoshi
  • Patent number: 7920181
    Abstract: The challenge of the present invention is to suppress a variation in brightness of an image and make a reference value of a black level converge at an appropriate value in a short time. A condition judgment circuit judges whether or not a frame of an amount of change in gains of a variable gain amplifier being equal to or greater than a threshold continues for a predefined frames or more. If a frame of an amount of change in the gains being equal to or greater than the threshold continues for the predefined frames, a black level value of the current frame is set for new black level reference. If not continues for the predetermined number, the previous black level reference value is retained in lieu of correcting the black level.
    Type: Grant
    Filed: February 24, 2006
    Date of Patent: April 5, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Asao Kokubo, Hiroshi Daiku, Jun Funakoshi, Tsuyoshi Higuchi
  • Patent number: 7639290
    Abstract: A differential amplifier has a first input terminal to which a voltage of a noise signal of the solid-state imaging device is supplied and a second input terminal to which a voltage of a temporary data signal having the noise signal of the solid-state imaging device superposed thereon is supplied. The differential amplifier inverts an output signal when a magnitude relationship in voltage between the first and second input terminals becomes reverse. A measurement circuit measures a variation amount of a voltage of the second input terminal from when the voltage of the second input terminal begins to vary in a direction to reverse the magnitude relationship to when the output signal of the differential amplifier is inverted, and outputs a measurement result as a digital value indicating a voltage of a real data signal obtained by removing the noise signal from the temporary data signal.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: December 29, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Tsuyoshi Higuchi, Jun Funakoshi, Seiji Yamagata, Toshitaka Mizuguchi, Katsuyoshi Yamamoto
  • Patent number: 7612810
    Abstract: A solid-state imaging device includes an image sensor configured to output image data generated by image sensing elements together with a timing signal, and an image processing unit configured to output the image data supplied from the image sensor having undergone predetermined signal processing a predetermined delay time after a timing indicated by the timing signal, the image sensor further configured to make the timing signal indicate a first timing that is at least the processing delay time earlier than a second timing indicative of a start of a valid period of the image data, and to output dummy data from the first timing to the start of the valid period of the image data.
    Type: Grant
    Filed: October 20, 2004
    Date of Patent: November 3, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Asao Kokubo, Hiroshi Daiku, Jun Funakoshi, Yutaka Takeda, Norihiro Yoshida
  • Publication number: 20090243697
    Abstract: A level shift circuit includes a level shift section for receiving a low potential signal oscillating between a high potential and a ground potential and converting it into a high potential signal oscillating between the high potential and the ground potential, the level shift section being connected to at least a high potential power supply for generating the high potential, a low potential power supply for generating the low potential, and a ground power supply for generating the ground potential, an inverter section for inverting-amplifying the high potential signal from the level shift section, and an N-type MOS transistor for supplying the ground potential to the inverter section, the N-type MOS transistor being connected in series to the inverter section between the high potential power supply and the ground power supply and having its gate electrode connected to the low potential power supply.
    Type: Application
    Filed: June 5, 2009
    Publication date: October 1, 2009
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventor: Jun FUNAKOSHI
  • Patent number: 7593047
    Abstract: The present invention is an image sensor having a pixel array, which arranges pixels having photoelectric conversion circuits in rows and columns; and a pixel selecting circuit for selecting each pixel, wherein the pixel selecting circuit selects pixels of all rows and/or pixels of all columns, and selects a pixel signal at every plural pixels among the selected pixel signals, and pixels selected from a pixel block of a plurality of rows and columns within the pixel array are dispersed within this pixel block.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: September 22, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Jun Funakoshi, Katsuyoshi Yamamoto
  • Patent number: 7522199
    Abstract: An imaging device provided with a read circuit in which a light-shielding region is formed in a part of an image region where a plurality of optical/electrical conversion devices is two-dimensionally arrayed in the row and column directions and which converts a optically detected signal outputted from each of the optical/electrical conversion devices for each of the column into a digital signal, comprises a storage device for storing the outputted digital signal outputted in relation with the optical/electrical conversion device in the light-shielding region and a difference calculation device for calculating a difference between the outputted digital signal in relation with the optical/electrical conversion device in a light-receiving region except the light-shielding region and a value stored in the storage device.
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: April 21, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Jun Funakoshi, Katsuyoshi Yamamoto, Asao Kokubo, Toshitaka Mizuguchi, Tsuyoshi Higuchi
  • Patent number: 7489353
    Abstract: A method for driving a solid state imaging device which prevents the generation of electronic shutter noise even when the integration time for exposure of a pixel region fluctuates. The solid state imaging device performs a rolling shutter operation that sequentially selects a reset row and a read row separated from each other in accordance with a row spacing based on integration time in the pixel array. A dummy row is selected when a reset row or a read row is not selected. The method includes selecting a dummy reset row so that the total of the number of the reset rows and the reset dummy rows that are simultaneously selected is constant regardless of the number of simultaneously selected reset rows.
    Type: Grant
    Filed: August 26, 2004
    Date of Patent: February 10, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventor: Jun Funakoshi
  • Patent number: 7477300
    Abstract: In order to reduce crosstalk caused between control signal wires in a semiconductor apparatus without increasing the size of the semiconductor apparatus, a noise guard circuit is provided at the opposite end of the control signal wire to the driver circuit. The noise guard circuit controls in such a way as to increase the impedance between the relevant control signal wire and a fixed potential when the logic of the relevant control signal wire is positive logic for driving the element, and as to decrease the impedance between the relevant control signal wire and a fixed potential when the logic of the relevant control signal wire is negative logic for driving the element.
    Type: Grant
    Filed: June 2, 2005
    Date of Patent: January 13, 2009
    Assignee: Fujitsu Limited
    Inventors: Jun Funakoshi, Tsuyoshi Higuchi
  • Patent number: 7477299
    Abstract: A second source follower circuit of a reference voltage generator includes a transistor having the same characteristics as a first source follower circuit of a pixel. Accordingly, the second source follower circuit can generate a second reference voltage according to the change in characteristics of the first source follower circuit. A noise voltage switching circuit outputs a first voltage as a noise voltage to a pixel signal generator when the noise voltage is equal to or lower than the second reference voltage. In a reset state, the noise voltage and the second reference voltage always have a predetermined voltage difference. Therefore, deterioration in image quality can be prevented even when capturing a subject having high brightness. Since a trimming circuit or the like selecting any one of a plurality of reference voltages according to characteristics of a formed transistor becomes unnecessary, the cost of an imaging device can be reduced.
    Type: Grant
    Filed: May 20, 2005
    Date of Patent: January 13, 2009
    Assignee: Fujitsu Limited
    Inventors: Tsuyoshi Higuchi, Jun Funakoshi, Seiji Yamagata, Toshitaka Mizuguchi, Katsuyoshi Yamamoto
  • Publication number: 20090009822
    Abstract: A solid-state image pickup device and image pickup method eliminate a dark-current component by adjusting the black level appropriately even if the dark-current component varies among horizontal lines. A pixel array includes light-receiving pixel elements and light-blocking pixel elements disposed such that horizontal lines include the light-blocking pixel elements individually. A readout circuit block reads pixel signals of each of the horizontal lines from the pixel array, inputs the pixel signals to ADC circuits (column ADC circuit block), and outputs the pixel signals of the light-blocking pixel elements. A ramp signal generation circuit obtains the pixel signals of the light-blocking pixel elements output from the readout circuit block, generates a ramp signal by using a reference level of AD conversion adjusted for each of the horizontal lines in accordance with the obtained pixel signals of the light-blocking pixel elements, and inputs the ramp signal to the ADC circuits.
    Type: Application
    Filed: September 16, 2008
    Publication date: January 8, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Toshitaka MIZUGUCHI, Katsuyoshi Yamamoto, Jun Funakoshi, Tsuyoshi Higuchi
  • Publication number: 20080297630
    Abstract: According to an aspect of an embodiment, an imaging device has a black level reference generator for generating a reference value of a black level by calculating an average value of the accumulated pixel values for which the maximum values and/or minimum values has been replaced by the compensational pixel values, and an output compensator for compensating an output from the light sensitive pixels with the reference value of the black level.
    Type: Application
    Filed: May 30, 2008
    Publication date: December 4, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Jun FUNAKOSHI
  • Patent number: 7456876
    Abstract: An image processing circuit for a color image sensor, comprising a color sensitivity correction circuit which adds/subtracts a predetermined offset to/from pixel signals being output by amplifying photoelectric conversion signals of pixels, which have photoelectric conversion element and are arranged in column and row directions, for each column, and multiplies the result by a predetermined gain, wherein the predetermined offset includes a first offset, which is set according to each color, and a second offset, which is set according to a plurality of columns. According to the present invention, the offset of the color sensitivity correction circuit includes a first offset, which is set according to each color, and a second offset, which is set according to a plurality of columns, therefore, periodic moiré in the vertical direction, which is caused by the column output circuit and the output signal supply circuit for each column, can be suppressed, and image quality can be improved.
    Type: Grant
    Filed: July 24, 2003
    Date of Patent: November 25, 2008
    Assignee: Fujitsu Limited
    Inventors: Jun Funakoshi, Shigeru Nishio, Asao Kokubo, Masatoshi Kokubun
  • Patent number: 7369170
    Abstract: A method for controlling a solid-state imaging apparatus, which includes a plurality of pixels, includes selecting a resetting element of one of the pixels, resetting a detecting unit connected to the pixel, transmitting to a detecting unit, an electric charge accumulated after photoelectric conversion performed by a photoelectric converting element of the pixel, and providing control to set a second end of a transmitting control signal line to an open state.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: May 6, 2008
    Assignee: Fujitsu Limited
    Inventors: Tsuyoshi Higuchi, Jun Funakoshi, Seiji Yamagata, Toshitaka Mizuguchi, Katsuyoshi Yamamoto
  • Patent number: 7301487
    Abstract: An image sensor includes: a pixel unit that outputs a first signal including an offset voltage inherent to a pixel; a CDS unit that performs correlated double sampling of a second signal that is obtained from the first signal by canceling the offset voltage inherent to the pixel, and outputs the second signal after the correlated double sampling as a third signal including an offset voltage due to the CDS unit; and an ADC unit that performs analog-to-digital conversion of a fourth signal that is obtained from the third signal by canceling the offset voltage due to the CDS unit.
    Type: Grant
    Filed: May 8, 2006
    Date of Patent: November 27, 2007
    Assignee: Fujitsu Limited
    Inventors: Jun Funakoshi, Toshitaka Mizuguchi, Tsuyoshi Higuchi, Katsuyoshi Yamamoto
  • Patent number: 7242427
    Abstract: The invention relates to an X-Y address type solid-state image pickup device manufactured by a CMOS process, and has an object to provide an X-Y address type solid-state image pickup device in which a chip area is not increased, manufacturing costs are suppressed, and an image averaging processing can be carried out. Pixel regions Pmn are arranged in a matrix form in regions defined by horizontal selection lines RWm and vertical selection lines CLn. Each of the pixel regions Pmn includes a photodiode 10, a source follower amplifier 14 for converting an electric charge of the photodiode 10 into a voltage and amplifying it to output image data, and a horizontal selection transistor 16 for outputting the image data to a predetermined one of the vertical selection lines CLn. An amplifier/noise cancel circuit 6 has a built-in image averaging circuit for carrying out an averaging processing of the image data outputted from at least two of the plurality of the pixel regions Pmn.
    Type: Grant
    Filed: January 28, 2002
    Date of Patent: July 10, 2007
    Assignee: Fujitsu Limited
    Inventors: Masatoshi Kokubun, Katsuyosi Yamamoto, Shinya Udo, Jun Funakoshi, Chikara Tsuchiya
  • Patent number: 7218166
    Abstract: A circuit for stabilizing an electric current includes a constant voltage supplying circuit configured to supply a constant voltage, and a current generating circuit coupled to the constant voltage supplying circuit to generate an electric current based on a predetermined voltage responsive to the constant voltage and to adjust a current amount of the electric current to a predetermined amount by feedback control based on comparison of the predetermined voltage with a voltage appearing across a predetermined resistance responsive to the electric current.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: May 15, 2007
    Assignee: Fujitsu Limited
    Inventors: Makoto Yanagisawa, Jun Funakoshi, Seiji Yamagata, Toshitaka Mizuguchi, Tsuyoshi Higuchi
  • Publication number: 20070075772
    Abstract: The challenge of the present invention is to suppress a variation in brightness of an image and make a reference value of a black level converge at an appropriate value in a short time. Acondition judgment circuit judges whether or not a frame of an amount of change in gains of a variable gain amplifier being equal to or greater than a threshold continues for a predefined frames or more. If a frame of an amount of change in the gains being equal to or greater than the threshold continues for the predefined frames, a black level value of the current frame is set for new black level reference. If not continues for the predetermined number, the previous black level reference value is retained in lieu of correcting the black level.
    Type: Application
    Filed: February 24, 2006
    Publication date: April 5, 2007
    Inventors: Asao Kokubo, Hiroshi Daiku, Jun Funakoshi, Tsuyoshi Higuchi