Patents by Inventor Jun Furuichi

Jun Furuichi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11011457
    Abstract: A wiring substrate includes a first insulation layer containing insulating resin, a first through hole passing through the first insulation layer is the thickness direction, a pad formed within the first through hole, a second insulation layer containing insulating resin and laminated on a first surface of the first insulation layer, and a first wiring layer provided on the second insulation layer and connecting to the pad. A connecting surface of the pad that connects the first wiring layer includes a curved surface that curves in a protruding shape toward the first surface of the first insulation layer.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: May 18, 2021
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Koichi Nishimura, Noriyoshi Shimizu, Jun Furuichi
  • Patent number: 10892216
    Abstract: A first insulation layer includes a concave portion formed in a lower surface thereof. A first wiring layer is formed in the concave portion. A protective insulation layer has an opening configured to expose a part of the first wiring layer and is stacked on the lower surface of the first insulation layer. An adhesion layer is interposed between the first wiring layer and the protective insulation layer and has higher adhesiveness with the protective insulation layer than the first wiring layer. The first wiring layer includes a pad portion formed in the concave portion and a protrusion protruding from a portion of a lower surface of the pad portion into the opening. The adhesion layer is formed to cover the lower surface of the pad portion and a side surface of the protrusion and to expose a lower end face of the protrusion.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: January 12, 2021
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Jun Furuichi
  • Publication number: 20200373233
    Abstract: A wiring substrate includes a first insulation layer containing insulating resin, a first through hole passing through the first insulation layer is the thickness direction, a pad formed within the first through hole, a second insulation layer containing insulating resin and laminated on a first surface of the first insulation layer, and a first wiring layer provided on the second insulation layer and connecting to the pad. A connecting surface of the pad that connects the first wiring layer includes a curved surface that curves in a protruding shape toward the first surface of the first insulation layer.
    Type: Application
    Filed: May 15, 2020
    Publication date: November 26, 2020
    Inventors: Koichi Nishimura, Noriyoshi Shimizu, Jun Furuichi
  • Publication number: 20190333849
    Abstract: A first insulation layer includes a concave portion formed in a lower surface thereof. A first wiring layer is formed in the concave portion. A protective insulation layer has an opening configured to expose a part of the first wiring layer and is stacked on the lower surface of the first insulation layer. An adhesion layer is interposed between the first wiring layer and the protective insulation layer and has higher adhesiveness with the protective insulation layer than the first wiring layer. The first wiring layer includes a pad portion formed in the concave portion and a protrusion protruding from a portion of a lower surface of the pad portion into the opening. The adhesion layer is formed to cover the lower surface of the pad portion and a side surface of the protrusion and to expose a lower end face of the protrusion.
    Type: Application
    Filed: April 22, 2019
    Publication date: October 31, 2019
    Inventor: Jun Furuichi
  • Patent number: 10366949
    Abstract: A wiring substrate includes a first wiring structure and a second wiring structure. The first wiring structure includes a first insulating layer, which covers a first wiring layer, and a via wiring. A first through hole of the first insulating layer is filled with the via wiring. The second wiring structure includes a second wiring layer and a second insulating layer. The second wiring layer is formed on an upper surface of the first insulating layer and an upper end surface of the via wiring. The second wiring layer partially includes a roughened surface. The second insulating layer is stacked on the upper surface of the first insulating layer and covers the second wiring layer. The second wiring structure has a higher wiring density than the first wiring structure. The roughened surface of the second wiring layer has a smaller surface roughness than the first wiring layer.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: July 30, 2019
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Noriyoshi Shimizu, Yusuke Gozu, Jun Furuichi, Akio Rokugawa, Takashi Ito
  • Patent number: 10340238
    Abstract: A wiring substrate includes a first wiring structure. The first wiring structure has a first insulation layer including a reinforcement material. A first wiring layer is embedded in the first insulation layer. A second wiring structure having a higher wiring density than the first wiring structure is formed on the first insulation layer. The second wiring structure includes at least one second insulation layer and two or more second wiring layers. A lower surface of the first wiring layer is flush with a lower surface of the first insulation layer. The reinforcement material is located toward the second wiring structure from a thickness-wise center of the first insulation layer and laid out at a thickness-wise center of a thickness from the lower surface of the first insulation layer to an upper surface of the uppermost second wiring layer in the second wiring structure.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: July 2, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Jun Furuichi
  • Patent number: 10262932
    Abstract: A wiring board includes: a first wiring structure including: a first insulating layer; a first wiring layer; and a via wiring; a protective insulating layer formed on the lower surface of the first insulating layer to cover a side surface of a lower portion of the first wiring layer; and a second wiring structure having an insulating layer and a wiring layer and formed on the upper surface of the first insulating layer. The upper surface of the first insulating layer and the upper end surface of the via wiring are substantially flush with each other. A wiring density of the second wiring structure is higher than a wiring density of the first wiring structure. The reinforcing material is positioned on a side of the second wiring structure with respect to a center of the first insulating layer in the thickness direction of the first insulating layer.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: April 16, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Jun Furuichi, Noriyoshi Shimizu
  • Publication number: 20190067224
    Abstract: A wiring substrate includes a first wiring structure. The first wiring structure has a first insulation layer including a reinforcement material. A first wiring layer is embedded in the first insulation layer. A second wiring structure having a higher wiring density than the first wiring structure is formed on the first insulation layer. The second wiring structure includes at least one second insulation layer and two or more second wiring layers. A lower surface of the first wiring layer is flush with a lower surface of the first insulation layer. The reinforcement material is located toward the second wiring structure from a thickness-wise center of the first insulation layer and laid out at a thickness-wise center of a thickness from the lower surface of the first insulation layer to an upper surface of the uppermost second wiring layer in the second wiring structure.
    Type: Application
    Filed: August 21, 2018
    Publication date: February 28, 2019
    Inventor: Jun FURUICHI
  • Patent number: 10100881
    Abstract: The invention provides a clutch seal which can enhance a durability of a membrane portion which is a constituting part of a seal and is constructed by a rubber-like elastic body, and can inhibit a working fluid from standing in a concave surface of the membrane portion. The clutch seal of the invention is an annular seal interposed between a clutch plate in a dry clutch and a piston pressing the clutch plate, has a middle ring fixed to the piston between an outer ring and an inner ring which are fixed to a clutch housing, and has membrane portions constructed by a rubber-like elastic body respectively between the outer ring and the middle ring and between the inner ring and the middle ring, wherein the middle ring is arranged at an intermediate position of a stroke in an initial shape of the membrane portion.
    Type: Grant
    Filed: October 8, 2013
    Date of Patent: October 16, 2018
    Assignees: NOK Corporation, Nissan Motor Co., Ltd.
    Inventors: Koji Tsukamoto, Kuniaki Miyake, Toshihiro Mukaida, Hitoshi Okabe, Atsushi Yokota, Tatsuya Osone, Yuuzo Akasaka, Hiroki Uehara, Jun Furuichi
  • Publication number: 20180166372
    Abstract: A wiring substrate includes a first wiring structure and a second wiring structure. The first wiring structure includes a first insulating layer, which covers a first wiring layer, and a via wiring. A first through hole of the first insulating layer is filled with the via wiring. The second wiring structure includes a second wiring layer and a second insulating layer. The second wiring layer is formed on an upper surface of the first insulating layer and an upper end surface of the via wiring. The second wiring layer partially includes a roughened surface. The second insulating layer is stacked on the upper surface of the first insulating layer and covers the second wiring layer. The second wiring structure has a higher wiring density than the first wiring structure. The roughened surface of the second wiring layer has a smaller surface roughness than the first wiring layer.
    Type: Application
    Filed: January 10, 2018
    Publication date: June 14, 2018
    Inventors: Noriyoshi SHIMIZU, Yusuke GOZU, Jun FURUICHI, Akio ROKUGAWA, Takashi Ito
  • Patent number: 9997474
    Abstract: A wiring board includes a first insulating layer made of a single layer of non-photosensitive resin including a reinforcing member, a center position of the reinforcing member being positioned on a side toward a first surface with respect to a center of the first insulating layer in a thickness direction; a layered structure of a wiring layer and an insulating layer, stacked on the first surface of the first insulating layer; a through wiring provided to penetrate the first insulating layer, the through wiring and the first insulating layer forming a first concave portion at a second surface of the first insulating layer, in which the second end surface of the through wiring is exposed; and a pad for external connection formed at the second surface of the first insulating layer at a position corresponding to the through wiring and having a second concave portion.
    Type: Grant
    Filed: April 3, 2017
    Date of Patent: June 12, 2018
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Jun Furuichi, Noriyoshi Shimizu
  • Patent number: 9875957
    Abstract: A wiring substrate includes a first wiring structure and a second wiring structure. The first wiring structure includes a first insulating layer, which covers a first wiring layer, and a via wiring. A first through hole of the first insulating layer is filled with the via wiring. The second wiring structure includes a second wiring layer and a second insulating layer. The second wiring layer is formed on an upper surface of the first insulating layer and an upper end surface of the via wiring. The second wiring layer partially includes a roughened surface. The second insulating layer is stacked on the upper surface of the first insulating layer and covers the second wiring layer. The second wiring structure has a higher wiring density than the first wiring structure. The roughened surface of the second wiring layer has a smaller surface roughness than the first wiring layer.
    Type: Grant
    Filed: July 6, 2015
    Date of Patent: January 23, 2018
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Noriyoshi Shimizu, Yusuke Gozu, Jun Furuichi, Akio Rokugawa, Takashi Ito
  • Publication number: 20170352628
    Abstract: A wiring board includes a first insulating layer made of a single layer of non-photosensitive resin including a reinforcing member, a center position of the reinforcing member being positioned on a side toward a first surface with respect to a center of the first insulating layer in a thickness direction; a layered structure of a wiring layer and an insulating layer, stacked on the first surface of the first insulating layer; a through wiring provided to penetrate the first insulating layer, the through wiring and the first insulating layer forming a first concave portion at a second surface of the first insulating layer, in which the second end surface of the through wiring is exposed; and a pad for external connection formed at the second surface of the first insulating layer at a position corresponding to the through wiring and having a second concave portion.
    Type: Application
    Filed: April 3, 2017
    Publication date: December 7, 2017
    Inventors: Jun FURUICHI, Noriyoshi SHIMIZU
  • Publication number: 20170256482
    Abstract: A wiring board includes: a first wiring structure including: a first insulating layer; a first wiring layer; and a via wiring; a protective insulating layer formed on the lower surface of the first insulating layer to cover a side surface of a lower portion of the first wiring layer; and a second wiring structure having an insulating layer and a wiring layer and formed on the upper surface of the first insulating layer. The upper surface of the first insulating layer and the upper end surface of the via wiring are substantially flush with each other. A wiring density of the second wiring structure is higher than a wiring density of the first wiring structure. The reinforcing material is positioned on a side of the second wiring structure with respect to a center of the first insulating layer in the thickness direction of the first insulating layer.
    Type: Application
    Filed: February 24, 2017
    Publication date: September 7, 2017
    Inventors: Jun Furuichi, Noriyoshi Shimizu
  • Patent number: 9668341
    Abstract: A wiring substrate includes a core layer having a penetrating hole, a first insulating layer disposed on a first surface of the core layer and having a first opening at a position of the penetrating hole, the first insulating layer containing no filler, a penetrating electrode disposed in the penetrating hole and in the first opening, and a first wiring layer laminated both on the first insulating layer at a first surface thereof facing away from the core layer and on an end face of the penetrating electrode, wherein the first surface of the first insulating layer and the end face of the penetrating electrode are planarized.
    Type: Grant
    Filed: May 19, 2016
    Date of Patent: May 30, 2017
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Jun Furuichi, Noriyoshi Shimizu
  • Patent number: 9646926
    Abstract: A wiring substrate includes a first wiring layer including a first wiring part having a first wiring interval and a second wiring part having a second wiring interval wider than the first wiring interval, a metal plane layer formed on a portion of a first insulation layer formed on the first wiring layer, the first wiring part being located below the portion, a second insulation layer formed on the first insulation layer and the metal plane layer and having a first via hole and a second via hole, a second wiring layer formed on the second insulation layer and connected to the first wiring layer via a first via conductor formed in the first via hole, and a third wiring layer formed on the second insulation layer and connected to the metal plane layer via a second via conductor formed in the second via hole.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: May 9, 2017
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Yuji Kunimoto, Jun Furuichi, Noriyoshi Shimizu, Naoyuki Koizumi
  • Publication number: 20160353569
    Abstract: A wiring substrate includes a core layer having a penetrating hole, a first insulating layer disposed on a first surface of the core layer and having a first opening at a position of the penetrating hole, the first insulating layer containing no filler, a penetrating electrode disposed in the penetrating hole and in the first opening, and a first wiring layer laminated both on the first insulating layer at a first surface thereof facing away from the core layer and on an end face of the penetrating electrode, wherein the first surface of the first insulating layer and the end face of the penetrating electrode are planarized.
    Type: Application
    Filed: May 19, 2016
    Publication date: December 1, 2016
    Inventors: Jun FURUICHI, Noriyoshi SHIMIZU
  • Publication number: 20160276259
    Abstract: A wiring substrate includes a first wiring layer including a first wiring part having a first wiring interval and a second wiring part having a second wiring interval wider than the first wiring interval, a metal plane layer formed on a portion of a first insulation layer formed on the first wiring layer, the first wiring part being located below the portion, a second insulation layer formed on the first insulation layer and the metal plane layer and having a first via hole and a second via hole, a second wiring layer formed on the second insulation layer and connected to the first wiring layer via a first via conductor formed in the first via hole, and a third wiring layer formed on the second insulation layer and connected to the metal plane layer via a second via conductor formed in the second via hole.
    Type: Application
    Filed: June 1, 2016
    Publication date: September 22, 2016
    Inventors: Yuji Kunimoto, Jun Furuichi, Noriyoshi Shimizu, Naoyuki Koizumi
  • Patent number: 9412687
    Abstract: A wiring substrate includes a first wiring layer including a first wiring part having a first wiring interval and a second wiring part having a second wiring interval wider than the first wiring interval, a metal plane layer formed on a portion of a first insulation layer formed on the first wiring layer, the first wiring part being located below the portion, a second insulation layer formed on the first insulation layer and the metal plane layer and having a first via hole and a second via hole, a second wiring layer formed on the second insulation layer and connected to the first wiring layer via a first via conductor formed in the first via hole, and a third wiring layer formed on the second insulation layer and connected to the metal plane layer via a second via conductor formed in the second via hole.
    Type: Grant
    Filed: June 9, 2015
    Date of Patent: August 9, 2016
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Yuji Kunimoto, Jun Furuichi, Noriyoshi Shimizu, Naoyuki Koizumi
  • Patent number: 9386695
    Abstract: There is provided a wiring substrate including: a core substrate including: a first core substrate including: a plate-shaped first glass substrate; and a first through electrode formed through the first glass substrate; a second core substrate including: a plate-shaped second glass substrate; and a second through electrode formed through the second glass substrate, wherein a diameter of the second through electrode is different from that of the first through electrode; and an insulating member encapsulating the first and second core substrates, and a wiring layer formed on at least one surface of the core substrate. The first and second core substrates are arranged to be separated from each other when viewed from a top.
    Type: Grant
    Filed: April 3, 2013
    Date of Patent: July 5, 2016
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Jun Furuichi, Akihiko Tateiwa, Naoyuki Koizumi