Patents by Inventor Jun Ho Seo

Jun Ho Seo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170220487
    Abstract: A system-on-chip includes a magnetic random access memory and a security interface. The magnetic random access memory includes a plurality of memory areas, each of the plurality of memory areas having a different security level. The security interface circuitry configured to: identify a memory area from among the plurality of memory areas based on a received memory address associated with a received memory command; determine a security level associated with the identified memory area; and perform a memory operation on received data based on the received memory command and the determined security level.
    Type: Application
    Filed: January 26, 2017
    Publication date: August 3, 2017
    Inventors: YONG-WON JUNG, Sungkyoung KIM, Jun-Ho SEO, Taekkyun SHIN, Sang-hwa JIN
  • Publication number: 20160297902
    Abstract: The present invention relates to a metallocene catalyst system comprising an antistatic agent and a preparation method for polyolefin using the same. The present invention can not only maintain the inherent activity of the catalyst but also minimize reactor fouling and particle agglomeration in the preparation of a polyolefin using the gas-phase polymerization process, thereby allowing to the process to be operational with more stability.
    Type: Application
    Filed: April 2, 2014
    Publication date: October 13, 2016
    Applicant: HANWHA CHEMICAL CORPORATION
    Inventors: Hyun Seung LEE, Jun Ho SEO, Dong Wook JEONG, Eun Jung HEO
  • Publication number: 20160188772
    Abstract: In a method of and computing system for designing or modifying a design of an integrated circuit including a combinational logic and a scan chain, at least one flip-flop satisfying a predetermined condition is detected from among a plurality of flip-flops included in the scan chain by analyzing the combinational logic, and the detected flip-flop is replaced with a settable flip-flop that is set during a scan test for the integrated circuit, a resettable flip-flop that is reset during the scan test, or a settable-and-resettable flip-flop that is set or reset during the scan test.
    Type: Application
    Filed: July 22, 2015
    Publication date: June 30, 2016
    Inventors: Jun-Ho Seo, Taek-Kyun Shin
  • Publication number: 20160148947
    Abstract: A memory device includes a stack including gate electrodes vertically stacked on a substrate and having a vertical hole, an active pillar disposed in the vertical hole and providing a vertical channel, a charge storage section interposed between the active pillar and the gate electrodes, a blocking dielectric interposed between the charge storage section and the gate electrodes, a tunnel dielectric interposed between the charge storage section and the active pillar, insulation filling an inner hole of the active pillar, and a fixed charge layer interposed between the filling insulation and the active pillar. Measures are taken to address phenomena in which current would otherwise be adversely affected near an interface between the vertical channel and the filling insulation.
    Type: Application
    Filed: September 4, 2015
    Publication date: May 26, 2016
    Inventors: Jun-Ho SEO, Daewoong KANG, Hyoje BANG, Changsub LEE, Sunghoi HUR
  • Publication number: 20110248240
    Abstract: The present invention provides a gallium nitride based semiconductor light emitting diode having high transparency, and at the same time, capable of improving contact resistance between a p-type GaN layer and electrode. These objects can be accomplished by forming, on an upper part of a upper clad layer made of p-GaN, an ohmic contact forming layer using MIO, ZIO and CIO (In2O3 including one of Mg, Zn and Cu), and then a transparent electrode layer and a second electrode with ITO thereon, so as to improve contact resistance between the upper clad layer and the second electrode while providing high transparency, wherein the upper clad layer is comprised of a p-type GaN layer and a p-type AlGaN layer sequentially formed on the upper part of the active layer.
    Type: Application
    Filed: June 21, 2011
    Publication date: October 13, 2011
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seung Wan CHAE, Jun Sub KWAK, Hyoun Soo SHIN, Jun Ho SEO
  • Patent number: 7986882
    Abstract: A current pumping circuit includes a voltage detector, a boost circuit, and an output circuit. The voltage detector detects a level of a power voltage and outputs a corresponding control signal. The boost circuit controls the power voltage to be maintained at a predetermined level based on the control signal. The output circuit provides an output signal regardless of the level of the detected voltage. The output circuit may include or be coupled to a data converter, which generates the output signal based on a transmission signal and the boosted power voltage. The transmission signal may be one output from a predetermined control circuit.
    Type: Grant
    Filed: January 15, 2008
    Date of Patent: July 26, 2011
    Assignees: LG Electronics Inc., Eta Chips Co., Ltd
    Inventors: Jun-Ho Seo, Jeong-Woo Lee
  • Patent number: 7645689
    Abstract: A gallium nitride-based light emitting device, and a method for manufacturing the same are disclosed. The light emitting device comprises an n-type GaN-based clad layer, an active layer, a p-type GaN-based clad layer and a p-side electrode sequentially stacked on a substrate. The device further comprises an n-side electrode formed on one region of the n-type GaN-based clad layer, and two or more MIM type tunnel junctions formed on the other regions of the n-type GaN-based clad layer. Each of the MIM type tunnel junctions comprises a lower metal layer formed on the GaN-based clad layer so as to contact the n-type GaN-based clad layer, an insulating film formed on the lower metal layer, and an upper metal layer formed on the insulating film. The device is protected from reverse ESD voltage, so that tolerance to reverse ESD voltage can be enhanced, thereby improving reliability of the device.
    Type: Grant
    Filed: June 22, 2007
    Date of Patent: January 12, 2010
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jun Ho Seo, Suk Kil Yoon, Seung Wan Chae
  • Publication number: 20080286894
    Abstract: A process for preparing a gallium nitride based semiconductor light emitting diode includes the step of: providing a substrate for growing a gallium nitride based semiconductor material; forming a lower clad layer on the substrate using a first conductive gallium nitride based semiconductor material; forming an active layer on the lower conductive clad layer using an undoped gallium nitride based semiconductor material; forming an upper clad layer on the active layer using a second conductive gallium nitride based semiconductor material; removing at least a portion of the upper clad layer and active layer at a predetermined region so as to expose the corresponding portion of the lower clad layer; and forming, on the upper surface of the upper clad layer, an ohmic contact forming layer made of In2O3 including at least one of Zn, Mg and Cu.
    Type: Application
    Filed: July 1, 2008
    Publication date: November 20, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seung Wan CHAE, Jun Sub KWAK, Hyoun Soo SHIN, Jun Ho SEO
  • Publication number: 20080260387
    Abstract: The present invention relates to a remote control IC having a circuit for pumping up current of an output port and a remote controller implemented to be capable of operating with one battery of about 1.5V using the IC. In the remote controller, an infrared LED emits light through the remote control IC, so that signals are transmitted to devices to be controlled such as a television set. In order to perform all functions normally even at low voltage and particularly to secure a sufficient transmission distance by driving the infrared LED, the present invention implements a remote controller comprising a remote control IC having a circuit for pumping up output current of an output port, which needs high output current, even at low voltage, and a battery of about 1.
    Type: Application
    Filed: January 15, 2008
    Publication date: October 23, 2008
    Inventors: Jun-Ho SEO, Jeong-Woo LEE
  • Patent number: 7250633
    Abstract: A gallium nitride-based light emitting device, and a method for manufacturing the same are disclosed. The light emitting device comprises an n-type GaN-based clad layer, an active layer, a p-type GaN-based clad layer and a p-side electrode sequentially stacked on a substrate. The device further comprises an n-side electrode formed on one region of the n-type GaN-based clad layer, and two or more MIM type tunnel junctions formed on the other regions of the n-type GaN-based clad layer. Each of the MIM type tunnel junctions comprises a lower metal layer formed on the GaN-based clad layer so as to contact the n-type GaN-based clad layer, an insulating film formed on the lower metal layer, and an upper metal layer formed on the insulating film. The device is protected from reverse ESD voltage, so that tolerance to reverse ESD voltage can be enhanced, thereby improving reliability of the device.
    Type: Grant
    Filed: September 8, 2005
    Date of Patent: July 31, 2007
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jun Ho Seo, Suk Kil Yoon, Seung Wan Chae
  • Publication number: 20060292804
    Abstract: The invention relates to a nitride semiconductor LED and a fabrication method thereof. In the LED, a first nitride semiconductor layer, an active region a second nitride semiconductor layer of a light emitting structure are formed in their order on a transparent substrate. A dielectric mirror layer is formed on the underside of the substrate, and has at least a pair of alternating first dielectric film of a first refractivity and a second dielectric film of a second refractivity larger than the first refractivity. A lateral insulation layer is formed on the side of the substrate and the light emitting structure. The LED of the invention effectively collimate undesirably-directed light rays, which may be otherwise extinguished, to maximize luminous efficiency, and are protected by the dielectric mirror layer formed on the side thereof to remarkably improve ESD characteristics.
    Type: Application
    Filed: July 20, 2006
    Publication date: December 28, 2006
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jun Ho SEO, Jong Ho JANG
  • Patent number: 7148514
    Abstract: The invention relates to a nitride semiconductor LED and a fabrication method thereof. In the LED, a first nitride semiconductor layer, an active region a second nitride semiconductor layer of a light emitting structure are formed in their order on a transparent substrate. A dielectric mirror layer is formed on the underside of the substrate, and has at least a pair of alternating first dielectric film of a first refractivity and a second dielectric film of a second refractivity larger than the first refractivity. A lateral insulation layer is formed on the side of the substrate and the light emitting structure. The LED of the invention effectively collimate undesirably-directed light rays, which may be otherwise extinguished, to maximize luminous efficiency, and are protected by the dielectric mirror layer formed on the side thereof to remarkably improve ESD characteristics.
    Type: Grant
    Filed: June 18, 2004
    Date of Patent: December 12, 2006
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jun Ho Seo, Jong Ho Jang
  • Patent number: 7015731
    Abstract: A CMOS output buffer circuit comprises an input unit, a compensation control unit, a first switching unit and a second switching unit. The input unit outputs a data signal in response to a stop signal for determining transmission of the data signal. The compensation control unit determines a power voltage level with reference to the stop signal and the data signal when the data signal is transmitted, and outputs a plurality of compensating signals depending on the power voltage level. The first switching unit including a driving unit driven by the data signal outputted from the input unit and a compensation driving unit driven by combination of the data signal and the plurality of compensating signals compensates change of the power voltage level to output current. The second switching unit operated complementarily with the first switching unit outputs current.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: March 21, 2006
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jun Ho Seo
  • Patent number: 6741136
    Abstract: A circuit for preventing a system malfunction in a semiconductor memory includes an oscillating circuit generating an oscillating clock signal by receiving an oscillating signal, a system clock generator generating a system clock signal by receiving the oscillating clock signal, and a malfunction preventing unit resetting an inner system by sensing an amplitude variation of the oscillating signal wherein the amplitude variation is caused by noise.
    Type: Grant
    Filed: May 23, 2002
    Date of Patent: May 25, 2004
    Assignee: Hynix Semiconductor, Inc.
    Inventor: Jun Ho Seo
  • Publication number: 20020175773
    Abstract: Disclosed is a circuit for preventing system malfunction in a semiconductor memory. The present invention includes an oscillating circuit generating an oscillating clock signal by receiving an oscillating signal, a system clock generator generating a system clock signal by receiving the oscillating clock signal, and a malfunction preventing unit resetting an inner system by sensing an amplitude variation of the oscillating signal wherein the amplitude variation is caused by noise.
    Type: Application
    Filed: May 23, 2002
    Publication date: November 28, 2002
    Inventor: Jun Ho Seo