Abstract: Provided an apparatus and method for controlling luminance of a display device. The apparatus includes an analog digital converter (ADC), a video processor, a control unit, and a display unit. The ADC converts input image data into a digital signal. The video processor converts the digital signal output from the ADC into a format suitable for a display module. The control unit receives the formatted signal from the video processor and converts a luminance level of the formatted signal into modified luminance levels so as to reduce differences between output luminance levels across pixel regions of the display module. The display unit displays the input image data using the formatted signal according to the modified luminance levels.

Abstract: Display device technology, in which an illumination sensor senses illumination of surroundings of a location where a display device is installed and image signals to be displayed are received. An average picture level of a received signal is detected and a controller controls brightness of a backlight associated with the display device based on the illumination sensed by the illumination sensor and the detected average pixel value.

Abstract: We describe a semiconductor memory device having a precharge control circuit and an associated method for precharging the same. A semiconductor memory device having a series of circuits for writing data to memory cells includes an input and output line for transferring data to be written to each of the memory cells. A precharge control circuit is adapted to generate a precharge control signal for controlling a precharge disable state of the input and output line after application of a first write command. The disable state of the precharge control signal is maintained even after application of a second write command when performing a continuous write operation responsive to the second write command application without other commands applied subsequent to the first write command application. Avoiding precharging the input and output line in a continuous write operation, reduces current consumption.

Abstract: An internal supply voltage generation circuit is provided that is within a semiconductor memory device, and that is configured to generate an internal supply voltage to a memory array in the semiconductor memory device. The internal supply voltage generation circuit includes an internal driving unit, an internal transmission unit, and an internal sensing unit. The internal driving unit is configured to generate a driving current and a preliminary voltage responsive to an external supply voltage that is supplied from external to the semiconductor memory device, and it varies a magnitude of the driving current responsive to a driving control signal. The internal transmission unit is configured to generate the internal supply voltage responsive to the preliminary voltage from the internal driving unit, and to vary a level of the internal supply voltage to be at least a defined voltage difference less than a boosted voltage. The boosted voltage is greater than the external supply voltage.

Abstract: We describe a semiconductor memory device having a precharge control circuit and an associated method for precharging the same. A semiconductor memory device having a series of circuits for writing data to memory cells includes an input and output line for transferring data to be written to each of the memory cells. A precharge control circuit is adapted to generate a precharge control signal for controlling a precharge disable state of the input and output line after application of a first write command. The disable state of the precharge control signal is maintained even after application of a second write command when performing a continuous write operation responsive to the second write command application without other commands applied subsequent to the first write command application. Avoiding precharging the input and output line in a continuous write operation, reduces current consumption.

Abstract: An internal supply voltage generation circuit is provided that is within a semiconductor memory device, and that is configured to generate an internal supply voltage to a memory array in the semiconductor memory device. The internal supply voltage generation circuit includes an internal driving unit, an internal transmission unit, and an internal sensing unit. The internal driving unit is configured to generate a driving current and a preliminary voltage responsive to an external supply voltage that is supplied from external to the semiconductor memory device, and it varies a magnitude of the driving current responsive to a driving control signal. The internal transmission unit is configured to generate the internal supply voltage responsive to the preliminary voltage from the internal driving unit, and to vary a level of the internal supply voltage to be at least a defined voltage difference less than a boosted voltage. The boosted voltage is greater than the external supply voltage.