Abstract: In a laminated film according to an embodiment, an elastic layer containing polyether-block-amide and a hard coating-treated base film are laminated. Due to the layer configuration in which different materials are compounded, the surface hardness and restoration properties and elasticity can be improved at the same time, and also, excellent optical properties can be implemented.

Abstract: A lamination film according to one implemented embodiment comprises: a base film; an elastic layer comprising polyether-block-amide; and a primer layer interposed between the base film and the elastic layer, and thus not only has flexibility but also has adhesiveness between heterogeneous films, thereby exhibiting folding durability

Abstract: The present disclosure relates to a polyester-based resin composition and a molded article manufactured using the same. More particularly, the present disclosure relates to a polyester-based resin composition including 93 to 99.5% by weight of a polybutylene terephthalate resin; 0.1 to 3% by weight of a polar group-containing lubricant; and 0.1 to 2% by weight of an antioxidant and a molded article manufactured using the polyester-based resin composition.

Abstract: A semiconductor device may include gate structures spaced apart from each other on an active pattern, where each of the gate structures includes gate spacers on sidewalls of a gate electrode, source/drain patterns between the gate structures, source/drain contacts on the source/drain patterns, and contact silicide films between the source/drain contacts and the source/drain patterns. Outer surfaces of the contact silicide films may contact the source/drain patterns and inner surfaces of the contact silicide films may contact the source/drain contacts. A width in a first direction of the contact silicide films may be maximum at the uppermost portions of outer surfaces of the contact silicide films. Parts of the outer surfaces of the contact silicide films may contact the gate spacers. The width in the first direction of the uppermost portions of the contact silicide films may be equal to a width in the first direction of the source/drain contacts.

Abstract: A semiconductor device includes an active pattern extending in a first direction, a plurality of gate structures on the active pattern spaced in the first direction, and including a gate electrode extending in a second direction, a source/drain pattern between adjacent gate structures, a silicide mask pattern on the source/drain pattern, an upper surface of the silicide mask pattern being lower than an upper surface of the gate electrode, a source/drain contact on the source/drain pattern connected to the source/drain pattern, and a contact silicide film between the source/drain contact and the source/drain pattern in contact with a bottom surface of the silicide mask pattern, wherein a height from a lowermost part of the source/drain pattern to a lowermost part of the source/drain contact is smaller than a height from the lowermost part of the source/drain pattern to the bottom surface of the silicide mask pattern.

Abstract: A semiconductor device includes a substrate including an upper surface and a lower surface that are opposite to each other in a first direction, an active pattern which is on the upper surface of the substrate and extends in a second direction, a gate electrode which is on the active pattern and extends in a third direction, a first source/drain pattern which is connected to the active pattern on the upper surface of the substrate, and includes a lower epitaxial region and an upper epitaxial region, the upper epitaxial region including an epitaxial recess, and the lower epitaxial region being inside the epitaxial recess, a first source/drain contact, which is connected to the first source/drain pattern and extends into the substrate, and a contact silicide layer, which is between the first source/drain contact and the first source/drain pattern and contacts the lower epitaxial region.

Abstract: A semiconductor device includes an active pattern extending in a first direction, a plurality of gate structures on the active pattern spaced in the first direction, and including a gate electrode extending in a second direction, a source/drain pattern between adjacent gate structures, a silicide mask pattern on the source/drain pattern, an upper surface of the silicide mask pattern being lower than an upper surface of the gate electrode, a source/drain contact on the source/drain pattern connected to the source/drain pattern, and a contact silicide film between the source/drain contact and the source/drain pattern in contact with a bottom surface of the silicide mask pattern, wherein a height from a lowermost part of the source/drain pattern to a lowermost part of the source/drain contact is smaller than a height from the lowermost part of the source/drain pattern to the bottom surface of the silicide mask pattern.

Abstract: A semiconductor device capable of improving a device performance and a reliability is provided. The semiconductor device comprising a gate structure including a gate electrode on a substrate, a source/drain pattern on a side face of the gate electrode, on the substrate and, a source/drain contact connected to the source/drain pattern, on the source/drain pattern, a gate contact connected to the gate electrode, on the gate electrode, and a wiring structure connected to the source/drain contact and the gate contact, on the source/drain contact and the gate contact, wherein the wiring structure includes a first via plug, a second via plug, and a wiring line connected to the first via plug and the second via plug, the first via plug has a single conductive film structure, and the second via plug includes a lower via filling film, and an upper via filling film on the lower via filling film.

Abstract: A multilayer sheet including a transparent film with a total light transmittance of 85% or more in accordance with ISO 13468, a coating layer disposed on a first surface of the transparent film, and an elastic film disposed below a second surface of the transparent film is disclosed. The Martens hardness HM measured on a surface of the coating layer is 180 N/mm2 or more.

Abstract: A multilayer sheet including: a transparent film with a total light transmittance of 85% or more in accordance with ISO 13468; a coating layer disposed on a first surface of the transparent film; and an adhesive layer disposed on a second surface, opposite to the first surface, of the transparent film, wherein a thickness of the adhesive layer after being cured is two times or less of a thickness of the coating layer, is disclosed.

Abstract: The composite film according to an embodiment adopts an acrylate-based binder and an acrylamide-based monomer in a single functional layer for antistatic, antifouling, and chemical resistant functions to exhibit flexible characteristics without deteriorating the adhesive strength to a substrate; thus, it can be applied as a cover window of a flexible display device.

Abstract: In the composite film according to the embodiment, an elastic layer in which its modulus change characteristics with respect to temperature have been adjusted to a certain range is coated onto the opposite side to a hard coating layer; thus, it is possible to enhance the surface hardness and elastic recovery characteristics of the hard coating layer. Thus, it can be advantageously applied as a cover window of a flexible display device.

Abstract: A semiconductor device capable of improving a device performance and a reliability is provided. The semiconductor device comprising a gate structure including a gate electrode on a substrate, a source/drain pattern on a side face of the gate electrode, on the substrate and, a source/drain contact connected to the source/drain pattern, on the source/drain pattern, a gate contact connected to the gate electrode, on the gate electrode, and a wiring structure connected to the source/drain contact and the gate contact, on the source/drain contact and the gate contact, wherein the wiring structure includes a first via plug, a second via plug, and a wiring line connected to the first via plug and the second via plug, the first via plug has a single conductive film structure, and the second via plug includes a lower via filling film, and an upper via filling film on the lower via filling film.

Abstract: The present disclosure relates to a polyester-based resin composition and a molded article manufactured using the same. More particularly, the present disclosure relates to a polyester-based resin composition including 93 to 99.5% by weight of a polybutylene terephthalate resin; 0.1 to 3% by weight of a polar group-containing lubricant; and 0.1 to 2% by weight of an antioxidant and a molded article manufactured using the polyester-based resin composition.

Abstract: A substrate processing apparatus is provided. The substrate processing apparatus includes a substrate chuck, a shower head structure over the substrate chuck, and a gas distribution apparatus connected to the shower head structure. The gas distribution apparatus includes a dispersion container including a first dispersion space and a gas inlet section on the dispersion container. The gas inlet section includes a first inlet pipe including a first inlet path fluidly connected to the first dispersion space and a second inlet pipe including a second inlet path fluidly connected to the first dispersion space. The second inlet pipe surrounds at least a portion of a sidewall of the first inlet pipe.

Abstract: A substrate processing apparatus is provided. The substrate processing apparatus includes a substrate chuck, a shower head structure over the substrate chuck, and a gas distribution apparatus connected to the shower head structure. The gas distribution apparatus includes a dispersion container including a first dispersion space and a gas inlet section on the dispersion container. The gas inlet section includes a first inlet pipe including a first inlet path fluidly connected to the first dispersion space and a second inlet pipe including a second inlet path fluidly connected to the first dispersion space. The second inlet pipe surrounds at least a portion of a sidewall of the first inlet pipe.

Abstract: A semiconductor device includes an active fin partially protruding from an isolation pattern on a substrate, a gate structure on the active fin, a source/drain layer on a portion of the active fin adjacent to the gate structure, a source/drain layer on a portion of the active fin adjacent to the gate structure, a metal silicide pattern on the source/drain layer, and a plug on the metal silicide pattern. The plug includes a second metal pattern, a metal nitride pattern contacting an upper surface of the metal silicide pattern and covering a bottom and a sidewall of the second metal pattern, and a first metal pattern on the metal silicide pattern, the first metal pattern covering an outer sidewall of the metal nitride pattern. A nitrogen concentration of the first metal pattern gradually decreases according to a distance from the outer sidewall of the metal nitride pattern.

Abstract: The present invention relates to a method for generating a reference signal to drive a display apparatus. A method according to the present invention may comprise generating a reference signal having a training pattern being repeated with a periodicity of two clock terms (CTs); and transmitting the reference signal to a phase locked loop (PLL). Each CT has a single embedded clock bit (CB) and a plurality of data bits, and the reference signal has a rising edge at a start point of a first CB corresponding to a first unit interval (UI) of a first CT, and a rising edge at an end point of a second CB corresponding to a first UI of a second CT. According to exemplary embodiments of the present disclosure, energy consumption and EMI effects can be remarkably reduced, and a complexity of PLL can be reduced.

Abstract: A semiconductor device includes an active fin partially protruding from an isolation pattern on a substrate, a gate structure on the active fin, a source/drain layer on a portion of the active fin adjacent to the gate structure, a source/drain layer on a portion of the active fin adjacent to the gate structure, a metal silicide pattern on the source/drain layer, and a plug on the metal silicide pattern. The plug includes a second metal pattern, a metal nitride pattern contacting an upper surface of the metal silicide pattern and covering a bottom and a sidewall of the second metal pattern, and a first metal pattern on the metal silicide pattern, the first metal pattern covering an outer sidewall of the metal nitride pattern. A nitrogen concentration of the first metal pattern gradually decreases according to a distance from the outer sidewall of the metal nitride pattern.

Abstract: The present invention relates to a method for generating a reference signal to drive a display apparatus. A method according to the present invention may comprise generating a reference signal having a training pattern being repeated with a periodicity of two clock terms (CTs); and transmitting the reference signal to a phase locked loop (PLL). Each CT has a single embedded clock bit (CB) and a plurality of data bits, and the reference signal has a rising edge at a start point of a first CB corresponding to a first unit interval (UI) of a first CT, and a rising edge at an end point of a second CB corresponding to a first UI of a second CT. According to exemplary embodiments of the present disclosure, energy consumption and EMI effects can be remarkably reduced, and a complexity of PLL can be reduced.