Patents by Inventor Jun Ni

Jun Ni has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090033418
    Abstract: A training sequence and digital linearization process for a power amplifier are provided. In particular, a system for maintaining linear operation of an amplifier is includes an estimation component configured to determine compensation coefficients. The system further includes a digital pre-distorter configured to compensate for non-linear operation of the amplifier based on the compensation coefficients. The compensation coefficients are determined based on a training sequence signal having a time synchronization portion and a linearization sequence portion.
    Type: Application
    Filed: August 3, 2007
    Publication date: February 5, 2009
    Inventors: Daniel Wayne Ericson, Jun Ni
  • Publication number: 20080024055
    Abstract: Transparent conducting oxide thin films having a reduced indium content and/or an increased tin content are provided. In addition, processes for producing the same, precursors for producing the same, and transparent electroconductive substrate for display panels and organic electroluminescence devices, both including the transparent conducting oxide thin films, are provided.
    Type: Application
    Filed: March 22, 2007
    Publication date: January 31, 2008
    Inventors: Tobin Marks, Jun Ni, Anchuan Wang, Yu Yang, Andrew Metz, Shu Jin, Lian Wang
  • Publication number: 20070205184
    Abstract: A direct-metal deposition (DMD) processing stage and a 5DOF (degree of freedom) dry micro-EDM (mEDM) stage are integrated to provide the submicron scale resolution necessary for the ultra-precision processing of work pieces. The DMD processing stage includes optical feedback for dimensional control utilizing a high-power, fiber-coupled diode laser with fast response time and small beam parameter product. The electrical discharge machining (EDM) stage is a dry EDM stage using an inert gas with appropriate dielectric properties to perform the surface finishing operations. The system further includes one or more surface treatment operations to obtain a desired level of surface hardness or wear resistance and/or to minimize the distortion induced in treating the surface.
    Type: Application
    Filed: January 30, 2007
    Publication date: September 6, 2007
    Inventors: Jyoti Mazumder, Jun Ni, Albert Shih
  • Publication number: 20070079041
    Abstract: A multiprocessor system according to this invention comprises a main board, an expansion board, and at least a connection card. The main board comprises a plurality of first processors, such as four (4) CPUs, and at least a first socket. The expansion board comprises a plurality of second processors, such as four (4) CPUs, and at least a second socket. The plurality of first processors selectively communicates with each other by way of a plurality of first processor buses, which may be dual unidirectional point-to-point buses such as HT buses. The plurality of second processors selectively communicates with each other by way of a plurality of second processor buses, which may be dual unidirectional point-to-point buses such as HT bus. The connection card(s) electronically connect(s) to the first socket(s) and the second socket(s) for providing connection between at least one of the first processor of the main board and at least one of the second processor of the expansion board.
    Type: Application
    Filed: February 3, 2006
    Publication date: April 5, 2007
    Applicant: TYAN COMPUTER CORP.
    Inventors: Shan-Kai Yang, Shi-Jun Ni, Jian Shen, Lei Ding, Hai-Ming Ding
  • Publication number: 20070079046
    Abstract: A multiprocessor system is disclosed, which comprises a plurality of processor unit, such as eight processor units, and a plurality of interconnection bus that may be a dual unidirectional point-to-point bus. Every interconnection bus connects predetermined two of the processor units. Particularly, at least two of the interconnection buses are crossed to each other.
    Type: Application
    Filed: February 3, 2006
    Publication date: April 5, 2007
    Applicant: TYAN COMPUTER CORP.
    Inventors: Shan-Kai Yang, Shi-Jun Ni, Jian Shen, Lei Ding, Hai-Ming Ding, Fang Yuan
  • Publication number: 20030118865
    Abstract: Transparent conducting oxide compositions having enhanced work function, for use with anode structures and light-emitting diode devices.
    Type: Application
    Filed: August 27, 2002
    Publication date: June 26, 2003
    Inventors: Tobin J. Marks, He Yan, Jun Ni, Ji Cul, Anchuan Wang, Nikki L. Edleman
  • Patent number: 5418611
    Abstract: A high resolution, compact size and low cost multi-degree-of-freedom geometric error measurement system for simultaneously measuring four geometric errors, horizontal straightness, vertical straightness, pitch and yaw. The pitch and yaw error measurements are based on a new method of angle measurement in turn based on the internal reflection effect at an air/glass boundary. The method uses a differential detection scheme to largely reduce the inherent non-linearity of the reflectance versus the angle of incidence in internal reflection. With non-linearity reduced, the displacement of the angle of incidence can be determined accurately by measuring the reflectance. The resolution and measurement range are determined by the initial angle of incidence, the polarization state of light, and the number of reflections. Compared with interferometers and autocollimators, this method has the advantage of a simple sensor design for applications ranging from very wide measurement range to extremely high resolution.
    Type: Grant
    Filed: June 14, 1993
    Date of Patent: May 23, 1995
    Inventors: Peisen Huang, Jun Ni