Abstract: A printed wired board is provided, in which an area for extracting liens for plating of the printed wired board is made small and at the same time the number of the extracting lines for plating within a packaging area is made small, resulting in an improvement of wiring efficiency. The circuit pattern formed on an insulating film has window portion and is not formed toward the periphery of the insulating film, and a bonding pad is electroplated, where the bonding pads are to be connected with a center-pad of a semiconductor by a bonding wire through the window portion. Accordingly, even when the shrinkage of semiconductor packages or narrow ball pitch is forwarded, the degree of freedom of drawing of circuit pattern in the printed wired board can be made large.

Abstract: A fabricating method of semiconductor devices in which pads of a semiconductor chip of center-pad structure and bonding pads of a printed wired board are connected electrically. In an area of the printed wired board corresponding to the pads of the chip an extracting line for plating is formed, and circuit pattern electrically connecting the extracting line, terminal portions for external input/output and bonding pads is formed. The steps of electroplating the terminal portions and the bonding pads while supplying electricity from the extracting line, and removing the area of the printed wired board corresponding to the pads of the chip together with the extracting line to form a window portion are further comprised. A fabricating method of semiconductor devices in which to pads of a semiconductor chip of center-pad structure leads extending from circuit pattern of a printed wired board is connected.

Abstract: A fabricating method of semiconductor devices in which pads of a semiconductor chip of center-pad structure and bonding pads of a printed wired board are connected electrically. In an area of the printed wired board corresponding to the pads of the chip an extracting line for plating is formed, and circuit pattern electrically connecting the extracting line, terminal portions for external input/output and bonding pads is formed. The steps of electroplating the terminal portions and the bonding pads while supplying electricity from the extracting line, and removing the area of the printed wired board corresponding to the pads of the chip together with the extracting line to form a window portion are further comprised. A fabricating method of semiconductor devices in which to pads of a semiconductor chip of center-pad structure leads extending from circuit pattern of a printed wired board is connected.

Abstract: A stacked semiconductor device includes a plurality of stacked wiring substrates each having connection electrodes and wires connected to the connection electrodes and each mounted with a semiconductor device, a plurality of conductive via boards each interposed between adjacent two wiring substrates and having an opening for enclosing the semiconductor device, an uppermost wiring substrate formed on the top of the stacked wiring substrates and having wires connected to the connection electrodes, and a lowermost wiring substrate formed under the stacked wiring substrates and having wires connected to the connection electrodes, wherein heat radiation/shield conductive layers are formed on the uppermost and lowermost wiring substrates.

Abstract: A printed wired board is provided, in which an area for extracting lines for plating of the printed wired board is made small and at the same time the number of the extracting lines for plating within a packaging area is made small, resulting in an improvement of wiring efficiency. The circuit pattern formed on an insulating film has a window portion and is not formed toward the periphery of the insulating film, and a bonding pad is electroplated, where the bonding pads are to be connected with a center-pad of a semiconductor by a bonding wire through the window portion. Accordingly, even when the shrinkage of semiconductor packages or narrow ball pitch is forwarded, the degree of freedom of drawing of circuit pattern in the printed wired board can be made large.

Abstract: A semiconductor device with a thickness of 1 mm or less is disclosed, that comprises a frame plate main body with a thickness in the range from 0.1 mm to 0.25 mm, a semiconductor pellet disposed on a first surface of the frame plate main body and with a thickness in the range from 0.2 mm to 0.3 mm, an external connection lead, one end thereof being connected to a peripheral portion of the first surface of the frame plate main body, the other end thereof extending to the outside of the frame plate main body, a bonding wire for electrically connecting an electrode of the semiconductor pellet and a connection portion of the end of the external connection lead, and a sealing resin layer for covering and sealing at least a region including the semiconductor pellet, the bonding wire, and a connection portion.

Abstract: A stacked semiconductor device includes a plurality of stacked wiring substrates each having connection electrodes and wires connected to the connection electrodes and each mounted with a semiconductor device, a plurality of conductive via boards each interposed between adjacent two wiring substrates and having an opening for enclosing the semiconductor device, an uppermost wiring substrate formed on the top of the stacked wiring substrates and having wires connected to the connection electrodes, and a lowermost wiring substrate formed under the stacked wiring substrates and having wires connected to the connection electrodes, wherein heat radiation/shield conductive layers are formed on the uppermost and lowermost wiring substrates.

Abstract: In the substrate for a semiconductor device of the present invention, a second substrate having an opening portion is adhered on a first flat substrate. The opening portion makes the surface of the first substrate exposed and contains a semiconductor chip. Chip connection terminals to be connected to the semiconductor chip are provided on the second substrate. External connection terminals are provided on the back surface of the first substrate. The chip connection terminals and the external connection terminals are connected with each other by a wiring pattern passing through through-holes formed and penetrating both the first and second substrate.

Abstract: A semiconductor device with a thickness of 1 mm or less is disclosed, that comprises a frame plate main body with a thickness in the range from 0.1 mm to 0.25 mm, a semiconductor pellet disposed on a first surface of the frame plate main body and with a thickness in the range from 0.2 mm to 0.3 mm, an external connection lead, one end thereof being connected to a peripheral portion of the first surface of the frame plate main body, the other end thereof extending to the outside of the frame plate main body, a bonding wire for electrically connecting an electrode of the semiconductor pellet and a connection portion of the end of the external connection lead, and a sealing resin layer for covering and sealing at least a region including the semiconductor pellet, the bonding wire, and a connection portion.

Abstract: A semiconductor package having a board, at least one semiconductor chip, and flat type external connecting terminals, the board having a wiring circuit including connecting portions on a first main surface, the semiconductor being mounted on the first main surface, the flat type external connecting terminals being electrically connected to the semiconductor chip and formed on a second main surface of the board, wherein the flat type external connecting terminals are disposed in such a manner that any straight line which is arbitrarily drawn across the surface of a region to form the flat type external connecting terminals of the board runs on at least one of the flat type external connecting terminals.

Abstract: A one-sided sealed type semiconductor device comprising a substrate proper for a one-sided resin mold provided on the first main surface thereof with a wiring circuit including connection parts for semiconductor elements and on the second main surface thereof with flat type external connection terminals led out thereon via a through hole, semiconductor elements set in place and packaged in predetermined areas of the first main surface of the substrate proper, a transfer mold resin layer for sealing solely the surface having the semiconductor elements packaged thereon, and a metallic layer formed on the first main surface independently of wiring circuit and outside the area having the wiring circuit.

Abstract: A method of manufacturing a semiconductor device mountable in a module supporter. According to the present invention, a semiconductor substrate has a plurality of semiconductor modules, where each semiconductor module has a semiconductor chip covered with a protective material, such as resin, on a first surface and a connector formed on a second surface which is electrically connected to the semiconductor chip. An adhesive layer is applied to the first surface of the substrate. The adhesive layer has a plurality of opening portions arranged to positionally correspond to the plurality of semiconductor modules on the substrate. The substrate and the adhesive layer are cut into individual substrates each having the semiconductor chip so that each semiconductor module has the adhesive layer on a periphery of the protective material. Individual substrates containing a semiconductor module are bonded to the supporter having a concave portion for holding the semiconductor module.

Abstract: A one-sided sealed type semiconductor device comprising a substrate proper for a one-sided resin mold provided on the first main surface thereof with a wiring circuit including connection parts for semiconductor elements and on the second main surface thereof with flat type external connection terminals led out thereon via a through hole, semiconductor elements set in place and packaged in predetermined areas of the first main surface of the substrate proper, a transfer mold resin layer for sealing solely the surface having the semiconductor elements packaged thereon, and a metallic layer formed on the first main surface independently of wiring circuit and outside the area having the wiring circuit.