Patents by Inventor Jun Ohno
Jun Ohno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240003028Abstract: An alkaline water electrolysis system (70) includes a rectifier (74) that is connected to a fluctuating power source and converts an AC power to a DC power; a plurality of bipolar electrolyzers (50_1) to (50_N) that generate hydrogen and oxygen through electrolysis of water using an electrolytic solution based on a predetermined DC voltage supplied from the rectifier 74; gas-liquid separation tanks (72) that are connected to the plurality of bipolar electrolyzers (50_1) to (50_N), and separate the hydrogen and the oxygen from the electrolytic solution and store the electrolytic solution; and open/close valves (62) provided between the gas-liquid separation tanks (72) and the bipolar electrolyzers (50).Type: ApplicationFiled: December 7, 2021Publication date: January 4, 2024Applicant: ASAHI KASEI KABUSHIKI KAISHAInventors: Yousuke UCHINO, Jun OHNO
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Publication number: 20230227985Abstract: An object of the present disclosure is to suppress mixing of gases generated during an operation when supply of electric power is stopped, to thereby shorten the time required for restarting after the electric power is stopped. An electrolysis system of the present disclosure includes an electrolyzer including an electrolytic cell in which an anode and a cathode are overlapped with each other having a diaphragm interposed therebetween, and a liquid surface level control unit which is operated when an electric conduction to the electrolyzer is stopped to adjust a liquid surface level of an electrolytic solution in the electrolytic cell.Type: ApplicationFiled: April 7, 2021Publication date: July 20, 2023Applicant: ASAHI KASEI KABUSHIKI KAISHAInventors: Yasuhiro FUJITA, Hisanao AOKI, Yousuke UCHINO, Jun OHNO
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Patent number: 11643741Abstract: A method of producing hydrogen using a water electrolysis system comprising at least an electrolyzer and a purifier for removing oxygen in a hydrogen gas generated in the electrolyzer. The method includes controlling a concentration of oxygen in a hydrogen gas to be introduced to the purifier to be constantly less than 0.5 volume % when the electrolyzer is operated at least under a current density of 0.5 kA/m2 or greater; and further controlling Ob/Oa to be less than 10.0, where Oa represents the concentration of oxygen in the hydrogen gas to be introduced to the purifier when the electrolyzer is operated under a current density of 2.0 kA/m2, and Ob represents the concentration of oxygen in the hydrogen gas to be introduced to the purifier when the electrolyzer is operated under a current density of 0.2 kA/m2.Type: GrantFiled: October 21, 2019Date of Patent: May 9, 2023Assignee: ASAHI KASEI KABUSHIKI KAISHAInventors: Yousuke Uchino, Norikazu Fujimoto, Jun Ohno
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Publication number: 20220316081Abstract: Provided is a method of operating an electrolysis apparatus that can inhibit electrode degradation under a variable power supply. The method of operating an electrolysis apparatus includes: an energization step in which electrolysis of electrolyte is performed in an anode compartment including an anode and a cathode compartment including a cathode that are partitioned from each other by a membrane; a suspension step in which electrolysis of electrolyte in the anode compartment and the cathode compartment is suspended; and a discharge step of, in the suspension step, electrically connecting an electrolyzer of the electrolysis apparatus to an external load and adjusting a cell voltage to 0.1 V or less in 5 hours or less.Type: ApplicationFiled: April 22, 2020Publication date: October 6, 2022Applicant: ASAHI KASEI KABUSHIKI KAISHAInventors: Jun OHNO, Yousuke UCHINO
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Publication number: 20220106695Abstract: A method of producing hydrogen using a water electrolysis system comprising at least an electrolyzer and a purifier for removing oxygen in a hydrogen gas generated in the electrolyzer. The method includes controlling a concentration of oxygen in a hydrogen gas to be introduced to the purifier to be constantly less than 0.5 volume % when the electrolyzer is operated at least under a current density of 0.5 kA/m2 or greater; and further controlling Ob/Oa to be less than 10.0, where Oa represents the concentration of oxygen in the hydrogen gas to be introduced to the purifier when the electrolyzer is operated under a current density of 2.0 kA/m2, and Ob represents the concentration of oxygen in the hydrogen gas to be introduced to the purifier when the electrolyzer is operated under a current density of 0.2 kA/m2.Type: ApplicationFiled: October 21, 2019Publication date: April 7, 2022Applicant: ASAHI KASEI KABUSHIKI KAISHAInventors: Yousuke UCHINO, Norikazu FUJIMOTO, Jun OHNO
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Patent number: 10166313Abstract: A bone-repairing agent excellent in workability and applicability to clinical surgical techniques and having a drastically enhanced bone formation rate, obtained by including an elastin hydrolysate in a complex of DNA and at least one selected from the group consisting of protamine, a protamine derivative, and a protamine hydrolysate can be provided. A medical or dental material for bone formation using this bone-repairing agent can be provided.Type: GrantFiled: September 25, 2013Date of Patent: January 1, 2019Assignee: MARUHA NICHIRO CORPORATIONInventors: Tadao Fukushima, Jun Yamazaki, Jun Ohno, Masako Toda, Makoto Mitarai, Keishi Iohara
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Publication number: 20160235888Abstract: A bone-repairing agent excellent in workability and applicability to clinical surgical techniques and having a drastically enhanced bone formation rate, obtained by including an elastin hydrolysate in a complex of DNA and at least one selected from the group consisting of protamine, a protamine derivative, and a protamine hydrolysate can be provided. A medical or dental material for bone formation using this bone-repairing agent can be provided.Type: ApplicationFiled: September 25, 2013Publication date: August 18, 2016Applicant: MARUHA NICHIRO CORPORATIONInventors: Tadao FUKUSHIMA, Jun YAMAZAKI, Jun OHNO, Masako TODA, Makoto MITARAI, Keishi IOHARA
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Patent number: 8111575Abstract: There is provided a semiconductor device including: a temperature sensor detecting temperature; an inner circuit operating when supplied with a power supply voltage from a power supply line; a switch connected between the power supply line and the inner circuit; and a control circuit performing control in which, in a case where the temperature detected by the temperature sensor is higher than a threshold value, the switch is turned on when the inner circuit is in operation and the switch is turned off when the inner circuit is in non-operation, and in a case where the temperature detected by the temperature sensor is lower than the threshold value, the switch is turned on when the inner circuit is in operation and in non-operation.Type: GrantFiled: January 8, 2010Date of Patent: February 7, 2012Assignee: Fujitsu Semiconductor LimitedInventors: Kaoru Mori, Shinya Fujioka, Yoshitaka Takahashi, Jun Ohno, Akihiro Funyu, Shinichiro Suzuki
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Patent number: 8089720Abstract: A hard-disk drive. The hard-disk drive includes a magnetic-recording disk in which tracks adjacent to each other are magnetically separated, a spindle motor which drives the magnetic-recording disk, a magnetic-recording head equipped with write element and read element, an actuator for positioning the magnetic-recording head on a predetermined track on the magnetic-recording disk, and a control unit. The control unit is configured to store information about an over-write-only track that is provided for a plurality of tracks including n consecutive tracks in at least a partial radial area of the magnetic-recording disk and an offset amount. In a radial area of the magnetic disk where the over-write-only track is located, the control unit is configured to record with an offset by an offset amount from a center of a track toward the over-write-only track with respect to n?1 tracks of the plurality of n tracks, excluding the over-write-only track.Type: GrantFiled: August 6, 2009Date of Patent: January 3, 2012Assignee: Hitachi Global Storage Technologies, Netherlands B.V.Inventors: Yosuke Urakami, Jun Ohno, Hideaki Maeda, Hiroyasu Tanabe
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Publication number: 20110069414Abstract: A hard-disk drive. The hard-disk drive includes a magnetic-recording disk in which tracks adjacent to each other are magnetically separated, a spindle motor which drives the magnetic-recording disk, a magnetic-recording head equipped with write element and read element, an actuator for positioning the magnetic-recording head on a predetermined track on the magnetic-recording disk, and a control unit. The control unit is configured to store information about an over-write-only track that is provided for a plurality of tracks including n consecutive tracks in at least a partial radial area of the magnetic-recording disk and an offset amount. In a radial area of the magnetic disk where the over-write-only track is located, the control unit is configured to record with an offset by an offset amount from a center of a track toward the over-write-only track with respect to n?1 tracks of the plurality of n tracks, excluding the over-write-only track.Type: ApplicationFiled: August 6, 2009Publication date: March 24, 2011Inventors: Yosuke URAKAMI, Jun OHNO, Hideaki MAEDA, Hiroyasu TANABE
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Patent number: 7730232Abstract: A data transfer method and system are provided that prevent the length of a time required for writing to a flash memory from appearing on the surface as a system operation when the flash memory is used in place of an SRAM. The method of transferring data includes the steps of writing data from a controller to a volatile memory, placing the volatile memory in a transfer state, transferring the data from the volatile memory in the transfer state to a nonvolatile memory, and releasing the volatile memory from the transfer state in response to confirming completion of the transfer of the data.Type: GrantFiled: April 25, 2005Date of Patent: June 1, 2010Assignee: Fujitsu Microelectronics LimitedInventors: Shinya Fujioka, Kotoku Sato, Hitoshi Ikeda, Yoshiaki Okuyama, Jun Ohno
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Publication number: 20100110818Abstract: There is provided a semiconductor device including: a temperature sensor detecting temperature; an inner circuit operating when supplied with a power supply voltage from a power supply line; a switch connected between the power supply line and the inner circuit; and a control circuit performing control in which, in a case where the temperature detected by the temperature sensor is higher than a threshold value, the switch is turned on when the inner circuit is in operation and the switch is turned off when the inner circuit is in non-operation, and in a case where the temperature detected by the temperature sensor is lower than the threshold value, the switch is turned on when the inner circuit is in operation and in non-operation.Type: ApplicationFiled: January 8, 2010Publication date: May 6, 2010Applicant: FUJITSU MICROELECTRONICS LIMITEDInventors: Kaoru MORI, Shinya Fujioka, Yoshitaka Takahashi, Jun Ohno, Akihiro Funyu, Shinichiro Suzuki
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Patent number: 7688659Abstract: Each program circuit outputs an operating specification signal indicating a first or second operating specification according to a program state. Each specification changing circuit is set by a corresponding block selection signal and outputs an operating specification signal indicating a second operating specification. Each timing control circuit changes an output timing of a precharge control signal for a bit line according to the operating specification signal. By the operating specification signal from the specification changing circuit, a failure can be detected in each memory block before programming a program circuit. Thereafter, the failure can be relieved by the program circuit. The output timing of the precharge control signal can be set for each memory block by a block selection signal without wiring a dedicated signal line for setting each specification changing circuit. Accordingly, increase in chip size can be minimized.Type: GrantFiled: May 27, 2008Date of Patent: March 30, 2010Assignee: Fujitsu Microelectronics LimitedInventors: Kaoru Mori, Jun Ohno, Hiroyuki Kobayashi
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Patent number: 7675773Abstract: An address switch circuit receives a row address signal supplied to a first address terminal group and a column address signal supplied to a second address terminal group. Further, the address switch circuit receives the row address signal supplied to the second address terminal group and thereafter receives the column address signal supplied to the second address terminal group and supplies the received row address signal and the received column address signal to the row decoder and the column decoder during a second operation mode. The number of semiconductor memories that are tested at once can be increased by executing an operation test of the semiconductor memories in the second operation mode. In addition, it becomes possible to test a semiconductor memory using test assets for other semiconductor memories. Consequently, the test efficiency can be improved, and the test cost can be reduced.Type: GrantFiled: May 30, 2008Date of Patent: March 9, 2010Assignee: Fujitsu Microelectronics LimitedInventors: Kaoru Mori, Toshikazu Nakamura, Jun Ohno, Masaki Okuda
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Patent number: 7672181Abstract: Each sub word line is coupled to a gate of a transfer transistor of a memory cell. A first switch of a sub word decoder couples the sub word line to a high level voltage line when a main word line is in an activation level. A second switch couples the sub word line to a low level voltage line when the main word line is in an inactivation level. A third switch couples the sub word line to the low level voltage line when a word reset signal line is in an activation level. A reset control circuit disables the inactivation of the main word line or the activation of the word reset signal line during a test mode. One of the second and third switches is forcibly turned off, and thereby, an operation failure of a sub word decoder can be detected easily.Type: GrantFiled: May 30, 2008Date of Patent: March 2, 2010Assignee: Fujitsu Microelectronics LimitedInventors: Kaoru Mori, Kota Hara, Jun Ohno
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Publication number: 20090040850Abstract: An address switch circuit receives a row address signal supplied to a first address terminal group and a column address signal supplied to a second address terminal group. Further, the address switch circuit receives the row address signal supplied to the second address terminal group and thereafter receives the column address signal supplied to the second address terminal group and supplies the received row address signal and the received column address signal to the row decoder and the column decoder during a second operation mode. The number of semiconductor memories that are tested at once can be increased by executing an operation test of the semiconductor memories in the second operation mode. In addition, it becomes possible to test a semiconductor memory using test assets for other semiconductor memories. Consequently, the test efficiency can be improved, and the test cost can be reduced.Type: ApplicationFiled: May 30, 2008Publication date: February 12, 2009Applicant: FUJITSU LIMITEDInventors: Kaoru Mori, Toshikazu Nakamura, Jun Ohno, Masaki Okuda
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Publication number: 20090040851Abstract: Each sub word line is coupled to a gate of a transfer transistor of a memory cell. A first switch of a sub word decoder couples the sub word line to a high level voltage line when a main word line is in an activation level. A second switch couples the sub word line to a low level voltage line when the main word line is in an inactivation level. A third switch couples the sub word line to the low level voltage line when a word reset signal line is in an activation level. A reset control circuit disables the inactivation of the main word line or the activation of the word reset signal line during a test mode. One of the second and third switches is forcibly turned off, and thereby, an operation failure of a sub word decoder can be detected easily.Type: ApplicationFiled: May 30, 2008Publication date: February 12, 2009Applicant: FUJITSU LIMITEDInventors: Kaoru MORI, Kota Hara, Jun Ohno
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Publication number: 20090040849Abstract: Each program circuit outputs an operating specification signal indicating a first or second operating specification according to a program state. Each specification changing circuit is set by a corresponding block selection signal and outputs an operating specification signal indicating a second operating specification. Each timing control circuit changes an output timing of a precharge control signal for a bit line according to the operating specification signal. By the operating specification signal from the specification changing circuit, a failure can be detected in each memory block before programming a program circuit. Thereafter, the failure can be relieved by the program circuit. The output timing of the precharge control signal can be set for each memory block by a block selection signal without wiring a dedicated signal line for setting each specification changing circuit. Accordingly, increase in chip size can be minimized.Type: ApplicationFiled: May 27, 2008Publication date: February 12, 2009Applicant: FUJITSU LIMITEDInventors: Kaoru MORI, Jun OHNO, Hiroyuki KOBAYASHI
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Publication number: 20080204924Abstract: Embodiments of the present invention help to compute controlling quantity to make the spacing between a floating head slider and a recording medium optimum without damaging the floating head slider and the recording medium by detecting the floating head slider's contact with the recording medium with high sensitivity.Type: ApplicationFiled: February 21, 2008Publication date: August 28, 2008Inventors: Jun Ohno, Atsushi Yatagai, Satoshi Ohki, Hiroshi Ide
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Patent number: 7394607Abstract: Embodiments of the invention provide a disk drive capable of writing information on data tracks even more positively when a shingle write method is adopted. In one embodiment, the disk drive is characterized in that, when information is to be written on a plurality of adjacent data tracks on a recording medium through the shingle write method, writing of information is controlled by detecting an actual writing position based on servo information recorded on the recording medium and determining whether or not the detected actual writing position meets a predetermined condition.Type: GrantFiled: September 6, 2006Date of Patent: July 1, 2008Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Jun Ohno, Hiroyasu Tanabe, Noboru Suzuki, Toshiaki Tsuyoshi