Patents by Inventor Jun Qian

Jun Qian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160276148
    Abstract: Methods for depositing ultrathin films by atomic layer deposition with reduced wafer-to-wafer variation are provided. Methods involve exposing the substrate to soak gases including one or more gases used during a plasma exposure operation of an atomic layer deposition cycle prior to the first atomic layer deposition cycle to heat the substrate to the deposition temperature.
    Type: Application
    Filed: March 20, 2015
    Publication date: September 22, 2016
    Inventors: Jun Qian, Hu Kang, Adrien LaVoie, Seiji Matsuyama, Purushottam Kumar
  • Patent number: 9425078
    Abstract: Systems and methods for depositing film in a substrate processing system includes performing a first atomic layer deposition (ALD) cycle in a processing chamber to deposit film on a substrate including a feature; after the first ALD cycle, exposing the substrate to an inhibitor plasma in the processing chamber for a predetermined period to create a varying passivated surface in the feature; and after the predetermined period, performing a second ALD cycle in the processing chamber to deposit film on the substrate.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: August 23, 2016
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Wei Tang, Bart Van Schravendijk, Jun Qian, Hu Kang, Adrien LaVoie, Deenesh Padhi, David C. Smith
  • Publication number: 20160225696
    Abstract: A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure comprises a substrate, a through silicon via hole, an interlayer dielectric, a liner layer and a conductor. The through silicon via hole is formed in the substrate. The interlayer dielectric is formed on the substrate. The interlayer dielectric defines an opening corresponding to the through silicon via hole. The interlayer dielectric comprises a bird beak portion near the through silicon via hole. The liner layer is formed on a bottom and a sidewall of the through silicon via hole. The conductor is filled in the through silicon via hole and the opening.
    Type: Application
    Filed: March 24, 2015
    Publication date: August 4, 2016
    Inventors: Xiao-Fei Han, Jun Qian, Ju-Bao Zhang
  • Publication number: 20160177443
    Abstract: The present inventors have conceived of a multi-stage process gas delivery system for use in a substrate processing apparatus. In certain implementations, a first process gas may first be delivered to a substrate in a substrate processing chamber. A second process gas may be delivered, at a later time, to the substrate to aid in the even dosing of the substrate. Delivery of the first process gas and the second process gas may cease at the same time or may cease at separate times.
    Type: Application
    Filed: December 19, 2014
    Publication date: June 23, 2016
    Inventors: Purushottam Kumar, Hu Kang, Adrien LaVoie, Yi Chung Chiu, Frank L. Pasquale, Jun Qian, Chloe Baldasseroni, Shankar Swaminathan, Karl F. Leeser, David Charles Smith, Wei-Chih Lai
  • Patent number: 9372116
    Abstract: A method of generating reference spectra includes polishing a first substrate in a polishing apparatus, measuring a sequence of spectra from the first substrate during polishing with an in-situ optical monitoring system, for each spectrum in the sequence of spectra, determining a best matching reference spectrum from a first plurality of first reference spectra to generate a sequence of reference spectra, calculating a value of a metric of fit of the sequence of spectra to the sequence of reference spectra, comparing the value of the metric of fit to a threshold value and determining whether to generate a second library based on the comparison, and if the second library is determined to be generated, storing the sequence of spectra as a second plurality of reference spectra.
    Type: Grant
    Filed: March 3, 2014
    Date of Patent: June 21, 2016
    Assignee: Applied Materials, Inc.
    Inventors: Jeffrey Drue David, Jun Qian
  • Patent number: 9362186
    Abstract: A method of controlling polishing includes storing a base measurement, the base measurement being an eddy current measurement of a substrate after deposition of at least one layer overlying a semiconductor wafer and before deposition of a conductive layer over the at least one layer, after deposition of the conductive layer over the at least one layer and during polishing of the conductive layer on substrate, receiving a sequence of raw measurements of the substrate from an in-situ eddy current monitoring system, normalizing each raw measurement in the sequence of raw measurement to generate a sequence of normalized measurements using the raw measurement and the base measurement, and determining at least one of a polishing endpoint or an adjustment for a polishing rate based on at least the sequence of normalized measurements.
    Type: Grant
    Filed: July 15, 2015
    Date of Patent: June 7, 2016
    Assignee: Applied Materials, Inc.
    Inventors: Tomohiko Kitajima, Jeffrey Drue David, Jun Qian, Taketo Sekine, Garlen C. Leung, Sidney P. Huey
  • Publication number: 20160118246
    Abstract: Provided herein are methods and apparatus for filling one or more gaps on a semiconductor substrate. The disclosed embodiments are especially useful for forming seam-free, void-free fill in both narrow and wide features. The methods may be performed without any intervening etching operations to achieve a single step deposition. In various implementations, a first operation is performed using a novel PEALD fill mechanism to fill narrow gaps and line wide gaps. A second operation may be performed using PECVD methods to continue filling the wide gaps.
    Type: Application
    Filed: January 4, 2016
    Publication date: April 28, 2016
    Inventors: Hu Kang, Shankar Swaminathan, Jun Qian, Wanki Kim, Dennis Hausmann, Bart J. van Schravendijk, Adrien LaVoie
  • Publication number: 20160090650
    Abstract: The embodiments herein relate to methods, apparatus, and systems for depositing film on substrates. In these embodiments, the substrates are processed in batches. Due to changing conditions within a reaction chamber as additional substrates in the batch are processed, various film properties may trend over the course of a batch. Disclosed herein are methods and apparatus for minimizing the trending of film properties over the course of a batch. More specifically, film property trending is minimized by changing the amount of RF power used to process substrates over the course of the batch. Such methods are sometimes referred to as RF compensation methods.
    Type: Application
    Filed: September 30, 2014
    Publication date: March 31, 2016
    Inventors: Jun Qian, Frank L. Pasquale, Adrien LaVoie, Chloe Baldasseroni, Hu Kang, Shankar Swaminathan, Purushottam Kumar, Paul Franzen, Trung T. Le, Tuan Nguyen, Jennifer Petraglia, David Charles Smith, Seshasayee Varadarajan
  • Patent number: 9289875
    Abstract: During polishing of a substrate at a first platen and prior to a first time, a first sequence of values is obtained for a first zone of the first substrate and a second sequence of values is obtained for a different second zone of the substrate with an in-situ monitoring system. A first function is fit to a portion of the first sequence of values obtained prior to the first time, and a second function is fit to a portion of the second sequence of values obtained prior to the second time. At least one polishing parameter is adjusted based on the first fitted function and the second fitted function so as to reduce an expected difference between the zones. A second substrate is polished on the first platen using an adjusted polishing parameter calculated based on the first fitted function and the second fitted function.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: March 22, 2016
    Assignee: Applied Materials, Inc.
    Inventors: Jeffrey Drue David, Jun Qian, Harry Q. Lee
  • Publication number: 20160079036
    Abstract: A substrate processing system for depositing film on a substrate includes a processing chamber defining a reaction volume. A showerhead includes a stem portion having one end connected adjacent to an upper surface of the processing chamber. A base portion is connected to an opposite end of the stem portion and extends radially outwardly from the stem portion. The showerhead is configured to introduce at least one of process gas and purge gas into the reaction volume. A plasma generator is configured to selectively generate RF plasma in the reaction volume. An edge tuning system includes a collar and a parasitic plasma reducing element that is located around the stem portion between the collar and an upper surface of the showerhead. The parasitic plasma reducing element is configured to reduce parasitic plasma between the showerhead and the upper surface of the processing chamber.
    Type: Application
    Filed: March 25, 2015
    Publication date: March 17, 2016
    Inventors: Hu Kang, Adrien LaVoie, Shankar Swaminathan, Jun Qian, Chloe Baldasseroni, Frank Pasquale, Andrew Duvall, Ted Minshall, Jennifer Petraglia, Karl Leeser, David Smith, Sesha Varadarajan, Edward Augustyniak, Douglas Keil
  • Publication number: 20160052651
    Abstract: Methods and apparatus for use of a fill on demand ampoule are disclosed. The fill on demand ampoule may refill an ampoule with precursor concurrent with the performance of other deposition processes. The fill on demand may keep the level of precursor within the ampoule at a relatively constant level. The level may be calculated to result in an optimum head volume. The fill on demand may also keep the precursor at a temperature near that of an optimum precursor temperature. The fill on demand may occur during parts of the deposition process where the agitation of the precursor due to the filling of the ampoule with the precursor minimally effects the substrate deposition. Substrate throughput may be increased through the use of fill on demand.
    Type: Application
    Filed: October 16, 2014
    Publication date: February 25, 2016
    Inventors: Tuan Nguyen, Eashwar Ranganathan, Shankar Swaminathan, Adrien LaVoie, Chloe Baldasseroni, Frank L. Pasquale, Purushottam Kumar, Jun Qian, Hu Kang
  • Publication number: 20160056032
    Abstract: Disclosed are methods of depositing films of material on semiconductor substrates. The methods may include flowing a film precursor into a processing chamber through a showerhead substantially maintained at a first temperature, and adsorbing the film precursor onto a substrate held on a substrate holder such that the precursor forms an adsorption-limited layer while the substrate holder is substantially maintained at a second temperature. The first temperature may be at least about 10° C. above the second temperature, or the first temperature may be at or below the second temperature. The methods may further include removing at least some unadsorbed film precursor from the volume surrounding the adsorbed film precursor, and thereafter reacting adsorbed film precursor to form a film layer. Also disclosed herein are apparatuses having a processing chamber, a substrate holder, a showerhead, and one or more controllers for operating the apparatus to employ the foregoing film deposition techniques.
    Type: Application
    Filed: August 22, 2014
    Publication date: February 25, 2016
    Inventors: Chloe Baldasseroni, Adrien LaVoie, Hu Kang, Jun Qian, Purushottam Kumar, Andrew Duvall, Cody Barnett, Mohamed Sabri, Ramesh Chandrasekharan, Karl F. Leeser, David C. Smith, Seshasayee Varadarajan, Edmund B. Minshall
  • Patent number: 9257274
    Abstract: Provided herein are methods and apparatus for filling one or more gaps on a semiconductor substrate. The disclosed embodiments are especially useful for forming seam-free, void-free fill in both narrow and wide features. The methods may be performed without any intervening etching operations to achieve a single step deposition. In various implementations, a first operation is performed using a novel PEALD fill mechanism to fill narrow gaps and line wide gaps. A second operation may be performed using PECVD methods to continue filling the wide gaps.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: February 9, 2016
    Assignee: Lam Research Corporation
    Inventors: Hu Kang, Shankar Swaminathan, Jun Qian, Wanki Kim, Dennis Hausmann, Bart J. van Schravendijk, Adrien LaVoie
  • Publication number: 20160032453
    Abstract: A vapor delivery system includes an ampoule to store liquid precursor and a heater to partially vaporize the liquid precursor. A first valve communicates with a push gas source and the ampoule. A second valve supplies vaporized precursor to a heated injection manifold. A valve manifold includes a first node in fluid communication with an outlet of the heated injection manifold, a third valve having an inlet in fluid communication with the first node and an outlet in fluid communication with vacuum, a fourth valve having an inlet in fluid communication with the first node and an outlet in fluid communication with a second node, a fifth valve having an outlet in fluid communication with the second node, and a sixth valve having an outlet in fluid communication with the second node. A gas distribution device is in fluid communication with the second node.
    Type: Application
    Filed: July 14, 2015
    Publication date: February 4, 2016
    Inventors: Jun Qian, Hu Kang, Purushottam Kumar, Chloe Baldasseroni, Heather Landis, Andrew Kenichi Duvall, Mohamed Sabri, Ramesh Chandrasekharan, Karl Leeser, Shankar Swaminathan, David Smith, Jeremiah Baldwin, Eashwar Ranganathan, Adrien LaVoie, Frank Pasquale, Jeongseok Ha, lngi Bae
  • Publication number: 20160035566
    Abstract: Disclosed are methods of depositing films of material on semiconductor substrates employing the use of a secondary purge. The methods may include flowing a film precursor into a processing chamber and adsorbing the film precursor onto a substrate in the processing chamber such that the precursor forms an adsorption-limited layer on the substrate. The methods may further include removing at least some unadsorbed film precursor from the volume surrounding the adsorbed precursor by purging the processing chamber with a primary purge gas, and thereafter reacting adsorbed film precursor while a secondary purge gas is flowed into the processing chamber, resulting in the formation of a film layer on the substrate. The secondary purge gas may include a chemical species having an ionization energy and/or a disassociation energy equal to or greater than that of O2. Also disclosed are apparatuses which implement the foregoing processes.
    Type: Application
    Filed: July 30, 2014
    Publication date: February 4, 2016
    Inventors: Adrien LaVoie, Hu Kang, Purushottam Kumar, Shankar Swaminathan, Jun Qian, Frank Pasquale, Chloe Baldasseroni
  • Patent number: 9242337
    Abstract: A method for controlling the residue clearing process of a chemical mechanical polishing (“CMP”) process is provided. Dynamic in-situ profile control (“ISPC”) is used to control polishing before residue clearing starts, and then a new polishing recipe is dynamically calculated for the clearing process. Several different methods are disclosed for calculating the clearing recipe. First, in certain implementations when feedback at T0 or T1 methods are used, a post polishing profile and feedback offsets are generated in ISPC software. Based on the polishing profile and feedback generated from ISPC before the start of the clearing process, a flat post profile after clearing is targeted. The estimated time for the clearing step may be based on the previously processed wafers (for example, a moving average of the previous endpoint times). The calculated pressures may be scaled to a lower (or higher) baseline pressure for a more uniform clearing.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: January 26, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Jun Qian, Sivakumar Dhandapani, Benjamin Cherian, Thomas H. Osterheld, Charles C. Garretson
  • Publication number: 20160020157
    Abstract: A method of controlling polishing includes storing a base measurement, the base measurement being an eddy current measurement of a substrate after deposition of at least one layer overlying a semiconductor wafer and before deposition of a conductive layer over the at least one layer, after deposition of the conductive layer over the at least one layer and during polishing of the conductive layer on substrate, receiving a sequence of raw measurements of the substrate from an in-situ eddy current monitoring system, normalizing each raw measurement in the sequence of raw measurement to generate a sequence of normalized measurements using the raw measurement and the base measurement, and determining at least one of a polishing endpoint or an adjustment for a polishing rate based on at least the sequence of normalized measurements.
    Type: Application
    Filed: July 15, 2015
    Publication date: January 21, 2016
    Inventors: Tomohiko Kitajima, Jeffrey Drue David, Jun Qian, Taketo Sekine, Garlen C. Leung, Sidney P. Huey
  • Publication number: 20160018815
    Abstract: A method of controlling polishing includes storing a base spectrum, the base spectrum being a spectrum of light reflected from a substrate after deposition of a deposited dielectric layers overlying a metallic layer or semiconductor wafer and before deposition of a non-metallic layer over the plurality of deposited dielectric layer. After deposition of the non-metallic layer and during polishing of the non-metallic layer on the substrate, measurements of a sequence of raw spectra of light reflected the substrate during polishing are received from an in-situ optical monitoring system. Each raw spectrum is normalized to generate a sequence of normalized spectra using the raw spectrum and the base spectrum. At least one of a polishing endpoint or an adjustment for a polishing rate is determined based on at least one normalized predetermined spectrum from the sequence of normalized spectra.
    Type: Application
    Filed: July 16, 2014
    Publication date: January 21, 2016
    Inventors: Tomohiko Kitajima, Jeffrey Drue David, Jun Qian, Taketo Sekine, Garlen C. Leung, Sidney P. Huey
  • Publication number: 20150379426
    Abstract: During a training phase of a machine learning model, representations of at least some nodes of a decision tree are generated and stored on persistent storage in depth-first order. A respective predictive utility metric (PUM) value is determined for one or more nodes, indicating expected contributions of the nodes to a prediction of the model. A particular node is selected for removal from the tree based at least partly on its PUM value. A modified version of the tree, with the particular node removed, is stored for obtaining a prediction.
    Type: Application
    Filed: August 19, 2014
    Publication date: December 31, 2015
    Applicant: AMAZON TECHNOLOGIES, INC.
    Inventors: ROBERT MATTHIAS STEELE, TARUN AGARWAL, LEO PARKER DIRAC, JUN QIAN
  • Patent number: 9221147
    Abstract: A method of controlling polishing includes polishing a substrate, monitoring the substrate during polishing with an in-situ spectrographic monitoring system to generate a sequence of measured spectra, selecting less than all of the measured spectra to generate a sequence of selected spectra, generating a sequence of values from the sequence of selected spectra, and determining at least one of a polishing endpoint or an adjustment for a polishing rate based on the sequence of values.
    Type: Grant
    Filed: October 23, 2012
    Date of Patent: December 29, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Jun Qian, Sivakumar Dhandapani, Benjamin Cherian, Thomas H. Osterheld, Jeffrey Drue David, Gregory E. Menk, Boguslaw A. Swedek, Doyle E. Bennett