Abstract: A spread spectrum clock signal generator for spreading an input clock signal into an output clock signal includes a clock signal delay chain for delaying the input clock signal into a delay clock signal group having a plurality of delay clock signals, a modulation controller for outputting a counter clock signal control signal, a clock signal selection circuit for selecting, from the delay clock signal group, a modulation clock signal group having a plurality of modulation clock signals, a programmable counter for generating a counting value according to a counter clock signal, and a clock signal output unit for combining the modulation clock signals into the output clock signal according to the counting value, and further generating the counter clock signal, outputted to the programmable counter, according to the counter clock signal control signal.

Abstract: A data transmitting structure and a data transmitting method are disclosed. The data transmitting structure includes an input buffer layer and an output buffer layer. The input buffer layer includes N input latches connected sequentially in series. The 1st input latch of the input buffer layer is coupled to a data module. The output buffer layer includes N output latches connected sequentially in series. The 1st output latch of the output buffer layer is coupled to the Nth input latch of the input buffer layer. When the input buffer layer is turned on, the data in the data module are sequentially loaded into the input buffer layer, and then the data in the input latches are sequentially transmitted to the output latches of the output buffer layer. Finally, the data are sequentially transmitted to the Nth output latch of the output buffer layer and outputted from the Nth output latch.

Abstract: A driving circuit for a display system is provided. The driving circuit includes two driving units. After receiving N image data, the first driving unit drives the display system based on M image data among the N image data. The second driving unit receives the other (N?M) image data and a set of control signals from the first driving unit. The second driving unit drives the display system based on the (N?M) image data and the set of control signals. The first driving unit adjusts the timing sequence of the set of control signals according to the mode of the display system.

Abstract: A driving circuit for an LCD system is provided. The LCD system includes a common electrode, a display electrode, and a capacitor. An AC voltage output terminal of the driving circuit is coupled to the common electrode via the capacitor. The display electrode and a charging/discharging unit in the driving circuit are respectively coupled to the AC voltage output terminal through a switch. According to requirements to change the electrical polarity of the common electrode, a control unit in the driving circuit turns on/off the two switches respectively so as to charge or discharge the AC voltage output terminal.

Abstract: A frame rate control (FRC) method is provided for driving a number of pixels according to a number of pixels data. The pixels include a number of first color sub-pixels. In this method, the dithering process is performed to the pixels data in two frames according to two basic matrixes respectively. In one of the two frames, the numbers of the first color sub-pixels, driven by the positive pixel voltages and the negative pixel voltages and to which the dithering process has been performed, are the same in substantiality. Further, in the other of the two frames, the numbers of the first color sub-pixels, driven by the positive pixel voltages and the negative pixel voltages and to which the dithering process has been performed, are also the same in substantiality.

Abstract: A spread spectrum clock signal generator for spreading an input clock signal into an output clock signal includes a clock signal delay chain for delaying the input clock signal into a delay clock signal group having a plurality of delay clock signals, a modulation controller for outputting a counter clock signal control signal, a clock signal selection circuit for selecting, from the delay clock signal group, a modulation clock signal group having a plurality of modulation clock signals, a programmable counter for generating a counting value according to a counter clock signal, and a clock signal output unit for combining the modulation clock signals into the output clock signal according to the counting value, and further generating the counter clock signal, outputted to the programmable counter, according to the counter clock signal control signal.

Abstract: Scan driver and driving system with low input voltage and their level shift circuit are disclosed. The scan driver includes a latch unit, a level shift circuit and a buffer. The latch unit generates a first control signal and a second control signal. The level shift circuit is connected to the latch unit to receive the first control signal, the second control signal, a first clock signal and a second clock signal, so as to output a scan signal with high voltage level. The buffer enhances driving ability of the scan signal for driving thin-film transistors (TFTs) of a display panel.

Abstract: A single-type thin-film transistor (TFT) is used for making a thin-film transistor liquid crystal display (TFT-LCD). The scan driving circuit of the liquid crystal display is made of P-type thin-film transistors or N-type thin-film transistors so as to decrease the steps required by the manufacture process and reduce the cost and the probability of error occurring.

Abstract: A pixel circuit for active matrix OLED and driving method is proposed in this invention, which includes five transistors and one capacitance, it's mainly use a first-transistor connected to a control line to let a second transistor connected to the former scan line off when writing a low voltage in, so to avoid large current generation and IR-drop, finally the illumination will be more uniform than prior art.

Abstract: The main differences between the present invention the conventional pixel circuit for active matrix of current driving device is the usage of the auxiliary transistor(s). In the invention, at least one auxiliary transistor is used to separate both the transistor, which is directly electrically coupled to the current driving device, and the plate, which is not directly electrically coupled with a constant voltage source, of the capacitor from the other transistors of the pixel circuit. Hence, all circuit and voltage, which are induced by the switching process of these transistors, are blocked or compensate by the auxiliary transistor(s), and the stored voltage of the capacitor would be unaffected.

Abstract: A circuit for driving active matrix LED pixels, having a capacitor, a light emitting diode, and a first and second transistor. The capacitor is connected between a gate and source of the first transistor, and the second transistor has a source connected to a drain of the first transistor and a gate connected to receive a first voltage by which the first and second transistor operates in a saturation region, and a current switch controlled by a scan signal, wherein a first current corresponding to a data signal flows through the first and second transistor to generate a second voltage stored on the capacitor when the current switch is closed, and a second current through the first and second transistor is generated by the second voltage stored on the capacitor to turn on the light emitting diode when the current switch is opened.

Abstract: Scan driver and driving system with low input voltage and their level shift circuit are disclosed. The scan driver includes a latch unit, a level shift circuit and a buffer. The latch unit generates a first control signal and a second control signal. The level shift circuit is connected to the latch unit to receive the first control signal, the second control signal, a first clock signal and a second clock signal, so as to output a scan signal with high voltage level. The buffer enhances driving ability of the scan signal for driving thin-film transistors (TFTs) of a display panel.

Abstract: A current drive system with high uniformity reference current and its current driver are disclosed. Each current driver has a current reference generator unit and a current mirror unit, wherein the current reference generator unit has a current regulating parameter and the current mirror unit has a current copy parameter such that the current reference generator unit generates a current based on the current regulating parameter and the current mirror unit generates a reference current for current reference generator unit of next current driver as an input current.

Abstract: A driving circuit for solving color dispersion is disclosed, which includes a coding unit, a reference voltage generator and at least one data driver. The coding unit generates a plurality of coded data based on three Gamma curves. The reference voltage generator receives the coded data and converts the coded data into a plurality of reference voltages, such that the data driver drives display cells on the display array in accordance with the reference voltages.

Abstract: The present invention relates to a scan driving circuit with single-type transistors. The single-type thin-film transistor (TFT) is used for making a thin-film transistor liquid crystal display (TFT-LCD). Namely, the scan driving circuit of the liquid crystal display is made of P-type thin-film transistors or N-type thin-film transistors so as to decrease the steps required by the manufacture process and reduce the cost and the probability of error occurring.

Abstract: A shift-register unit. The first transistor includes a first source/drain coupled to a first terminal, a second source/drain, and a first gate coupled to a reset signal to stop the shift-register unit outputting a pulse signal. The second transistor includes a third source/drain coupled to the second source/drain, a fourth source/drain coupled to a second terminal, and a second gate coupled to a setting signal to initial the shift-register unit. The third transistor includes a fifth source/drain coupled to an output terminal, a third gate coupled to the second source/drain and a sixth source/drain coupled to a clock signal to start outputting the pulse signal. The fourth transistor includes a seventh source/drain coupled to the first terminal, an eighth source/drain coupled to the output terminal and a fourth gate coupled to a refresh signal to set a voltage level of the shift-register unit in a standby mode.

Abstract: A shift-register unit. The first transistor includes a first source/drain coupled to a first terminal, a second source/drain, and a first gate coupled to a reset signal to stop the shift-register unit outputting a pulse signal. The second transistor includes a third source/drain coupled to the second source/drain, a fourth source/drain coupled to a second terminal, and a second gate coupled to a setting signal to initial the shift-register unit. The third transistor includes a fifth source/drain coupled to an output terminal, a third gate coupled to the second source/drain and a sixth source/drain coupled to a clock signal to start outputting the pulse signal. The fourth transistor includes a seventh source/drain coupled to the first terminal, an eighth source/drain coupled to the output terminal and a fourth gate coupled to a refresh signal to set a voltage level of the shift-register unit in a standby mode.

Abstract: A pixel circuit for active matrix OLED and driving method is proposed in this invention, which includes five transistors and one capacitance, it's mainly use a first-transistor connected to a control line to let a second transistor connected to the former scan line off when writing a low voltage in, so to avoid large current generation and IR-drop, finally the illumination will be more uniform than prior art.

Abstract: A pixel structure for an active matrix OLED. A first switching transistor has a control terminal coupled to a first scan line, and a first terminal coupled to a data line. A first P-type transistor has a drain and a gate coupled to each other, and a source coupled to a voltage source. The drain is also coupled to a second terminal of the first switching transistor. A second P-type transistor has a source coupled to the voltage source, and a second switching transistor has two terminals coupled between gates of the first and second P-type transistors, and a control terminal coupled to a second scan line. A storage capacitor is coupled between the voltage source and the gate of the second P-type transistor. An OLED has an anode coupled to the drain of the second P-type transistor and a cathode coupled to ground.

Abstract: A source driver for driver-on-panel systems. The source driver includes a digital buffer to receive and schedule externally input digital video data, a set of shift registers to generate corresponding sampling control signals according to the data scheduled, a first set of latches to sample the scheduled data according to the sampling control signals and thus generate corresponding digital video data samples, a second set of latches to hold the samples, a set of level shifts to convert the held samples into high-voltage digital signals, a set of digital-to-analog converters to convert the high-voltage digital signals into analog signals, a set of analog buffers to drive the analog signals to a high-loading display panel, and a set of demultiplexers to output the analog signals at different times to appropriate display positions using time division multiplexing (TDM).