Abstract: A substrate with an embedded element includes a core substrate having one surface and a cavity recessed from the one surface in a thickness direction; an element package disposed in the cavity, the element package comprising one or more elements; and a substrate insulating material surrounding at least part of the element package. When observed from a side surface of the substrate with the embedded element, the substrate with the embedded element includes a cavity area in which the cavity is disposed and a substrate area outside of the cavity area. An absolute value of difference between an average thickness of the substrate area and an average thickness of the cavity area is 50 ?m or less.

Abstract: An embodiment relates to a substrate and a semiconductor module. A substrate capable of manufacturing a substrate for packaging, which is an individual product, with excellent yield despite cracks that may occur at edges or side surfaces of a core is provided.

Abstract: A graphite sheet having a ratio of thermal diffusivity in horizontal and vertical directions of 300 or more is disclosed. Also, a graphite sheet having a ratio of thermal diffusivity in a vertical direction of 2.0 mm2/s or less is disclosed. The graphite sheet has excellent thermal conductivity in horizontal and vertical directions and excellent flexibility at the same time and can be produced at low manufacturing cost, thereby holding an economic advantage.

Abstract: A manufacturing method of a ring-shaped element for an etcher, comprises a granulation operation comprising i) a slurry manufacturing process of preparing a slurry by mixing a raw material including boron carbide, a sinterability enhancer with a solvent; and ii) a granulation process of drying the slurry to prepare granulated raw material; a molding operation of manufacturing a green body by molding the granulated raw material; a sintering operation of carbonizing and sintering the green body to manufacture a sintered body; a shape operation of shaping the sintered body to a ring-shaped element for an etcher. The sinterability enhancer comprises one selected from the group consisting of carbon, boron oxide and combinations thereof.

Abstract: The present invention provides a graphite sheet having a ratio of thermal diffusivity in horizontal and vertical directions of 300 or more. Also, the present invention provides a graphite sheet having a ratio of thermal diffusivity in a vertical direction of 2.0 mm2/s or less. The graphite sheet has excellent thermal conductivity in horizontal and vertical directions and excellent flexibility at the same time and can be produced at low manufacturing cost, thereby holding an economic advantage.

Abstract: Provided are a composition for a semiconductor process, which comprises a first component comprising an inorganic acid or an organic acid; and a second component comprising a silicon compound represented by Formula 1, and a semiconductor process, which comprises selectively cleaning and/or removing an organic substance or an inorganic substance using the composition.

Abstract: A graphite sheet having a ratio of thermal diffusivity in horizontal and vertical directions of 300 or more is disclosed. Also, a graphite sheet having a ratio of thermal diffusivity in a vertical direction of 2.0 mm2/s or less is disclosed. The graphite sheet has excellent thermal conductivity in horizontal and vertical directions and excellent flexibility at the same time and can be produced at low manufacturing cost, thereby holding an economic advantage.

Abstract: A boron carbide sintered body includes necked boron carbide-containing particles. The thermal conductivity of the boron carbide sintered body at 400° C. is 27 W/m·K or less and the ratio of the thermal conductivity of the boron carbide sintered body at 25° C. to that of the boron carbide sintered body at 800° C. is 1:0.2 to 1:3.

Abstract: A ring-shaped element for an etcher includes a body portion having an outer diameter surface connecting an outer contour of an upper surface and an outer contour of a bottom surface, and an inner diameter surface connected to an inner contour of the upper surface, and a mounting portion having an upper surface connected to the inner diameter surface of the body portion at a position lower than the upper surface of the body portion, and an inner diameter surface connecting an inner contour of the upper surface and an inner contour of a bottom surface. The upper surface of the mounting portion is stepped from the upper surface of the body portion to constitute a substrate mounting portion. The surface or entire body of the ring-shaped element includes necked boron carbide-containing particles, and the thermal conductivity of the ring-shaped element at 400° C. is 27 W/m·K or less.

Abstract: Provided are a composition for a semiconductor process, which comprises a first component comprising an inorganic acid or an organic acid; and a second component comprising a silicon compound represented by Formula 1 or 2, and a semiconductor process, which comprises selectively cleaning and/or removing an organic substance or an inorganic substance using the composition.

Abstract: Provided are a composition for a semiconductor process, which comprises a first component comprising an inorganic acid or an organic acid; and a second component comprising a silicon compound represented by Formula 1, and a semiconductor process, which comprises selectively cleaning and/or removing an organic substance or an inorganic substance using the composition.

Abstract: The present invention provides a graphite sheet having a ratio of thermal diffusivity in horizontal and vertical directions of 300 or more. Also, the present invention provides a graphite sheet having a ratio of thermal diffusivity in a vertical direction of 2.0 mm2/s or less. The graphite sheet has excellent thermal conductivity in horizontal and vertical directions and excellent flexibility at the same time and can be produced at low manufacturing cost, thereby holding an economic advantage.

Abstract: The present invention relates to a poly(p-xylylene)-based polymer having a low dielectric constant suitable for low loss dielectrics (LLD), and an insulating material, a printed circuit board and a functional element using the same. More particularly, the poly(p-xylylene)-based polymer includes at least one repeat unit expressed by the following formula (1): wherein, at least one of R1, R2, R7 and R8 is independently substituted or unsubstituted C6-C20 aryl; the rest of R1 to R8 are each and independently H, substituted or unsubstituted linear C1-C3 alkyl, or substituted or unsubstituted branched C1-C3 alkyl; and n is an integer of 400 to 900.

Abstract: Disclosed herein is a composition for forming a substrate, comprising: a liquid crystal thermosetting oligomer having one or more soluble structural units in the main chain thereof and having thermosetting groups at one or more ends of the main chain thereof; and a metal alkoxide compound having reaction groups which can be covalently bonded with the thermosetting groups.

Abstract: Disclosed herein is a composition for forming a substrate, including: a compound prepared by polymerizing a liquid crystal thermosetting oligomer having one or more soluble structural units in a main chain thereof and having a thermosetting group at one or more of two ends of the main chain thereof with a fluorine compound having a functional group which can react with the main chain of the liquid crystal thermosetting oligomer.

Abstract: A capacitor embedded printed circuit board (PCB) includes a multilayer polymer capacitor layer with a plurality of polymer sheets. One or more first inner electrodes and second inner electrodes, separated by one or more of the plurality of polymer sheets, are alternately disposed to form a pair. A plurality of first extended electrodes and second extended electrodes protrude from the first inner electrodes and second inner electrodes, respectively. One or more insulating layers are laminated on one or both surfaces of the multilayer polymer capacitor. A plurality of first via holes for capacitor, and a plurality of second via holes for capacitor, penetrating the multilayer polymer capacitor layer are connected to the first extended electrodes and the second extended electrodes, respectively. The plurality of the first and second extended electrodes are alternately disposed to be opposite to each other.

Abstract: Disclosed are a light emitting diode package and a manufacturing method thereof. According to an embodiment of the present invention, the method includes: manufacturing a package main body having a plurality of cavities, the cavities being formed in a line on one surface, through molding by putting thermoplastic polymer into a previously produced mold; forming an electrode passing through the package main body; mounting a light emitting diode chip on a basal surface of the each cavity formed in the package main body; connecting electrically the light emitting diode chip and the electrode by using a bonding means; and sealing the light emitting diode chip and the bonding means by using a molding resin.

Abstract: Disclosed is a composition for forming a substrate, which includes a matrix resin including an epoxy resin and a fluoroepoxy compound introduced into the main chain of the epoxy resin. A prepreg and a substrate using the composition for forming a substrate are also provided.

Abstract: Disclosed herein is a composition for forming a substrate, including: a compound prepared by polymerizing a liquid crystal thermosetting oligomer having one or more soluble structural units in a main chain thereof and having a thermosetting group at one or more of two ends of the main chain thereof with a fluorine compound having a functional group which can react with the main chain of the liquid crystal thermosetting oligomer.

Abstract: A method of manufacturing a chip capacitor according to an aspect may include: preparing a capacitor lamination including a dielectric sheet formed of a composite having ceramic powder and a polymer mixed with each other, and first and second internal electrodes formed on both surfaces of the dielectric sheet at predetermined intervals; forming covering layers formed of an insulating material on both surfaces of the capacitor lamination; forming a first opening and a second opening in the capacitor lamination having the covering layers formed thereon to expose the first and second internal electrodes, respectively; forming plating layers in the first and second openings, the plating layers connected to the first and second internal electrodes; and dicing the capacitor lamination into chips on the basis of the first and second openings so that the plating layers formed in the first and second openings are provided as first and second external terminals.