Abstract: An ophthalmic information processing apparatus is configured to remove an artifact of an image of a subject's eye obtained using an ophthalmic apparatus. The ophthalmic information processing apparatus includes an identifying unit and a correction unit. The identifying unit is configured to identify a correction region in the image based on a dioptric power of the subject's eye. The correction unit is configured to correct a luminance in the correction region identified by the identifying unit, based on a correction amount corresponding to the dioptric power of the subject's eye.

Abstract: A wiring substrate includes a core substrate including a through-hole conductor, a first resin insulating layer, a first conductor layer including a seed layer and an electrolytic plating layer, a via conductor formed such that the via conductor electrically connects the through-hole conductor and first conductor layer, and a second resin insulating layer covering the first conductor layer. The core substrate includes a glass substrate such that the through-hole conductor is penetrating through the glass substrate, the seed layer includes a first layer formed on the first resin insulating layer and a second layer formed on the first layer, and the first conductor layer includes a conductor circuit such that a width of the first layer is larger than a width of the second layer in the conductor circuit and a width of the electrolytic plating layer is larger than the width of the first layer in the conductor circuit.

Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer laminated on the first conductor layer and including resin material and inorganic particles, a second conductor layer formed on a first surface of the insulating layer such that the first conductor layer is facing a second surface of the insulating layer, and a via conductor formed in an opening extending through the insulating layer and connecting the first and second conductor layers. The insulating layer is formed such that the inorganic particles include first inorganic particles partially embedded in the resin and second inorganic particles completely embedded in the resin, the first inorganic particles have first portions protruding from the resin and second portions embedded in the resin respectively, and the first surface of the resin insulating layer includes a surface of the resin and surfaces of the first portions exposed from the surface of the resin.

Abstract: A wiring substrate includes a first insulating layer, a conductive layer formed on the first insulating layer and including wirings, and a second insulating layer formed on the first insulating layer such that the second insulating layer is covering the conductive layer. The conductive layer is formed such that the wirings have the minimum wiring width of 3 ?m or less and the minimum inter-wiring distance of 3 ?m or less and has side surfaces having concave and convex portions forming vertical stripes extending along the thickness direction of the conductor layer.

Abstract: The present invention aims to provide a humanized antibody or an antigen-binding fragment thereof having stable physical property, superior in tumor accumulation, and capable of binding to mucin subtype 5AC. The above-mentioned problem is solved by the present invention that provides a humanized antibody or an antigen-binding fragment thereof having a heavy chain variable region consisting of the amino acid sequence shown in SEQ ID NO: 1-4 or a mutated amino acid sequence thereof, and a light chain variable region consisting of the amino acid sequence shown in SEQ ID NO: 5-8 or a mutated amino acid sequence thereof, and capable of binding to mucin subtype 5AC.

Abstract: A method for manufacturing a wiring substrate includes forming a laminate having dividing lines, and dividing the laminate along the dividing lines such that the laminate is divided into wiring substrates. The forming the laminate includes forming a first metal layer at positions overlapping the dividing lines, forming a second metal layer at positions overlapping the dividing lines, forming a first build-up part, and forming a second build-up part, Metal material of each of the metal layers is different from material of conductor formed on exposed surfaces of the first and second parts, and the dividing the laminate includes forming a first groove along the diving lines such that the first groove penetrates the first part, forming a second groove along the dividing lines such that the second groove penetrates the second part, and cutting the laminate between the bottoms of the first and second grooves along the dividing lines.

Abstract: A wiring substrate includes a wiring substrate having a cavity, and multiple wiring structures accommodated in the cavity of the substrate and including at least two of a first wiring structure, a second wiring structure and a third wiring structure. The structures include relay lines internally incorporated and having connection points exposed on upper surfaces of the structures at the end portions of the relay lines. The first structure includes a silicon layer in a lower part of the first structure, the second structure includes a glass layer in a lower part of the second structure, the third structure includes a resin layer and does not include a glass layer or a silicon layer in a lower part of the third structure, and the at least two of the first, second and third structures differ in at least one of planar size and in minimum L/S of the relay lines.

Abstract: A wiring substrate includes a first build-up part including an insulating layer and a conductor layer, and a second build-up part including an insulating layer and a conductor layer. The minimum wiring width of wirings in the conductor layer of the first build-up part is smaller than the minimum wiring width of wirings in the conductor layer of the second build-up part. The minimum inter-wiring distance of the wirings in the first part is smaller than the minimum inter-wiring distance of the wirings in the second part. The first build-up part is formed such that the conductor layer includes a conductor pattern including a first metal layer, a second metal layer, and a third metal layer. The width of the first metal layer is larger than the width of the second metal layer. The width of the third metal layer is larger than the width of the first metal layer.

Abstract: A wiring substrate includes a first build-up part including first insulating layers and conductor layers, a second build-up part laminated to the first part and including second insulating layers and conductor layers, and via conductors including first via conductors in the first insulating layers and second via conductors in the second insulating layers. The first part is positioned closer to first surface side of the substrate than the second part. The first conductor layers include wirings having wiring width and inter-wiring distance that are smaller than wiring width and inter-wiring distance of wirings in the second conductor layers. The first insulating layers include resin and inorganic particles including first particles forming inner wall surfaces in through holes and second particles embedded in the first insulating layers having different shapes from the first particles. Each first conductor layers and via conductors includes a metal film layer and a plating film layer.

Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer formed on the first conductor layer, a second conductor layer formed on a surface of the resin insulating layer, and a via conductor formed in the resin insulating layer such that the via conductor is connecting the first and second conductor layers and has a land portion extending on a boundary part of the resin insulating layer. The via conductor is formed in a via hole formed in the resin insulating layer. The resin insulating layer is formed such that the boundary part has a surface roughness that is larger than a surface roughness of the surface on which the second conductor layer formed and that an inner wall surface in the via hole in the resin insulating layer is equal to or larger than the surface roughness of the boundary part of the resin insulating layer.

Abstract: A wiring substrate includes a core substrate including a through-hole conductor, a resin insulating layer formed on the core substrate, a conductor layer formed on a surface of the resin insulating layer and including a seed layer and an electrolytic plating layer formed on the seed layer, and a via conductor formed in the resin insulating layer such that the via conductor is connected to the through-hole conductor in the core substrate and includes the seed layer and electrolytic plating layer extending from the conductor layer. The core substrate includes a glass substrate such that the through-hole conductor is formed in a through hole penetrating through the glass substrate, and the conductor layer and via conductor are formed such that the seed layer is formed by sputtering and includes an alloy including copper, aluminum, and one or more metals selected from nickel, zinc, gallium, silicon, and magnesium.

Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer including resin and inorganic particles, a second conductor layer including a seed layer and an electrolytic plating layer on the seed layer, and a via conductor connecting the first conductor layer and second conductor layer and including the seed layer and electrolytic plating layer extending from the second conductor layer. The second conductor layer and via conductor are formed such that the seed layer includes an alloy including copper, aluminum and a metal including one or more metals selected from nickel, zinc, gallium, silicon and magnesium, and the resin insulating layer is formed such that the inorganic particles include first inorganic particles forming an inner wall surface in the opening and second inorganic particles embedded in the resin insulating layer and that shapes of the first inorganic particles are different from shapes of the second inorganic particles.

Abstract: A printed wiring board includes a base substrate, an electronic component accommodated in a cavity formed in the substrate, a resin insulating layer formed on the substrate such that the insulating layer is covering the electronic component, a conductor layer formed on the insulating layer, and via conductors formed in the insulating layer and each including a seed layer and an electrolytic plating layer formed on the seed layer such that the via conductors are connecting the conductor layer and electrodes of the electronic component. The insulating layer includes resin and inorganic particles and has via holes in which the via conductors is formed respectively such the inorganic particles include first inorganic particles having smooth surfaces and second inorganic particles embedded in the insulating layer and that an inner wall surface of each of the via holes includes the resin and the smooth surfaces of the first inorganic particles.

Abstract: A printed wiring board includes a conductor layer including wirings, a resin insulating layer having openings, a mounting conductor layer including first and second electrodes, first via conductors including a seed layer and an electrolytic plating layer such that the first via conductors connect the first electrodes and the wirings, and second via conductors including the seed layer and electrolytic plating layer such that the second via conductors connect the second electrodes and the wirings. The first electrodes are positioned to mount a first electronic component. The second electrodes are positioned to mount a second electronic component. The first and second via conductors are formed such that the seed layer is covering an inner wall surface of each opening in the insulating layer and has a first portion and a second portion connected to the first portion and having a part of the first portion formed on the second portion.

Abstract: The present invention aims to provide a humanized antibody or an antigen-binding fragment thereof having stable physical property, superior in tumor accumulation, and capable of binding to mucin subtype 5AC. The above-mentioned problem is solved by the present invention that provides a humanized antibody or an antigen-binding fragment thereof having a heavy chain variable region consisting of the amino acid sequence shown in SEQ ID NO: 1-4 or a mutated amino acid sequence thereof, and a light chain variable region consisting of the amino acid sequence shown in SEQ ID NO: 5-8 or a mutated amino acid sequence thereof, and capable of binding to mucin subtype 5AC.

Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer having an opening, a second conductor layer including a seed layer and an electrolytic plating layer, and a via conductor formed in the opening of the resin insulating layer and including the seed layer and the electrolytic plating layer formed on the seed layer. The via conductor is connecting the first conductor layer and the second conductor layer. The seed layer has a first portion formed on the surface of the resin insulating layer, a second portion formed on an inner wall surface in the opening of the resin insulating layer, and a third portion formed on a portion of the first conductor layer exposed by the opening of the resin insulating layer such that a thickness of the first portion is greater than a thickness of the second portion and a thickness of the third portion.

Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer formed on the first conductor layer, a second conductor layer formed on the resin insulating layer and including a seed layer and a metal layer on the seed layer, a via conductor formed in the resin insulating layer such that the via conductor is connecting the first conductor layer and the second conductor layer, and a base layer formed on the resin insulating layer and including resin and one of iron and chromium in a range of 0.2 at % to 5.0 at % with respect to the resin such that the base layer includes part formed between the resin insulating layer and the seed layer.

Abstract: A radio wave abnormality detection system, a radio wave abnormality detection method, and a radio wave abnormality detection program that are capable of accurately detecting a radio wave abnormality are provided. The radio wave abnormality detection system includes: a determination unit that determines an extraction period, based on a transmission duration estimated from first received data of a radio wave received at a first timing; a learning unit that generates a learned model in which a feature value extracted in the extraction period from second received data of a radio wave received at a second timing is machine-learned; and a detection unit that detects a radio wave abnormality by using a feature value extracted in the extraction period from third received data of a radio wave received at a third timing, and the learned model.

Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer having an opening, a second conductor layer including a seed layer and an electrolytic plating layer formed on the seed layer, and a via conductor including the seed and electrolytic plating layers and connecting the first and second conductor layers. The seed layer has a first portion on the surface of the insulating layer, a second portion on an inner wall surface in the opening of the insulating layer, and a third portion on a portion of the first conductor layer exposed by the opening of the insulating layer such that the first portion is thicker than the second and third portions, and the insulating layer includes resin and inorganic particles including first particles forming the inner wall surface and second particles embedded in the insulating layer and having shapes different from shapes of the first particles.

Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer, a second conductor layer, and a via conductor formed in an opening of the insulating layer and connecting the first conductor and second conductor layers. The second conductor layer and via conductor include a seed layer having a first portion formed on the surface of the insulating layer, a second portion formed on an inner wall surface in the opening, and a third portion formed on a portion of the first conductor layer exposed by the opening. A thickness of the first portion is greater than a thickness of the second portion and a thickness of the third portion. The seed layer includes a first layer including an alloy including copper, aluminum and one or more metals selected from nickel, zinc, gallium, silicon, and magnesium, and a second layer formed on the first layer and including copper.