Patents by Inventor Jun Sakai

Jun Sakai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12289829
    Abstract: A printed wiring board includes a first conductor layer, an insulating layer formed on the first conductor layer, a second conductor layer formed on the insulating layer, and a via conductor formed in the insulating layer such that the via conductor is connecting the first and second conductor layers. The insulating layer has opening exposing portion of the first conductor layer such that the via conductor is formed in the opening, the second conductor layer and via conductor are formed such that the second conductor layer and via conductor include a seed layer and an electrolytic plating layer on the seed layer, and the insulating layer includes resin and inorganic particles dispersed in the resin such that the particles include first particles forming inner wall surface in the opening and second particles embedded in the insulating layer and the first particles have shapes different from shapes of the second particles.
    Type: Grant
    Filed: February 23, 2023
    Date of Patent: April 29, 2025
    Assignee: IBIDEN CO., LTD.
    Inventors: Jun Sakai, Takuya Inishi
  • Publication number: 20250048562
    Abstract: A wiring substrate includes a core substrate including a glass substrate and a through-hole conductor, a resin insulating layer having an opening extending through the resin insulating layer, a conductor layer including a seed layer and an electrolytic plating layer on the seed layer, and a via conductor formed in the opening such that the via conductor electrically connects to the through-hole conductor in the core substrate and includes the seed layer and electrolytic plating layer extending from the conductor layer. The resin insulating layer includes resin and inorganic particles including first and second particles such that the first particles are partially embedded in the resin and that the second particles are embedded in the resin, the first particles have first portions protruding from the resin and second portions embedded in the resin respectively, the surface includes the resin and exposed surfaces of the first portions exposed from the resin.
    Type: Application
    Filed: July 30, 2024
    Publication date: February 6, 2025
    Applicant: IBIDEN CO., LTD.
    Inventors: Masashi KUWABARA, Susumu KAGOHASHI, Jun SAKAI, Kyohei YOSHIKAWA, Takuya INISHI
  • Patent number: 12217587
    Abstract: A wireless terminal detection system provided with user position information acquisition means for measuring a position of a reception-side wireless terminal; pattern classification means for classifying movement patterns extracted from position history information of the reception-side wireless terminal into ordinary patterns and non-ordinary patterns based on classification results in which the movement patterns are classified in accordance with times and positions; and determination means for determining whether a transmission-side wireless terminal, which is a transmission source of radio waves received by the reception-side wireless terminal, is a suspicious terminal based on a reception history of radio waves from the transmission-side wireless terminal in time intervals classified as the non-ordinary patterns.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: February 4, 2025
    Assignee: NEC CORPORATION
    Inventors: Jun Sakai, Masaki Kitsunezuka, Toshiki Takeuchi, Taichi Ohtsuji, Shoji Nishimura, Yasufumi Hirakawa
  • Publication number: 20250008651
    Abstract: A printed wiring board includes a first conductor layer, an insulating layer formed on the first conductor, a second conductor layer formed on the insulating layer, and a via conductor formed in the insulating layer such that the via conductor is penetrating through the insulating layer and connecting the first and second conductor layers. The insulating layer has a via hole in which the via conductor is formed such that inner wall surface in the via hole has a first inclined surface decreasing in diameter from the second conductor layer to a middle portion of the via hole in a thickness direction of the insulating layer, a second inclined surface decreasing in diameter from the middle portion to the first conductor layer with a smaller diameter than an end part of the first inclined surface in the middle portion, and a step surface connecting the first and second inclined surfaces.
    Type: Application
    Filed: June 25, 2024
    Publication date: January 2, 2025
    Applicant: IBIDEN CO., LTD.
    Inventors: Susumu KAGOHASHI, Jun SAKAI
  • Publication number: 20250008652
    Abstract: A printed wiring board includes a first insulating layer, a connection conductor having a connection wiring, a second insulating layer formed on the connection conductor layer, a mounting conductor layer including a first electrode that mounts a first electronic component and a second electrode that mounts a second electronic component, and connection via conductors including a first connection via conductor that electrically connects the first electrode and the connection wiring and a second connection via conductor that electrically connects the second electrode and the connection wiring. The first insulating layer includes resin and inorganic particles including first particles and second particles such that each first particle has a first portion protruding from the resin and a second portion embedded in the resin, and the surface of the first insulating layer includes a surface of the resin and exposed surfaces of the first portions exposed from the surface of the resin.
    Type: Application
    Filed: June 26, 2024
    Publication date: January 2, 2025
    Applicant: IBIDEN CO., LTD.
    Inventors: Masashi KUWABARA, Susumu KAGOHASHI, Jun SAKAI, Kyohei YOSHIKAWA
  • Publication number: 20240431031
    Abstract: A printed wiring board includes a first insulating layer, a connection conductor layer including wiring, a second insulating layer covering the connection conductor layer, a conductor layer including first and second electrodes such that the first electrode mounts a first electronic component and the second electrode mounts a second electronic component, and via conductors including first and second via conductors. The first via conductor connects the first electrode and wiring. The second via conductor connects the second electrode and wiring. The conductor layer includes a seed layer and an electrolytic plating layer. The seed layer includes a first layer formed on the first insulating layer and a second layer formed on the first layer, a width of the first layer is larger than a width of the second layer, and a width of the electrolytic plating layer is larger than the width of the first layer of the seed layer.
    Type: Application
    Filed: June 20, 2024
    Publication date: December 26, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Masashi KUWABARA, Jun SAKAI, Shiho SHIMADA
  • Publication number: 20240407094
    Abstract: A printed wiring board includes a conductor layer including wirings, a resin insulating layer having openings, a mounting conductor layer including first and second electrodes, first via conductors including a seed layer and an electrolytic plating layer such that the first via conductors connect the first electrodes and the wirings, and second via conductors including the seed layer and electrolytic plating layer such that the second via conductors connect the second electrodes and the wirings. The first electrodes are positioned to mount a first electronic component. The second electrodes are positioned to mount a second electronic component. The first and second via conductors are formed such that the seed layer is covering an inner wall surface of each opening in the insulating layer and has a first portion and a second portion connected to the first portion and having a part of the first portion formed on the second portion.
    Type: Application
    Filed: May 31, 2024
    Publication date: December 5, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Masashi KUWABARA, Susumu KAGOHASHI, Jun SAKAI, Takuya INISHI, Kyohei YOSHIKAWA
  • Patent number: 12150711
    Abstract: The blood flow analysis apparatus includes an acquisition unit and an extractor. The acquisition unit is configured to acquire blood flow information representing time-course changes in a blood flow velocity of a single retinal artery or retinal vein. The extractor is configured to extract one or more parameters corresponding to change in the blood flow velocity from the blood flow information.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: November 26, 2024
    Assignees: NATIONAL UNIVERSITY CORPORATION ASAHIKAWA MEDICAL UNIVERSITY, TOPCON CORPORATION
    Inventors: Akitoshi Yoshida, Kana Minamide, Masahiro Akiba, Jun Sakai
  • Publication number: 20240386324
    Abstract: The learning model generator includes a data division unit which groups multiple feature data, each of which indicates a feature, and a learning model generation unit which generates a learning model using feature data belonging to a first group among multiple groups formed by the data division unit, or the feature data belonging to the first group and a part of feature data belonging to other groups, as training data.
    Type: Application
    Filed: May 9, 2024
    Publication date: November 21, 2024
    Applicants: NEC Corporation, NEC Platforms, Ltd.
    Inventors: Shoya TOKITA, Jun SAKAI, Toshiki TAKEUCHI, Ayaka HARAYAMA, Tsuyoshi HAMADA, Tomohiro SHIMODA
  • Publication number: 20240389231
    Abstract: A printed wiring board includes a mounting conductor layer including first and second electrodes, a connection conductor layer including connection wirings such that the connection wirings connect the first and second electrodes, a resin insulating layer formed between the mounting conductor layer and the connection conductor layer and having openings, and connection via conductors formed in the openings of the resin insulating layer and including first and second connection via conductors such that the first connection via conductors electrically connect the first electrodes and the connection wirings and the second connection via conductors electrically connect the second electrodes and the connection wirings. The resin insulating layer includes inorganic particles and resin. The inorganic particles include first inorganic particles forming inner wall surfaces in the openings and second inorganic particles embedded in the resin insulating layer.
    Type: Application
    Filed: May 10, 2024
    Publication date: November 21, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Masashi KUWABARA, Jun SAKAI, Takuya INISHI
  • Publication number: 20240365468
    Abstract: A wiring substrate includes a first build-up part including an insulating layer and a conductor layer, and a second build-up part laminated on the first build-up part and including an insulating layer and a conductor layer. The minimum width and minimum inter-wiring distance of wirings in the first build-up part are smaller than the minimum width and minimum inter-wiring distance of wirings in the second build-up part. The insulating layer in the first build-up part includes resin and inorganic particles including first inorganic particles partially embedded in the resin and second inorganic particles completely embedded in the resin such that the first inorganic particles have first portions protruding from the resin and second portions embedded in the resin, respectively. The insulating layer of the first build-up part has a surface covered by the conductor layer and including a surface of the resin and exposed surfaces of the first portions.
    Type: Application
    Filed: April 23, 2024
    Publication date: October 31, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Masashi KUWABARA, Susumu KAGOHASHI, Jun SAKAI, Kyohei YOSHIKAWA
  • Publication number: 20240363541
    Abstract: A wiring substrate includes a first build-up part including first insulating layers, first conductor layers, and first via conductors, and a second build-up part including second insulating layers and second conductor layers. The minimum wiring width and minimum inter-wiring distance in the first conductor layers are smaller than the minimum wiring width and minimum inter-wiring distance in the second conductor layers. The first conductor layers and via conductors include a first layer and a second layer formed on the first layer. The first layer includes a lower layer including a sputtering film including an alloy including copper, aluminum, and at least one element selected from nickel, zinc, gallium, silicon, and magnesium, and an upper layer including a sputtering film including copper. The lower layer is formed in contact with surfaces of the first insulating layers and inner wall surfaces and bottom surfaces in via openings for the first via conductors.
    Type: Application
    Filed: April 26, 2024
    Publication date: October 31, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Masashi KUWABARA, Susumu KAGOHASHI, Jun SAKAI, Kyohei YOSHIKAWA
  • Publication number: 20240339388
    Abstract: A wiring substrate includes a first build-up part including an insulating layer and a conductor layer, and a second build-up part including an insulating layer and a conductor layer. The minimum wiring width of wirings in the conductor layer of the first build-up part is smaller than the minimum wiring width of wirings in the conductor layer of the second build-up part. The minimum inter-wiring distance of the wirings in the first part is smaller than the minimum inter-wiring distance of the wirings in the second part. The first build-up part is formed such that the conductor layer includes a conductor pattern including a first metal layer, a second metal layer, and a third metal layer. The width of the first metal layer is larger than the width of the second metal layer. The width of the third metal layer is larger than the width of the first metal layer.
    Type: Application
    Filed: April 4, 2024
    Publication date: October 10, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Masashi KUWABARA, Jun SAKAI, Shiho SHIMADA
  • Publication number: 20240324103
    Abstract: A wiring substrate includes a core substrate including a through-hole conductor, a first resin insulating layer, a first conductor layer including a seed layer and an electrolytic plating layer, a via conductor formed such that the via conductor electrically connects the through-hole conductor and first conductor layer, and a second resin insulating layer covering the first conductor layer. The core substrate includes a glass substrate such that the through-hole conductor is penetrating through the glass substrate, the seed layer includes a first layer formed on the first resin insulating layer and a second layer formed on the first layer, and the first conductor layer includes a conductor circuit such that a width of the first layer is larger than a width of the second layer in the conductor circuit and a width of the electrolytic plating layer is larger than the width of the first layer in the conductor circuit.
    Type: Application
    Filed: March 22, 2024
    Publication date: September 26, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Masashi KUWABARA, Jun SAKAI, Shiho FUKUSHIMA
  • Publication number: 20240306299
    Abstract: A wiring substrate includes a core substrate including a through-hole conductor, a resin insulating layer formed on the core substrate, a conductor layer formed on a surface of the resin insulating layer and including a seed layer and an electrolytic plating layer formed on the seed layer, and a via conductor formed in the resin insulating layer such that the via conductor is connected to the through-hole conductor in the core substrate and includes the seed layer and electrolytic plating layer extending from the conductor layer. The core substrate includes a glass substrate such that the through-hole conductor is formed in a through hole penetrating through the glass substrate, and the conductor layer and via conductor are formed such that the seed layer is formed by sputtering and includes an alloy including copper, aluminum, and one or more metals selected from nickel, zinc, gallium, silicon, and magnesium.
    Type: Application
    Filed: March 5, 2024
    Publication date: September 12, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Toshiki FURUTANI, Kyohei YOSHIKAWA, Takuya INISHI, Jun SAKAI
  • Publication number: 20240306312
    Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer formed on the first conductor layer, a second conductor layer formed on a surface of the resin insulating layer, and a via conductor formed in the resin insulating layer such that the via conductor is connecting the first and second conductor layers and has a land portion extending on a boundary part of the resin insulating layer. The via conductor is formed in a via hole formed in the resin insulating layer. The resin insulating layer is formed such that the boundary part has a surface roughness that is larger than a surface roughness of the surface on which the second conductor layer formed and that an inner wall surface in the via hole in the resin insulating layer is equal to or larger than the surface roughness of the boundary part of the resin insulating layer.
    Type: Application
    Filed: March 7, 2024
    Publication date: September 12, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Jun SAKAI, Kyohei YOSHIKAWA, Shunya HATANAKA
  • Publication number: 20240306296
    Abstract: A wiring substrate includes a core substrate including a glass substrate and a through-hole conductor formed in the glass substrate, a resin insulating layer formed on the core substrate and including resin and inorganic particles, a conductor layer formed on the insulating layer and including a seed layer and an electrolytic plating layer, and a via conductor formed in the insulating layer such that the via conductor is electrically connected to the through-hole conductor formed in the glass substrate and includes the seed layer and electrolytic plating layer extending from the conductor layer. The conductor layer and the via conductor are formed such that the seed layer is formed by sputtering, and the resin insulating layer has an opening in which the via conductor is formed such that the inorganic particles include first particles forming an inner wall surface in the opening and second particles embedded in the insulating layer.
    Type: Application
    Filed: March 8, 2024
    Publication date: September 12, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Toshiki FURUTANI, Masashi KUWABARA, Jun SAKAI, Takuya INISHI
  • Publication number: 20240298406
    Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer formed on the first conductor layer, a second conductor layer formed on the resin insulating layer and including a seed layer and a metal layer on the seed layer, a via conductor formed in the resin insulating layer such that the via conductor is connecting the first conductor layer and the second conductor layer, and a base layer formed on the resin insulating layer and including resin and one of iron and chromium in a range of 0.2 at % to 5.0 at % with respect to the resin such that the base layer includes part formed between the resin insulating layer and the seed layer.
    Type: Application
    Filed: February 29, 2024
    Publication date: September 5, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Jun SAKAI, Kyohei YOSHIKAWA, Shunya HATANAKA
  • Publication number: 20240292536
    Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer including resin and inorganic particles, a second conductor layer including a seed layer and an electrolytic plating layer on the seed layer, and a via conductor connecting the first conductor layer and second conductor layer and including the seed layer and electrolytic plating layer extending from the second conductor layer. The second conductor layer and via conductor are formed such that the seed layer includes an alloy including copper, aluminum and a metal including one or more metals selected from nickel, zinc, gallium, silicon and magnesium, and the resin insulating layer is formed such that the inorganic particles include first inorganic particles forming an inner wall surface in the opening and second inorganic particles embedded in the resin insulating layer and that shapes of the first inorganic particles are different from shapes of the second inorganic particles.
    Type: Application
    Filed: February 23, 2024
    Publication date: August 29, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Susumu KAGOHASHI, Kyohei YOSHIKAWA, Takuya INISHI, Jun SAKAI
  • Publication number: 20240268038
    Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer including glass particles and resin, a second conductor layer formed on a surface of the resin insulating layer and including a seed layer and an electrolytic plating layer, and a via conductor connecting the first conductor layer and second conductor layer and including the seed layer and electrolytic plating layer extending from the second conductor layer. The second conductor layer and the via conductor are formed such that the second conductor layer includes signal wirings and that the seed layer is formed by sputtering an alloy including copper, aluminum, and one or more metals selected from nickel, zinc, gallium, silicon, and magnesium, and the resin insulating layer is formed such that the surface of the resin insulating layer includes the resin and that an inner wall surface in the opening includes the resin and the glass particles.
    Type: Application
    Filed: February 7, 2024
    Publication date: August 8, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Susumu KAGOHASHI, Jun SAKAI, Kyohei YOSHIKAWA