Patents by Inventor Jun Sakai

Jun Sakai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130050470
    Abstract: A surface inspection method for a steel sheet coated with a resin, includes irradiating the steel sheet with sheet-like light, which has been linearly polarized at a predetermined polarization angle, at an incidence angle different from Brewster's angle of the coating by a predetermined angle or greater; and imaging linearly-polarized light of a polarization angle of 0 degrees at an acceptance angle different from a regular reflection angle of incident light by a predetermined angle. Accordingly, it is not necessary to change the incidence angle and the acceptance angle depending on resin components and it is possible to inspect a substrate steel surface of the steel sheet highly accurately without observing abnormalities in the coating itself.
    Type: Application
    Filed: February 25, 2011
    Publication date: February 28, 2013
    Applicant: JFE STEEL CORPORATION
    Inventors: Akira Kazama, Kaoru Tanaka, Jun Sakai
  • Patent number: 8345424
    Abstract: Provided is an optical interconnection device in which a volume required for cooling is reduced. In the optical interconnection device, a plurality of optical modules (12) are arranged on a periphery of an LSI (11) electrically connected to an electric wiring board (10), and liquid cooling mechanisms (13, 14) are respectively placed on the LSI (11) and the optical modules (12). The plurality of optical modules (12) may be arranged only on a surface of the electric wiring board (10) where the LSI (11) is mounted, only on a surface opposite to the surface where the LSI (11) is mounted, or on both the same surface as and the opposite surface to the surface where the LSI (11) is mounted.
    Type: Grant
    Filed: February 16, 2009
    Date of Patent: January 1, 2013
    Assignee: NEC Corporation
    Inventors: Mikio Oda, Tomotaka Ishida, Hisaya Takahashi, Hideyuki Ono, Jun Sakai, Takashi Ohtsuka, Arihide Noda, Hikaru Kouta
  • Patent number: 8080631
    Abstract: It is an object of the present invention to provide a siloxane-modified hyperbranched polyimide which has more excellent electric properties (low dielectric property), gas permeability, mechanical properties (low modulus), surface properties (adhesiveness) and the like while maintaining thermal stability, mechanical strength, chemical resistance and processability and the like intrinsic to polyimide and which may be variously functionalized and can be utilized advantageously in industrial applications. A siloxane structure represented by the following structural formula (1) is introduced into a three-dimensional structured hyperbranched polyimide molecule. (wherein R1 represents a hydrocarbon group having from 1 to 6 carbon atoms, and n indicates an integer of from 1 to 50).
    Type: Grant
    Filed: July 24, 2007
    Date of Patent: December 20, 2011
    Assignee: National University Corporation Nagoya Institute of Technology
    Inventors: Yasuharu Yamada, Jun Sakai
  • Patent number: 8022110
    Abstract: A porous polyimide obtained by removing a silica phase from an organic-inorganic polymer hybrid having a molecule structure in which a polyimide phase and the silica phase are held together by covalent bond.
    Type: Grant
    Filed: September 18, 2009
    Date of Patent: September 20, 2011
    Assignee: Ibiden Co., Ltd.
    Inventors: Yasuharu Yamada, Tomoyuki Suzuki, Jun Sakai, Norihiro Tomokiyo
  • Patent number: 8004085
    Abstract: A semiconductor device has an element interconnection 2, a top-layer element interconnection 4, a super-connect interconnection 10 and a bump 7. The element interconnection 2 is provided on a semiconductor substrate 1 through a plurality of insulating layers 50. The top-layer element interconnection 4 is formed above the element interconnection 2 by using a substantially equivalent process equipment. The super-connect interconnection 10 is provided on the top-layer element interconnection 4 through a super-connect insulating layer 9 having a thickness five or more times larger than that of the insulating layer 5, and has a thickness three or more times larger than that of each the element interconnection 2 and the top-layer element interconnection 4. The bump 7 is formed on the super-connect interconnection 10. The top-layer element interconnection 4 has a signal pad 4s, a power source pad 4v and a ground pad 4g.
    Type: Grant
    Filed: February 13, 2008
    Date of Patent: August 23, 2011
    Assignee: NEC Corporation
    Inventors: Shintaro Yamamichi, Katsumi Kikuchi, Jun Sakai, Hikaru Kouta
  • Publication number: 20110079422
    Abstract: A multilayer substrate is provided with a conductor plane region in which a plurality of conductor planes are disposed; a clearance region disposed adjacent to the conductor plane region so that the plurality of conductor planes are excluded from the clearance region. A plurality of signal vias are disposed through the clearance region so that the plurality of signal vias are isolated from the plurality of conductor planes. A conductor post is connected to one of the plurality of conductor planes and disposed between two of the signal vias in the clearance region.
    Type: Application
    Filed: May 26, 2008
    Publication date: April 7, 2011
    Applicant: NEC CORPORATION
    Inventors: Taras Kushita, Jun Sakai, Hikaru Kouta
  • Publication number: 20100328894
    Abstract: Provided is an optical interconnection device in which a volume required for cooling is reduced. In the optical interconnection device, a plurality of optical modules (12) are arranged on a periphery of an LSI (11) electrically connected to an electric wiring board (10), and liquid cooling mechanisms (13, 14) are respectively placed on the LSI (11) and the optical modules (12). The plurality of optical modules (12) may be arranged only on a surface of the electric wiring board (10) where the LSI (11) is mounted, only on a surface opposite to the surface where the LSI (11) is mounted, or on both the same surface as and the opposite surface to the surface where the LSI (11) is mounted.
    Type: Application
    Filed: February 16, 2009
    Publication date: December 30, 2010
    Inventors: Mikio Oda, Tomotaka Ishida, Hisaya Takahashi, Hideyuki Ono, Jun Sakai, Takashi Ohtsuka, Arihide Noda, Hikaru Kouta
  • Publication number: 20100147385
    Abstract: In an organic power generating device that generates electricity by receiving light, a positive electrode and a negative electrode, at least one of which has transparency, a power generating layer which is formed of a mixture of an electron donor material and a hole donor material and generates electricity upon reception of light and disposed between the positive electrode and the negative electrode, and an inorganic layer which has a work function larger than that of the positive electrode and is disposed between the power generating layer and the positive electrode, are provided. Accordingly, an efficiency to take off electric charges from the power generating layer can be increased, so that the organic power generating device with high efficiency and long life can be obtained.
    Type: Application
    Filed: July 26, 2006
    Publication date: June 17, 2010
    Applicant: MATSUSHITA ELECTRIC WORKS, LTD.
    Inventors: Kenji Kawano, Norihiro Ito, Takuya Komoda, Jun SAKAI
  • Publication number: 20100124490
    Abstract: A pulsed discharge is generated between tip ends of a rotating member such as a blade and a discharge electrode including a hard material such as cBN in dielectric liquid or gas by a power supply for discharge to melt the discharge electrode, and a part of the discharge electrode is attached to the tip end of the rotating member to form an abrasive coating film including the hard materials such as cBN.
    Type: Application
    Filed: April 17, 2009
    Publication date: May 20, 2010
    Applicants: IHI CORPORATION, C/O MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Hiroyuki Ochiai, Mitsutoshi Watanabe, Mikiya Arai, Shigeru Saburi, Tsuyoshi Yamakawa, Shogu Tsugumi, Jun Sakai, Akihiro Goto, Masao Akiyoshi
  • Publication number: 20100117228
    Abstract: A semiconductor device has an element interconnection 2, a top-layer element interconnection 4, a super-connect interconnection 10 and a bump 7. The element interconnection 2 is provided on a semiconductor substrate 1 through a plurality of insulating layers 50. The top-layer element interconnection 4 is formed above the element interconnection 2 by using a substantially equivalent process equipment. The super-connect interconnection 10 is provided on the top-layer element interconnection 4 through a super-connect insulating layer 9 having a thickness five or more times larger than that of the insulating layer 5, and has a thickness three or more times larger than that of each the element interconnection 2 and the top-layer element interconnection 4. The bump 7 is formed on the super-connect interconnection 10. The top-layer element interconnection 4 has a signal pad 4s, a power source pad 4v and a ground pad 4g.
    Type: Application
    Filed: February 13, 2008
    Publication date: May 13, 2010
    Applicant: NEC Corporation
    Inventors: Shintaro Yamamichi, Katsumi Kikuchi, Jun Sakai, Hikaru Kouta
  • Publication number: 20100048745
    Abstract: A porous polyimide obtained by removing a silica phase from an organic-inorganic polymer hybrid having a molecule structure in which a polyimide phase and the silica phase are held together by covalent bond.
    Type: Application
    Filed: September 18, 2009
    Publication date: February 25, 2010
    Applicant: IBIDEN CO., LTD
    Inventors: Yasuharu YAMADA, Tomoyuki Suzuki, Jun Sakai, Norihiro Tomokiyo
  • Publication number: 20100012189
    Abstract: The present invention provides an organic thin film solar cell having a novel photoelectric conversion layer with superior conversion efficiency from light to electricity and superior carrier transportability to an electrode. The photoelectric conversion layer is arranged between a pair of electrodes at least one of which has optical transparency, and comprises a multilayer film formed by alternately laminating an electron-donating organic semiconductor thin film and an electron-accepting thin film. The electron-donating organic semiconductor thin film is formed by organic semiconductor molecules in which cyclic compounds are bound in a linear fashion.
    Type: Application
    Filed: March 14, 2007
    Publication date: January 21, 2010
    Inventors: Jun Sakai, Kazuhiro Saito, Kunio Satio, Namiko Satio, Tetsuya Taima
  • Publication number: 20090200748
    Abstract: A pulsed discharge is generated between tip ends of a rotating member such as a blade and a discharge electrode including a hard material such as cBN in dielectric liquid or gas by a power supply for discharge to melt the discharge electrode, and a part of the discharge electrode is attached to the tip end of the rotating member to form an abrasive coating film including the hard materials such as cBN.
    Type: Application
    Filed: April 17, 2009
    Publication date: August 13, 2009
    Applicants: IHI CORPORATION, C/O MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Hiroyuki Ochiai, Mitsutoshi Watanabe, Mikiya Arai, Shigeru Saburi, Tsuyoshi Yamakawa, Shogo Tsugumi, Jun Sakai, Tsunao Tezuka, Akihiro Goto, Masao Akiyoshi
  • Patent number: 7537809
    Abstract: A pulsed discharge is generated between tip ends of a rotating member such as a blade and a discharge electrode including a hard material such as cBN in dielectric liquid or gas by a power supply for discharge to melt the discharge electrode, and a part of the discharge electrode is attached to the tip end of the rotating member to form an abrasive coating film including the hard materials such as cBN.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: May 26, 2009
    Assignees: IHI Corporation, Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiroyuki Ochiai, Mitsutoshi Watanabe, Mikiya Arai, Shigeru Saburi, Tsuyoshi Yamakawa, Shogo Tsugumi, Jun Sakai, Tsunao Tezuka, Akihiro Goto, Masao Akiyoshi
  • Publication number: 20090026565
    Abstract: The present invention includes: photoelectric conversion element 103 that converts electrical signals into optical signals and optical signals into electrical signals; and optical communication LSI 102 electrically connected to photoelectric conversion element 103. Also, the present invention includes electrical wiring substrate 101 including a plurality of electrodes 201 and 202 on which photoelectric conversion element 103 and optical communication LSI 102 are mounted by flip-chip attachment and a plurality of wiring layers 101a, 101b and 101c electrically connecting respective electrodes 201 and 202, wiring layers 101a, 101b and 101c being provided at an upper surface, a lower surface and an inner portion of electrical wiring substrate 101, respectively. Also, electrodes 201 and 202 to which photoelectric conversion element 103 is bonded are provided at a side surface of electrical wiring substrate 101.
    Type: Application
    Filed: February 2, 2007
    Publication date: January 29, 2009
    Inventors: Arihide Noda, Mikio Oda, Takashi Ohtsuka, Hisaya Takahashi, Hikaru Kouta, Jun Sakai
  • Patent number: 7477243
    Abstract: A virtual-space shift control apparatus includes a detecting element that detects a touch operation or a drag operation of a pointing device having a plurality of pointing elements, performed on a display screen and a viewpoint-position information generator that generates viewpoint position information of a virtual space image based on the detected touch or drag operation of the detecting element. A three-dimensional image generator is provided that generates data on the virtual space image seen from a viewpoint indicated by the viewpoint position information and outputting a three dimensional image to the display.
    Type: Grant
    Filed: May 29, 2003
    Date of Patent: January 13, 2009
    Assignees: EIT Co., Ltd., XIROKU, Inc.
    Inventors: Yasuji Ogawa, Kouki Shimiya, Jun Sakai
  • Patent number: 7434190
    Abstract: An analysis method of designing transmission lines of an integrated circuit packaging board including an integrated circuit chip, a printed circuit board, and an interposer disposed between the integrated circuit chip and the printed circuit board. A reference data file having information for dividing a series of transmission lines into connecting sections and/or continuous sections and a division model file having information on analysis models of a connecting section and a continuous section is prepared. The connecting sections are extracted from the series of transmission lines with reference to connection information. Boundaries for dividing the series of transmission lines into sections is determined with reference to the reference data file to generate division models. The division models are synthesized to form a synthesized model of the series of transmission lines to analyze electrical characteristics of the series of transmission lines.
    Type: Grant
    Filed: June 23, 2006
    Date of Patent: October 7, 2008
    Assignee: NEC Corporation
    Inventors: Hirobumi Inoue, Daisuke Ohshima, Jun Sakai, Mitsuru Furuya
  • Patent number: 7321166
    Abstract: It is to provide a wiring board for a semiconductor integrated circuit package, which exhibits an excellent signal property and a high effect for decreasing the switching noise at the time of mounting an LSI of an area-array structure. In a multilayer wiring board for a package, which comprises, on a wiring layer of an LSI chip mount surface, a ground pad, a power supply pad, and a signal pad for mounting LSI chip, and a ground plane that extends around a group of those pads, the ground pad disposed on the inner side, among the above-described pads, is connected to the ground plane that surrounds the pad group through a connecting wiring.
    Type: Grant
    Filed: November 16, 2005
    Date of Patent: January 22, 2008
    Assignees: NEC Corporation, NEC Electronics Corporation
    Inventors: Jun Sakai, Hirobumi Inoue, Kazuhiro Motonaga
  • Publication number: 20070270562
    Abstract: It is an object of the present invention to provide a siloxane-modified hyperbranched polyimide which has more excellent electric properties (low dielectric property), gas permeability, mechanical properties (low modulus), surface properties (adhesiveness) and the like while maintaining thermal stability, mechanical strength, chemical resistance and processability and the like intrinsic to polyimide and which may be variously functionalized and can be utilized advantageously in industrial applications. A siloxane structure represented by the following structural formula (1) is introduced into a three-dimensional structured hyperbranched polyimide molecule. (wherein R1 represents a hydrocarbon group having from 1 to 6 carbon atoms, and n indicates an integer of from 1 to 50).
    Type: Application
    Filed: July 24, 2007
    Publication date: November 22, 2007
    Applicant: National University Corporation Nagoya Institute of Technology
    Inventors: Yasuharu Yamada, Jun Sakai
  • Publication number: 20070117097
    Abstract: Novel proteins, novel genes encoding the same, plasmids respectively comprising these genes, transformants respectively comprising these plasmids, antibodies or fragments thereof against the above novel proteins, methods of detecting a bacterial infection, and novel polynucleotides are disclosed. The novel proteins are activated human macrophage-specific proteins.
    Type: Application
    Filed: January 21, 2004
    Publication date: May 24, 2007
    Applicant: Kureha Corporation
    Inventors: Kunitaka Hirose, Jun Sakai