Patents by Inventor Jun Taek Park

Jun Taek Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220191530
    Abstract: A method and apparatus for intra prediction include a prediction unit that is divided into sub-units and predicted in the sub-units. A video decoding method includes: determining whether to split a current block into multiple subblocks; when the current block is split into the multiple subblocks, determining a split direction for the current block between a horizontal split direction and a vertical split direction and the number of the subblocks, based on split information decoded from a bitstream and a width and a height of the current block; reconstructing the current block by sequentially reconstructing the subblocks, that are specified according to the split direction and the number of the subblocks, using intra prediction; and setting a grid of N samples at regular intervals in horizontal and vertical directions and performing deblock-filtering on, among boundaries between the subblocks in the current block, boundaries that coincide with a boundary of the grid.
    Type: Application
    Filed: March 12, 2020
    Publication date: June 16, 2022
    Inventors: Dong Gyu Sim, Jong Seok Lee, Sea Nae Park, Jun Taek Park, Seung Wook Park, Wha Pyeong Lim
  • Patent number: 11187976
    Abstract: A method of detecting defects of a photoresist pattern includes generating a scanning electron microscope (SEM) image of a surface of a photoresist pattern and signal intensity data relative to pixel position of the surface of the photoresist pattern. The method also includes setting a lower reference intensity threshold value and an upper reference intensity threshold value used as reference values for detecting defects. The method further includes classifying a pixel position of the signal intensity data having a signal intensity value which is less than the lower reference intensity threshold value or greater than the upper reference intensity threshold value as a defect position.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: November 30, 2021
    Assignee: SK hynix Inc.
    Inventor: Jun Taek Park
  • Publication number: 20210289201
    Abstract: There is provided an image decoding method comprising: deriving a first prediction value of a current block by using at least one sample included in a reference block, obtaining an illumination compensation parameter on the basis of a predetermined reference region, deriving a second prediction value of the current block by applying the illumination compensation parameter to the first prediction value and reconstructing the current block on the basis of the second prediction value.
    Type: Application
    Filed: July 18, 2019
    Publication date: September 16, 2021
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Gun BANG, Hui Yong KIM, Dong Gyu SIM, Seoung Jun OH, Sea Nae PARK, Jun Taek PARK, Jong Seok LEE
  • Publication number: 20200409256
    Abstract: A method of detecting defects of a photoresist pattern includes generating a scanning electron microscope (SEM) image of a surface of a photoresist pattern and signal intensity data relative to pixel position of the surface of the photoresist pattern. The method also includes setting a lower reference intensity threshold value and an upper reference intensity threshold value used as reference values for detecting defects. The method further includes classifying a pixel position of the signal intensity data having a signal intensity value which is less than the lower reference intensity threshold value or greater than the upper reference intensity threshold value as a defect position.
    Type: Application
    Filed: September 10, 2020
    Publication date: December 31, 2020
    Applicant: SK hynix Inc.
    Inventor: Jun Taek PARK
  • Patent number: 10802396
    Abstract: A method of detecting defects of a photoresist pattern includes generating a scanning electron microscope (SEM) image of a surface of a photoresist pattern and signal intensity data relative to pixel position of the surface of the photoresist pattern. The method also includes setting a lower reference intensity threshold value and an upper reference intensity threshold value used as reference values for detecting defects. The method further includes classifying a pixel position of the signal intensity data having a signal intensity value which is less than the lower reference intensity threshold value or greater than the upper reference intensity threshold value as a defect position.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: October 13, 2020
    Assignee: SK hynix Inc.
    Inventor: Jun Taek Park
  • Publication number: 20200142297
    Abstract: A method of detecting defects of a photoresist pattern includes generating a scanning electron microscope (SEM) image of a surface of a photoresist pattern and signal intensity data relative to pixel position of the surface of the photoresist pattern. The method also includes setting a lower reference intensity threshold value and an upper reference intensity threshold value used as reference values for detecting defects. The method further includes classifying a pixel position of the signal intensity data having a signal intensity value which is less than the lower reference intensity threshold value or greater than the upper reference intensity threshold value as a defect position.
    Type: Application
    Filed: May 30, 2019
    Publication date: May 7, 2020
    Applicant: SK hynix Inc.
    Inventor: Jun Taek PARK
  • Publication number: 20190286983
    Abstract: Provided is a machine learning-based semiconductor manufacturing yield prediction system and method. A result prediction method according to an embodiment of the present invention comprises: learning different neural network models by classifying different types of data according to their types and respectively inputting the classified different types of data to the different neural network models; and predicting result values by classifying input data according to their types and respectively inputting the classified input data to different neural network models. Therefore, it is possible to apply different neural network models to respective data according to their types, thereby ensuring a neural network model having a structure appropriate for the characteristics of each type of data and thus accurately predicting a result value.
    Type: Application
    Filed: November 29, 2017
    Publication date: September 19, 2019
    Applicant: SK HOLDINGS CO., LTD.
    Inventors: Hang Duk JUNG, Yong Sik MOON, Myung Seung SON, Min Hwan LEE, Jun Taek PARK
  • Patent number: 9478618
    Abstract: A semiconductor device includes a fin-shaped active region protruding from a surface of a base substrate. The fin-shaped active region includes a first impurity region and a second impurity region spaced apart from each other along a first direction and a channel region disposed between the first and second impurity regions. A trench is provided in the base substrate under the channel region. The trench extends in a second direction to intersect the fin-shaped active region in a plan view. A blocking layer fills the trench to overlap with the channel region of the fin-shaped active region. A gate is disposed to overlap with blocking layer and the channel region.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: October 25, 2016
    Assignee: SK Hynix Inc.
    Inventor: Jun Taek Park
  • Patent number: 8906584
    Abstract: A semiconductor device includes a cell mask pattern disposed in a cell region of a mask substrate and a vernier mask pattern disposed in a vernier region of the mask substrate. The vernier mask pattern includes a variable mask pattern portion to transfer a different shape of pattern depending on the magnitude of exposure energy.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: December 9, 2014
    Assignee: SK Hynix Inc.
    Inventors: Byoung Hoon Lee, Chang Moon Lim, Myoung Soo Kim, Jeong Su Park, Jun Taek Park, In Hwan Lee
  • Patent number: 8841219
    Abstract: Lithography processes are provided. The lithography process includes installing a reticle masking (REMA) part having a REMA open region in a lithography apparatus, loading a reticle including at least one reticle chip region in which circuit patterns are disposed into the lithography apparatus, and sequentially exposing a first wafer field, which includes a first chip region corresponding to the reticle chip region, and a second wafer field, which includes a second chip region corresponding to the reticle chip region, of a wafer to rays using the reticle and the REMA part to transfer images of the circuit patterns onto the wafer. An edge boundary of the REMA open region transferred on the first wafer field is located on a scribe lane region between the first and second chip regions while the first wafer field is exposed. Methods of manufacturing a semiconductor device using the lithography process are also provided.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: September 23, 2014
    Assignee: SK Hynix Inc.
    Inventors: Jun Taek Park, Chang Moon Lim, Seok Kyun Kim
  • Publication number: 20140065524
    Abstract: A semiconductor device includes a cell mask pattern disposed in a cell region of a mask substrate and a vernier mask pattern disposed in a vernier region of the mask substrate. The vernier mask pattern includes a variable mask pattern portion to transfer a different shape of pattern depending on the magnitude of exposure energy.
    Type: Application
    Filed: March 18, 2013
    Publication date: March 6, 2014
    Applicant: SK HYNIX INC.
    Inventors: Byoung Hoon LEE, Chang Moon LIM, Myoung Soo KIM, Jeong Su PARK, Jun Taek PARK, In Hwan LEE
  • Publication number: 20130210234
    Abstract: Lithography processes are provided. The lithography process includes installing a reticle masking (REMA) part having a REMA open region in a lithography apparatus, loading a reticle including at least one reticle chip region in which circuit patterns are disposed into the lithography apparatus, and sequentially exposing a first wafer field, which includes a first chip region corresponding to the reticle chip region, and a second wafer field, which includes a second chip region corresponding to the reticle chip region, of a wafer to rays using the reticle and the REMA part to transfer images of the circuit patterns onto the wafer. An edge boundary of the REMA open region transferred on the first wafer field is located on a scribe lane region between the first and second chip regions while the first wafer field is exposed. Methods of manufacturing a semiconductor device using the lithography process are also provided.
    Type: Application
    Filed: September 14, 2012
    Publication date: August 15, 2013
    Applicant: SK HYNIX INC.
    Inventors: Jun Taek PARK, Chang Moon LIM, Seok Kyun KIM
  • Patent number: 7571424
    Abstract: A lithography method has a simulation method for mathematically approximating a photoresist film pattern with a Diffused Aerial Image Model (“DAIM”) for semiconductor device fabrication. The DAIM is applied with at least two acids having heterogeneous diffusion characteristics.
    Type: Grant
    Filed: November 3, 2006
    Date of Patent: August 4, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventors: Chang Moon Lim, Jun Taek Park