Abstract: A method for producing (2S,5S)/(2R,5R)-5-hydroxypiperidine-2-carboxylic acid represented by formula (10) below: the method including removing the protecting group from the hydroxyl group in a compound represented by formula (7) below: (wherein P represents a protecting group, R3 represents an alkyl group containing 1 to 4 carbon atoms, and A represents an alkyl group containing 1 to 10 carbon atoms, an aryl group containing 6 to 12 carbon atoms, an alkyloxy group containing 1 to 4 carbon atoms, or an aralkyloxy group containing 7 to 20 carbon atoms) to synthesize a compound represented by formula (8) below: (wherein R3 represents an alkyl group containing 1 to 4 carbon atoms, and A represents an alkyl group containing 1 to 10 carbon atoms, an aryl group containing 6 to 12 carbon atoms, an alkyloxy group containing 1 to 4 carbon atoms, or an aralkyloxy group containing 7 to 20 carbon atoms).

Abstract: It is an object of the present invention to provide a novel method for producing (1R,2S)/(1S,2R)-1-amino-1-alkoxycarbonyl-2-vinylcyclopropane which is useful as a synthetic intermediate of therapeutic agents for hepatitis C and a synthetic intermediate thereof. According to the present invention, when a trans-2-butene derivative having a leaving group at each of the 1- and 4-positions is reacted with a malonic ester in the presence of a base, a specific amount of an alkali metal alkoxide or an alkali metal hydride is used as the base, and further a specific amount of a malonic ester is used to produce a cyclopropane diester, and further, chiral or achiral 1-amino-1-alkoxy-carbonyl-2-vinylcyclopropane and a salt thereof are synthesized using the cyclopropane diester.

Abstract: A microprocessor operation monitoring system whose own tasks are constituted by associating beforehand the task number of the task that is next to be started up, for each of the tasks constituting the program, and abnormality of microprocessor operation is detected by comparing and determining whether or not the announced task and the task to be started up match.

Abstract: A clock diagnosis circuit includes: a delay circuit to delay the clock by a prescribed time which is not more than the clock pulse width; an integral multiplication delay circuit to delay a delayed clock outputted from the delay circuit by a prescribed number of cycles; a first exclusive OR circuit to encode the clock using the delayed clock; a second exclusive OR circuit to decode an output of the first exclusive OR circuit using an output of the integral multiplication delay circuit; and a comparison circuit to compare the clock with an output of the second exclusive OR circuit to thereby detect a malfunction of the clock.

Abstract: A substation instrument control system is disclosed. The substation instrument control system includes a plurality of transformers that generate a plurality of waveform signals representing electric properties of a substation instrument main body. A merging unit is communicatively coupled to the plurality of transformers and includes a signal processing unit and a control unit. The signal processing unit receives the plurality of waveform signals from the plurality of transformers and converts the plurality of waveform signals to a digital signal. The control unit controls operation of the signal processing unit using a setting data. An intelligent electronic device is communicatively coupled to the merging unit and receives the digital signal from the merging unit.

Abstract: It is an object of the present invention to provide a novel method for producing (1R,2S)/(1S,2R)-1-amino-1-alkoxycarbonyl-2-vinylcyclopropane which is useful as a synthetic intermediate of therapeutic agents for hepatitis C and a synthetic intermediate thereof. According to the present invention, when a trans-2-butene derivative having a leaving group at each of the 1- and 4-positions is reacted with a malonic ester in the presence of a base, a specific amount of an alkali metal alkoxide or an alkali metal hydride is used as the base, and further a specific amount of a malonic ester is used to produce a cyclopropane diester, and further, chiral or achiral 1-amino-1-alkoxy-carbonyl-2-vinylcyclopropane and a salt thereof are synthesized using the cyclopropane diester.

Abstract: A clock diagnosis circuit includes: a delay circuit to delay the clock by a prescribed time which is not more than the clock pulse width; an integral multiplication delay circuit to delay a delayed clock outputted from the delay circuit by a prescribed number of cycles; a first exclusive OR circuit to encode the clock using the delayed clock; a second exclusive OR circuit to decode an output of the first exclusive OR circuit using an output of the integral multiplication delay circuit; and a comparison circuit to compare the clock with an output of the second exclusive OR circuit to thereby detect a malfunction of the clock.

Abstract: When a transaction layer circuit detects an error, error information in respect of transmission data is set in a TLP digest. The method includes: a step in which, at an endpoint (3a) that receives a memory read request transmitted by the root complex 1, if an error is detected during transmission of first data corresponding to the requested TLP, error information is set in the TLP digest and a completion with data attached is returned; a step in which the root complex (1) returns a memory read request based on the error information to the endpoint; a step in which the endpoint returns requested second data; and a step in which the root complex terminates the response after overwriting the error location of the first data that was held, with the second data.

Abstract: A processor includes a computation unit; a storage unit storing a program; and a data transmission circuit that transmits to an operation monitoring unit a signal corresponding to an instruction for reporting the execution stage of the program. The operation monitoring unit: includes a transition operation identification. circuit and a loop processing identification circuit. The transition operation identification circuit receives a start ID instruction with an attached ID that identifies a task; a termination ID instruction that identifies termination of task operation; and if the task is execution of loop processing, a loop instruction that reports the maximum value of the number of times of this loop processing. The transition operation identification circuit identifies success of the transition operations of the tasks of the program, based on the ID instructions. The loop processing identification circuit identifies abnormality of the number of times of loop processing.

Abstract: A first arithmetic operator (11) includes a first modular arithmetic coding encoder (11b) for encoding a numeric data transmitted by a command from a central controller (31) into a modular arithmetic code, a first arithmetic operation processor (11a) using the numeric data as modular arithmetic coded as an input operand, for executing an arithmetic operation based on a command from the central controller (13), to provide an output in the form of a modular arithmetic code, and a first modular arithmetic code decoder (11c) for determining presence or absence of a bit error in the numeric data output from the first arithmetic operation processor, correcting the bit error, if detected any, to output a decoded numeric data.

Abstract: A substation instrument control system is disclosed. The substation instrument control system includes a plurality of transformers that generate a plurality of waveform signals representing electric properties of a substation instrument main body. A merging unit is communicatively coupled to the plurality of transformers and includes a signal processing unit and a control unit. The signal processing unit receives the plurality of waveform signals from the plurality of transformers and converts the plurality of waveform signals to a digital signal. The control unit controls operation of the signal processing unit using a setting data. An intelligent electronic device is communicatively coupled to the merging unit and receives the digital signal from the merging unit.

Abstract: A microprocessor operation monitoring system whose own tasks are constituted by associating beforehand the task number of the task that is next to be started up, for each of the tasks constituting the program, and abnormality of microprocessor operation is detected by comparing and determining whether or not the announced task and the task to be started up match.

Abstract: A memory control unit controls writing and reading of data to the slave device according to an instruction from the master device. A bus diagnosis line is directly connected from the bus signal control circuit to a bus signal receiving terminal of the slave device without passing through the address bus and the control signal line. A bus signal abnormality processing unit compares an output bus signal output from the bus signal control circuit to the address bus and the control signal line with a feedback bus signal fed back through the bus diagnosis line to determine the presence/absence of a difference. The memory control unit elongates a bus cycle period of a bus cycle of operation being executed when it is determined in the bus signal abnormality processing unit that the difference is present.

Abstract: A PCI Express TLP processing circuit (10) comprises: a plurality of reception processing sections (2a1); a transmission processing section (2b); and a multiplexer (2c1) that performs transmission to the transmission processing section, selecting one of the reception processing sections; and at least a reception processing section comprises: a redundancy code generating circuit (12); an LCRC/sequential number detection circuit (13); a buffer memory (14); a packet control circuit section (16) that controls transmission for normal transmission to the transmission destination of the TLP in question or for nullifying transmission; and the transmission processing section comprises: a sequential number generating circuit (19); an LCRC generating circuit (20) and a relay circuit error detection circuit (21), whereby data integrity of the transmitted TLP can be guaranteed.

Abstract: An object of the present invention is to provide a novel method for producing a steroid compound. The present invention provides a method for producing 3,7-dioxo-5?-cholanic acid or ester derivatives thereof, which uses, as raw materials, sterols having double bonds at positions 5 and 24, such as cholesta-5,7,24-trien-3?-ol, ergosta-5,7,24(28)-trien-3?-ol, desmosterol, fucosterol, or ergosta-5,24(28)-dien-3?-ol, and which comprises the following 4 steps: (I) a step of performing oxidation of a hydroxyl group at position 3 and isomerization of a double bond at position 5 to position 4; (II) a step of converting position 24 to a carboxyl group or an ester derivative thereof by the oxidative cleavage of a side chain; (III) a step of introducing an oxygen functional group into position 7; and (IV) a step of constructing a 5?-configuration by reduction of a double bond at position 4.

Abstract: For a control apparatus to be boundary scan testable even when running, including processor cores in an operator to be capable of self-repairing a troubling part, an operator (2) has processor cores (2a, 2b) connected to a boundary scan bus (12), and adapted to mutually diagnose opponent processor cores for troubles, by boundary scan testing each other in a time-dividing manner.

Abstract: When a transaction layer circuit detects an error, error information in respect of transmission data is set in a TLP digest. The method includes: a step in which, at an endpoint (3a) that receives a memory read request transmitted by the root complex 1, if an error is detected during transmission of first data corresponding to the requested TLP, error information is set in the TLP digest and a completion with data attached is returned; a step in which the root complex (1) returns a memory read request based on the error information to the endpoint; a step in which the endpoint returns requested second data; and a step in which the root complex terminates the response after overwriting the error location of the first data that was held, with the second data.

Abstract: It is an object of the present invention to provide a novel method for producing a steroid compound. The present invention provides a method for producing 5?-3,7-dioxocholanic acid or an ester derivative thereof, using, as a raw material, a sterol having double bonds at position 5 and at position 24, such as cholesta-5,7,24-trien-3?-ol, ergosta-5,7,24(28)-trien-3?-ol, desmosterol, fucosterol, or ergosta-5,24(28)-dien-3?-ol, via the following 4 steps: (I) a step involving oxidation of a hydroxyl group at position 3 and isomerization of a double bond at position 5 to position 4; (II) a step involving the oxidative cleavage of a side chain to convert position 24 to a carboxyl group or an ester derivative thereof; (III) a step of introducing an oxygen functional group into position 7; and (IV) a step of constructing a 5? configuration by reductive saturation of a double bond at position 4.

Abstract: The object of the present invention is to provide 3-hydroxy-3-(2-thienyl)propionamides useful as synthesis intermediates of pharmaceutical preparations and the like and a method for obtaining optically active 3-amino-1-(2-thienyl)-1-propanols using the same with high reaction yield, high optical yield and industrially low cost. According to the present invention, 3-amino-1-(2-thienyl)-1-propanols are obtained by carrying out asymmetric reduction of a ?-ketocarbonyl compound having thiophene ring in the presence of a catalyst constituted from a compound of a group VIII or IX metal in the periodic table (e.g., a ruthenium compound) and an asymmetric ligand represented by a specified optically active diamine derivative (e.g., a diphenylethylenediamine derivative), or using a cell, a treated product of said cell or the like of a microorganism, and as occasion demands, carrying out amidation of the ester group and then carrying out reduction of the amido group.

Abstract: A memory control unit controls writing and reading of data to the slave device according to an instruction from the master device. A bus diagnosis line is directly connected from the bus signal control circuit to a bus signal receiving terminal of the slave device without passing through the address bus and the control signal line. A bus signal abnormality processing unit compares an output bus signal output from the bus signal control circuit to the address bus and the control signal line with a feedback bus signal fed back through the bus diagnosis line to determine the presence/absence of a difference. The memory control unit elongates a bus cycle period of a bus cycle of operation being executed when it is determined in the bus signal abnormality processing unit that the difference is present.