Abstract: A display apparatus includes a first pad at one side of a substrate; a first semiconductor layer on the substrate; a first crack detection electrode interposed between the substrate and the first semiconductor layer, and including a first end portion at the one side and a second end portion at another side; a second crack detection electrode disposed on the first semiconductor layer, and including a first end portion located at the one side and a second end portion connected to the second end portion of the first crack detection electrode; and a first auxiliary electrode disposed on the second conductive layer, and including a first end portion connected to the second end portion of the first crack detection electrode and a second end portion electrically connected to the first pad.

Abstract: A display panel and a method of manufacturing the display panel are provided. The display panel includes: a substrate including a transmission area, a display area surrounding the transmission area, and an intermediate area between the transmission area and the display area; a light emitting device; and a groove in the intermediate area and including a first opening of a metal layer including a first sublayer, a second sublayer, and a third sublayer sequentially stacked and a second opening of an inorganic layer covering the metal layer, wherein the first opening includes a first opening of the first sublayer, a second opening of the second sublayer, and a third opening of the third sublayer, which overlap each other, and an inner surface of the second sublayer includes a concave portion recessed in a direction farther away from a center of the first opening than an inner surface of the first sublayer and an inner surface of the third sublayer.

Abstract: A display panel includes a substrate including a first region, a second region, a non-display area that surrounds the first region and the second region, and a display area that surrounds the non-display area; a plurality of pixels arranged on the display area; a plurality of dummy pixels arranged on the non-display area and emitting no light; and a plurality of signal lines configured to electrically connect the plurality of pixels to the plurality of dummy pixels. Some of the plurality of dummy pixels are arranged between the first region and the second region.

Abstract: A display apparatus includes a first pad at one side of a substrate; a first semiconductor layer on the substrate; a first crack detection electrode interposed between the substrate and the first semiconductor layer, and including a first end portion at the one side and a second end portion at another side; a second crack detection electrode disposed on the first semiconductor layer, and including a first end portion located at the one side and a second end portion connected to the second end portion of the first crack detection electrode; and a first auxiliary electrode disposed on the second conductive layer, and including a first end portion connected to the second end portion of the first crack detection electrode and a second end portion electrically connected to the first pad.

Abstract: A display apparatus includes: a first pixel circuit on the substrate and including a first driving thin-film transistor and a first storage capacitor electrically connected to the first driving thin-film transistor; a second pixel circuit adjacent to the first pixel circuit and including a second driving thin-film transistor and a second storage capacitor electrically connected to the second driving thin-film transistor; a first initialization voltage line electrically connected to the first pixel circuit and the second pixel circuit; a second initialization voltage line electrically connected to the first initialization voltage line; and a driving voltage line between the first pixel circuit and the second pixel circuit, wherein a channel area of the first driving thin-film transistor or a channel area of the second driving thin-film transistor is between the second initialization voltage line and the driving voltage line.

Abstract: A display panel includes a substrate including a first region, a second region, a non-display area that surrounds the first region and the second region, and a display area that surrounds the non-display area; a plurality of pixels arranged on the display area; a plurality of dummy pixels arranged on the non-display area and emitting no light; and a plurality of signal lines configured to electrically connect the plurality of pixels to the plurality of dummy pixels. Some of the plurality of dummy pixels are arranged between the first region and the second region.

Abstract: A display apparatus includes: a first pixel circuit on the substrate and including a first driving thin-film transistor and a first storage capacitor electrically connected to the first driving thin-film transistor; a second pixel circuit adjacent to the first pixel circuit and including a second driving thin-film transistor and a second storage capacitor electrically connected to the second driving thin-film transistor; a first initialization voltage line electrically connected to the first pixel circuit and the second pixel circuit; a second initialization voltage line electrically connected to the first initialization voltage line; and a driving voltage line between the first pixel circuit and the second pixel circuit, wherein a channel area of the first driving thin-film transistor or a channel area of the second driving thin-film transistor is between the second initialization voltage line and the driving voltage line.

Abstract: A display apparatus includes a substrate including a display area and a peripheral area outside the display area, a power supply line arranged in the peripheral area, a gate driving circuit arranged between the power supply line and the display area and including a plurality of stages arranged in a direction, and a signal line arranged in the peripheral area, electrically connected to a first stage from among the plurality of stages of the gate driving circuit, and configured to transmit a start signal, wherein the signal line overlaps the power supply line in a plan view and is arranged between the substrate and the power supply line.

Abstract: A display apparatus includes: a substrate; a driving transistor over the substrate, and including a semiconductor layer including a driving active area; a driving voltage line between the substrate and the semiconductor layer, and extending in a first direction; a first capacitor including a first capacitor electrode at the same layer as that of the driving voltage line, and a second capacitor electrode at the same layer as that of the semiconductor layer; and a second capacitor including a third capacitor electrode at the same layer as that of the semiconductor layer, and a fourth capacitor electrode as a part of the driving voltage line.

Abstract: A display device includes a scan line extending in a first direction, a data line and a driving voltage line extending in a second direction crossing the first direction, a switching thin film transistor (“TFT”) connected to the scan line and the data line, a driving TFT connected to the switching TFT and including a driving semiconductor layer and a driving gate electrode, a storage capacitor connected to the driving TFT and including first and second storage capacitor plates, a node connection line between the data line and the driving voltage line and connected to the driving gate electrode, and a shielding portion between the data line and the node connection line.

Abstract: Each of a plurality of stages of a gate driving circuit includes a first node controller configured to control voltage levels of a first node and a second node, a second node controller configured to control a voltage level of a third node, and a first output unit configured to output the first voltage or the second voltage as a gate signal according to the voltage levels of the second node and the third node. The first node controller includes a single gate transistor having one gate and a dual gate transistor having a pair of gates disposed in different layers with a semiconductor disposed therebetween.

Abstract: A display apparatus includes a substrate, a display unit, a wire structure, and a first power supply structure. The substrate includes a display area, a first non-display area neighboring the display area, a second non-display area, and a bending area between the first non-display area and the second non-display area. The display unit is on the display area. The wire structure is on the first non-display area, the bending area, and the second non-display area and includes a first wire set and a second wire set overlapping the bending area and spaced from each other. The first power supply structure includes a first conductive line and a second conductive line on the first non-display area and the second non-display area, respectively, and includes a connection line connecting the first conductive line to the second conductive line and positioned between the first wire set and the second wire set. optimized.

Abstract: A display apparatus includes a first pad at one side of a substrate; a first semiconductor layer on the substrate; a first crack detection electrode interposed between the substrate and the first semiconductor layer, and including a first end portion at the one side and a second end portion at another side; a second crack detection electrode disposed on the first semiconductor layer, and including a first end portion located at the one side and a second end portion connected to the second end portion of the first crack detection electrode; and a first auxiliary electrode disposed on the second conductive layer, and including a first end portion connected to the second end portion of the first crack detection electrode and a second end portion electrically connected to the first pad.

Abstract: A display panel includes a substrate including a first region, a second region, a non-display area that surrounds the first region and the second region, and a display area that surrounds the non-display area; a plurality of pixels arranged on the display area; a plurality of dummy pixels arranged on the non-display area and emitting no light; and a plurality of signal lines configured to electrically connect the plurality of pixels to the plurality of dummy pixels. Some of the plurality of dummy pixels are arranged between the first region and the second region.

Abstract: A display apparatus including first-through-third pixels sequentially arranged in a row direction, a first shielding electrode arranged between the first pixel and the second pixel, a first voltage line configured to transmit a first initialization voltage, a second voltage line configured to transmit a second initialization voltage, a first contact plug connecting the first pixel and the second pixel to the first voltage line, a second contact plug connecting the second pixel and the third pixel to the second voltage line, and a third contact plug connecting the first shielding electrode to the first voltage line.

Abstract: A display device includes a scan line extending in a first direction, a data line and a driving voltage line extending in a second direction crossing the first direction, a switching thin film transistor (“TFT”) connected to the scan line and the data line, a driving TFT connected to the switching TFT and including a driving semiconductor layer and a driving gate electrode, a storage capacitor connected to the driving TFT and including first and second storage capacitor plates, a node connection line between the data line and the driving voltage line and connected to the driving gate electrode, and a shielding portion between the data line and the node connection line.

Abstract: A display panel may include the following elements: a substrate including an opening area, a display area surrounding the opening area, and a first non-display area between the opening area and the display area; a data line positioned at a first side relative to the opening area; a first scan line; a second scan line; a first pixel connected to the data line and the first scan line; a second pixel connected to the data line and the second scan line; a first emission control line connected to the first pixel; a connecting section positioned on the first non-display area; a second emission control line connected to the second pixel and connected through the connecting section to the first emission control line; and an emission control driver configured to simultaneously provide emission control signals to the first emission control line and the second emission control line.

Abstract: A display panel includes: first light-emitting diodes at a first display area, second light-emitting diodes at a second display area located within the first display area, and third light-emitting diodes at a third display area between the first display area and the second display area; first sub-pixel circuits at the first display area, and electrically connected to the first light-emitting diodes, respectively; second and third sub-pixel circuits at the third display area, the second sub-pixel circuits being electrically connected to the second light-emitting diodes, and the third sub-pixel circuits being electrically connected to the third light-emitting diodes; a first conductive bus line extending in a first direction, and electrically connecting one of the second light-emitting diodes to one of the second sub-pixel circuits; and a second conductive bus line extending in a second direction, and electrically connecting another of the second light-emitting diodes to another of the second sub-pixel circuits

Abstract: A display panel includes a plurality of first sub-pixel circuits in a first display area electrically connected to first light-emitting diodes in the first display area, and subpixel circuits in the third display area, wherein first sub-pixel circuits arranged in a (k)th row (k is a natural number) in a first direction are connected to a first gate line, first sub-pixel circuits arranged in a (k+1)th row are connected to a second gate line, and first sub-pixel circuits arranged in a (k+2)th row are connected to a third gate line, wherein the first and third gate lines are respectively and electrically connected to two sub-pixel circuits adjacent to each other in a second direction intersecting the first direction in the third display area, and the second gate line is not electrically connected to the sub-pixel circuits located in the third display area and bypasses the second display area.

Abstract: A display panel includes a substrate including a first region, a second region, a non-display area that surrounds the first region and the second region, and a display area that surrounds the non-display area; a plurality of pixels arranged on the display area; a plurality of dummy pixels arranged on the non-display area and emitting no light; and a plurality of signal lines configured to electrically connect the plurality of pixels to the plurality of dummy pixels. Some of the plurality of dummy pixels are arranged between the first region and the second region.