Abstract: Example embodiments of the present invention relate to a light emitting device having a connection structure and a method of manufacturing the light emitting device. The method of manufacturing may include forming a light emitting region and electrode layers on a substrate in which a plurality of cell regions and a bridge for partially connecting the cell regions are disposed, thereby providing a light emitting device that controls stress with relative ease and integrates electrical connections between the cell regions.

Abstract: Example embodiments are directed to a light-emitting device including a patterned emitting unit and a method of manufacturing the light-emitting device. The light-emitting device includes a first electrode on a top of a semiconductor layer, and a second electrode on a bottom of the semiconductor layer, wherein the semiconductor layer is a pattern array formed of a plurality of stacks. A space between the plurality of stacks is filled with an insulating layer, and the first electrode is on the insulating layer.

Abstract: A semiconductor device may reduce a dislocation density and tensile stress by forming a plurality of interlayers between neighboring clad layers. The semiconductor device may include a plurality of clad layers on a substrate and a plurality of interlayers between neighboring clad layers.

Abstract: Provided is a method of manufacturing a light emitting device from a large-area bonding wafer by using a wafer bonding method using. The method may include forming a plurality of semiconductor layers, each having an active region for emitting light, on a plurality of growth substrates. The method may also include arranging the plurality of growth substrates on which the semiconductor layers are formed on one bonding substrate and simultaneously processing each of the semiconductor layers formed on each of the growth substrates through subsequent processes. The bonding wafer may be formed of a material that reduces or prevents bending or warping due to a difference of thermal expansion coefficients between a wafer material, such as sapphire, and a bonding wafer. According to the above method, because a plurality of wafers may be processed by one process, mass production of LEDs may be possible which may reduce manufacturing costs.

Abstract: Example embodiments provide a light emitting diode (LED) having improved polarization characteristics. The LED may include wire grid polarizers on and below a light emitting unit. The wire grid polarizers may be arranged at an angle to each other. Thus, because the LED may emit a light beam in a given polarization direction, an expensive component, e.g., a dual brightness enhanced film (DBEF), is not required. Thus, manufacturing costs of a backlight unit including the LED and a display apparatus including the backlight unit may be reduced.

Abstract: A light emitting device may include a substrate, an n-type clad layer, an active layer, and a p-type clad layer. A concave-convex pattern having a plurality of grooves and a mesa between each of the plurality of grooves may be formed on the substrate, and a reflective layer may be formed on the surfaces of the plurality of grooves or the mesa between each of the plurality of grooves. Therefore, light generated in the active layer may be reflected by the reflective layer, and extracted to an external location.

Abstract: Example embodiments relate to a light emitting device and a method of fabricating the light emitting device. The light emitting device may include an n-type clad layer including a plurality of nitride semiconductor layers, at least one interlayer disposed between the plurality of nitride semiconductor layers, a via hole in which a first electrode is formed, a p-type clad layer, and an active layer between the n-type clad layer and the p-type clad layer.

Abstract: A gallium nitride (GaN) light emitting device and a method of manufacturing the same are provided, the method including sequentially forming a buffer layer and a first nitride layer on a silicon substrate, and forming a plurality of patterns by dry etching the first nitride layer. Each pattern includes a pair of sidewalls facing each other. A reflective layer is deposited on the first nitride layer so that one sidewall of the pair is exposed by the reflective layer. An n-type nitride layer that covers the first nitride layer is formed by horizontally growing an n-type nitride from the exposed sidewall, and a GaN-based light emitting structure layer is formed on the n-type nitride layer.

Abstract: A method of forming a nanowire and a semiconductor device comprising the nanowire are provided. The method of forming a nanowire includes forming a patterned SiyGe1-y layer (where, y is a real number that satisfies 0?y<1) on a base layer, and forming a first oxide layer and at least one nanowire within the first oxide layer by performing a first oxidation process on the patterned SiyGe1-y layer.

Abstract: Light emitting devices and methods of manufacturing the light emitting devices. The light emitting devices include a silicon substrate; a metal buffer layer on the silicon substrate, a patterned dispersion Bragg reflection (DBR) layer on the metal buffer layer; and a nitride-based thin film layer on the patterned DBR layer and regions between patterns of the DBR layer.

Abstract: Substrate structures and methods of manufacturing the substrate structures. A substrate structure is manufactured by forming a protrusion area of a substrate under a buffer layer, and forming a semiconductor layer on the buffer layer, thereby separating the substrate from the buffer layer except in an area where the protrusion is formed. The semiconductor layer on the buffer layer not contacting the substrate has freestanding characteristics, and dislocation or cracks may be reduced and/or prevented.

Abstract: Example embodiments provide a light emitting diode (LED) having improved polarization characteristics. The LED may include wire grid polarizers on and below a light emitting unit. The wire grid polarizers may be arranged at an angle to each other. Thus, because the LED may emit a light beam in a given polarization direction, an expensive component, e.g., a dual brightness enhanced film (DBEF), is not required. Thus, manufacturing costs of a backlight unit including the LED and a display apparatus including the backlight unit may be reduced.

Abstract: Provided is a method of manufacturing a light emitting device from a large-area bonding wafer by using a wafer bonding method using. The method may include forming a plurality of semiconductor layers, each having an active region for emitting light, on a plurality of growth substrates. The method may also include arranging the plurality of growth substrates on which the semiconductor layers are formed on one bonding substrate and simultaneously processing each of the semiconductor layers formed on each of the growth substrates through subsequent processes. The bonding wafer may be formed of a material that reduces or prevents bending or warping due to a difference of thermal expansion coefficients between a wafer material, such as sapphire, and a bonding wafer. According to the above method, because a plurality of wafers may be processed by one process, mass production of LEDs may be possible which may reduce manufacturing costs.

Abstract: Provided is a light emitting diode (LED) manufactured by using a wafer bonding method and a method of manufacturing a LED by using a wafer bonding method. The wafer bonding method may include interposing a stress relaxation layer formed of a metal between a semiconductor layer and a bonding substrate. When the stress relaxation layer is used, stress between the bonding substrate and a growth substrate may be offset due to the flexibility of metal, and accordingly, bending or warpage of the bonding substrate may be reduced or prevented.

Abstract: A semiconductor optical device includes a silicon substrate and a Group III-V semiconductor gain layer. The Group III-V semiconductor gain layer is formed on the silicon substrate. The silicon substrate or the Group III-V semiconductor gain layer has a dispersion Bragg grating formed therein. In a method of manufacturing a semiconductor optical device, a Group III-V semiconductor gain layer is formed on a silicon substrate. A dispersion Bragg grating is formed on the silicon substrate or the Group III-V semiconductor gain layer.

Abstract: Example embodiments may provide an increased efficiency laser chip and/or a vertical external cavity surface emitting laser (VECSEL) using the same. Example embodiment laser chips may include a substrate; a DBR (distributed Bragg reflector) layer on the substrate, an active layer on the DBR layer having multiple quantum wells excited by a pump beam to generate light, and/or an upper coating layer on the active layer by alternately stacking first and second layers each having different refractive indexes. Thicknesses of the first and second layers may be substantially equal to a quarter of a wavelength of light generated by the active layer.

Abstract: A vertical external cavity surface emitting laser (VECSEL) in which the full-width at half maximum (FWHM) of laser light is reduced by two etalon filter layers to improve the efficiency of second harmonic (SHG) crystal is provided. The VECSEL includes: a laser chip for generating laser light; a first etalon filter layer formed on the laser chip; a second etalon filter layer that is formed on the first etalon filter layer and has a different refractive index than the first etalon filter layer; a first mirror separated from and disposed obliquely to the laser chip; a second mirror for reflecting the laser light reflected from the first mirror back to the first mirror to form a cavity with the laser chip; and an SHG crystal disposed along an optical path between the first and second mirrors and doubles the frequency of the laser light generated in the laser chip.

Abstract: Provided is a CMOS transistor formed using Ge condensation and a method of fabricating the same. The CMOS transistor may include an insulating layer, a silicon layer on the insulating layer and including a p-MOS transistor region and an n-MOS transistor region, a first gate insulating layer and a first gate on a channel region of the p-MOS transistor region, and a second gate insulating layer and a second gate on a channel region of the n-MOS transistor region, wherein a source region and a drain region of the p-MOS transistor region may be tensile-strained due to Ge condensation, and the channel region of the n-MOS transistor region may be tensile-strained due to the Ge condensation.

Abstract: A Vertical External Cavity Surface Emitting Laser (VECSEL) system is provided. The VECSEL system includes a laser device including an active layer in which laser light is generated by pumping and a reflector reflecting the laser light generated in the active layer; an optical element that forms a cavity together with the reflector of the laser device and reduces a line width of laser light; and a SHG (Second Harmonic Generation) device that is disposed between the laser device and the optical element and doubles the frequency of laser light.

Abstract: A method of forming a nanowire and a semiconductor device comprising the nanowire are provided. The method of forming a nanowire includes forming a patterned SiyGe1-y layer (where, y is a real number that satisfies 0?y<1) on a base layer, and forming a first oxide layer and at least one nanowire within the first oxide layer by performing a first oxidation process on the patterned SiyGe1-y layer.