Abstract: A GOA circuit, a display panel and a display apparatus are provided. The GOA circuit includes: a forward/backward scanning control module configured to control, according to a forward scanning control signal or a backward scanning control signal, the GOA circuit to perform forward scanning or backward scanning, the level of an output signal from the forward/backward scanning control module being greater than a preset value; and, an output control module configured to control, according to a clock signal in a current level, the output of a gate driving signal in the current level.

Abstract: A method, a device, and an electronic apparatus for scan signal generation are provided. The method includes acquiring an initial clock signal, processing the initial clock signal to generate a plurality of target clock signals, encoding the plurality of target clock signals according to a predetermined logic relationship to generate a plurality of ordered logic signals, decoding the plurality of ordered logic signals, and generating a plurality of scan signals according to a decoding result.

Abstract: A gate driver circuit and a liquid crystal panel using the same are provided. The gate driver circuit includes a forward/reverse switching module, a low electrical potential line, and a synchronization module. The forward/reverse switching module includes an up to down terminal and a down to up terminal. The synchronization module is configured to electrically conduct the low electrical potential line with one of the up to down terminal and the down to up terminal which has a lower electrical potential.

Abstract: The invention provides a GOA circuit, a display panel and a display device. The GOA circuit includes: a first voltage stabilizing module, including a first capacitor and a second capacitor, and one end of the first capacitor is connected to a connection point between a forward scan control signal and a forward and reverse scan control module; one end of the second capacitor is connected to a connection point between a reverse scan control signal and the forward and reverse scan control module.

Abstract: A gate driver of array (GOA) circuit and a display device are disclosed. An n-th sub-circuit in the GOA circuit includes a control module, an output module, a pull-up supplement module, and a leakage switch. The control module is electrically connected to a positive scan control terminal, a negative scan control terminal, an (n?2)th scan terminal, an (n+2)th scan terminal, an (n+1)th clock terminal, an (n?1)th clock terminal, a high voltage terminal, and a low voltage terminal. The output module is electrically connected to the high voltage terminal, the low voltage terminal, an n-th clock terminal, an n-th scan terminal, and a controllable terminal. The pull-up supplement module includes a supplement switch that is electrically connected to the high voltage terminal, the control module, and the output module. The leakage switch is electrically connected to the control module, the output module, the supplement switch, and the low voltage terminal.

Abstract: The present disclosure provides an LTPS type TFT and a method for manufacturing the same. The TFT includes a first contact hole and a second contact hole, where the first contact hole and the second contact hole pass through the third insulating layer, the second insulating layer, and a portion of the first insulating layer, such that a portion of the heavily doped area is exposed. In addition, a transparent electrode is electrically connected to the source/drain electrode or the second gate electrode and a portion of the heavily doped area.

Abstract: A manufacturing method for LTPS TFT substrate is disclosed. Through performing two etchings on the gate metal layer, ion heavy doping and ion light doping of the polysilicon active layer are performed in a self-aligned manner such that the LDD structure of the polysilicon active layer is symmetrically distributed on two sides of the gate electrode, which is beneficial to improve device characteristics, is more stable and reliable than the conventional technology, and can reduce the number of process masks, save mask cost, operation cost, material cost and the time cost. The thinning process of the gate insulation layer can reduce the thickness of the gate insulation layer corresponding to the heavily doped region of the polysilicon active layer, so that the ion implantation efficiency can be effectively improved.

Abstract: The present disclosure provides an LTPS type TFT and a method for manufacturing the same. The TFT includes a first contact hole and a second contact hole, where the first contact hole and the second contact hole pass through the third insulating layer, the second insulating layer, and a portion of the first insulating layer, such that a portion of the heavily doped area is exposed. In addition, a transparent electrode is electrically connected to the source/drain electrode or the second gate electrode and a portion of the heavily doped area.

Abstract: The invention provides a GOA circuit, a display panel and a display device. The GOA circuit includes: a first voltage stabilizing module, including a first capacitor and a second capacitor, and one end of the first capacitor is connected to a connection point between a forward scan control signal and a forward and reverse scan control module; one end of the second capacitor is connected to a connection point between a reverse scan control signal and the forward and reverse scan control module.

Abstract: A GOA circuit, a display panel and a display apparatus are provided. The GOA circuit includes: a forward/backward scanning control module configured to control, according to a forward scanning control signal or a backward scanning control signal, the GOA circuit to perform forward scanning or backward scanning, the level of an output signal from the forward/backward scanning control module being greater than a preset value; and, an output control module configured to control, according to a clock signal in a current level, the output of a gate driving signal in the current level.

Abstract: A gate driver of array (GOA) circuit and a display device are disclosed. An n-th sub-circuit in the GOA circuit includes a control module, an output module, a pull-up supplement module, and a leakage switch. The pull-up supplement module includes a supplement switch and an auxiliary switch. The supplement switch is coupled to the auxiliary switch, the control module, and the output module. The auxiliary switch is coupled to the supplement switch, the control module, and the output module. The leakage switch is coupled to the control module, the output module, the supplement switch, and the auxiliary switch.

Abstract: A pixel driving circuit is provided. The pixel driving circuit comprises a reset module, a compensation module and light emitting module, wherein the reset module is configured to transmit a data signal to the compensation module to reset the compensation module under controlling of a first driving signal, the compensation module is configured to write the data signal to compensate a threshold voltage under controlling of a second driving signal, and the light emitting module is configured to emit light under controlling of a third driving signal.

Abstract: A gate driver circuit and a liquid crystal panel using the same are provided. The gate driver circuit includes a forward/reverse switching module, a low electrical potential line, and a synchronization module. The forward/reverse switching module includes an up to down terminal and a down to up terminal. The synchronization module is configured to electrically conduct the low electrical potential line with one of the up to down terminal and the down to up terminal which has a lower electrical potential.

Abstract: A pixel driving circuit is provided. The pixel driving circuit comprises a reset module, a compensation module and light emitting module, wherein the reset module is configured to transmit a data signal to the compensation module to reset the compensation module under controlling of a first driving signal, the compensation module is configured to write the data signal to compensate a threshold voltage under controlling of a second driving signal, and the light emitting module is configured to emit light under controlling of a third driving signal.

Abstract: A gate driver of array (GOA) circuit and a display device are disclosed. An n-th sub-circuit in the GOA circuit includes a control module, an output module, a pull-up supplement module, and a leakage switch. The control module is electrically connected to a positive scan control terminal, a negative scan control terminal, an (n?2)th scan terminal, an (n+2)th scan terminal, an (n+1)th clock terminal, an (n?1)th clock terminal, a high voltage terminal, and a low voltage terminal. The output module is electrically connected to the high voltage terminal, the low voltage terminal, an n-th clock terminal, an n-th scan terminal, and a controllable terminal. The pull-up supplement module includes a supplement switch that is electrically connected to the high voltage terminal, the control module, and the output module. The leakage switch is electrically connected to the control module, the output module, the supplement switch, and the low voltage terminal.

Abstract: This invention provides a GOA circuit comprising m cascaded GOA units. An n-th GOA unit includes an output control module, a forward/backward scanning control module, a node signal control module, a second pull-down circuit, a first pull-down circuit and a pull-up circuit. The forward/backward scanning control module control the GOA circuit to perform a forward or a backward scanning. The output control module controls an output of an n-th gate driving signal. The first pull-down circuit comprises a seventh thin film transistor. The second pull-down circuit comprises a fifth thin film transistor. The node signal control module control the fifth thin film transistor. The pull-up circuit includes an eighth thin film transistor. After the LCD panel is powered off, the second global control signal becomes a low level. This invention can eliminate a ghost image in the LCD panel when electricity is powered off, and improve user experience.

Abstract: A gate driving circuit provided in the disclosure comprises a pull-up control module configured to generate a first control signal when power is turned off, a pull-up output module configured to output a high potential under control of the first control signal, a pull-down control module configured to generate a second control signal when power is turned off, and a pull-down output module configured to output a low potential under control of the second control signal. Wherein, the output terminals of the pull-up output module and the pull-down output module are connected to the output terminal of a Nth-stage gate driving unit, and, when power is turned off, the pull-up output module and the pull-down output module together make the output terminal of the Nth-stage gate driving unit output the high potential. The image remained on the liquid crystal screen when power is turned off suddenly is cleaned quickly thereby.

Abstract: The present disclosure provides an LTPS type TFT and a method for manufacturing the same. The TFT includes a first contact hole and a second contact hole, where the first contact hole and the second contact hole pass through the third insulating layer, the second insulating layer, and a portion of the first insulating layer, such that a portion of the heavily doped area is exposed. In addition, a transparent electrode is electrically connected to the source/drain electrode or the second gate electrode and a portion of the heavily doped area.

Abstract: The disclosure provides a liquid crystal display panel, an array substrate and a manufacturing method thereof. In the method, controllable resistance spacer layers are formed on at least one of a source doped region and a drain doped region of a low temperature polysilicon active layer. When a turn-on signal is not applied to the gate layer, the controllable resistance spacer layers serve as a blocking action for a flowing current; and when the turn-on signal is applied to the gate layer, the controllable resistance spacer layers serve as a conducting action for the flowing current, such that contact regions formed of the controllable resistance spacer layers are respectively connected with the corresponding source layer and the corresponding drain through the controllable resistance spacer layers. Therefore, the disclosure is capable of effectively decreasing a leakage of a thin film transistor.

Abstract: This invention provides a GOA circuit comprising m cascaded GOA units. An n-th GOA unit includes an output control module, a forward/backward scanning control module, a node signal control module, a second pull-down circuit, a first pull-down circuit and a pull-up circuit. The forward/backward scanning control module control the GOA circuit to perform a forward or a backward scanning. The output control module controls an output of an n-th gate driving signal. The first pull-down circuit comprises a seventh thin film transistor. The second pull-down circuit comprises a fifth thin film transistor. The node signal control module control the fifth thin film transistor. The pull-up circuit includes an eighth thin film transistor. After the LCD panel is powered off, the second global control signal becomes a low level. This invention can eliminate a ghost image in the LCD panel when electricity is powered off, and improve user experience.