Abstract: A storage device and an operating method of the storage device are provided, which can determine and manage a reliability check target group based on an operating environment of the storage device. In one aspect, an operating method of a storage device comprises dividing, by the controller, weak wordlines having a number of fail bits greater than a predetermined value into a plurality of groups based on the number of fail bits, determining, among the plurality of groups based on operating environment information, target group on which a reliability check is to be performed, performing the reliability check on the target group; and performing a read reclaim operation based on results of the reliability check.

Abstract: Disclosed is a memory system including a memory device including a plurality of memory blocks, and a controller suitable for controlling the memory device to perform pre-read reclaim on pre-victim blocks of pre-read blocks among the plurality of memory blocks, the pre-victim blocks including uncorrectable errors, the pre-read blocks being blocks on which a pre-read operation has been performed.

Abstract: A storage device may transmit a command set to a memory, set a plurality of flag bits based on transmission status of a plurality of commands included in the command set, respectively, and determine whether an error occurred in the process of transmitting the command set to the memory based on the plurality of flag bits. Each of the plurality of flag bits has a first value or a second value, and the command set includes a reset command, a command set start command, and a command set end command.

Abstract: A storage device may receive a program command requesting to program target data, determine a foggy-program address and a fine-program address, receive the target data, copy the target data to a buffer, and foggy-program the target data to the foggy program address and fine-programs the target data to the fine-program address.

Abstract: The present technology relates to an electronic device. According to the present technology, a memory device may include a memory block including a plurality of memory cells, a peripheral circuit configured to generate operation voltages for the plurality of memory cells and transfer the operation voltages to the memory block through bit lines and word lines, and a control logic configured to control, based on temperature information of the memory device, the peripheral circuit to perform a low temperature management operation of increasing a temperature of the memory device. The peripheral circuit may transfer the operation voltages while limiting transferal of a local word line apply voltage to be applied to the memory block through the word lines in response to the low temperature management operation. The local word line apply voltage being included in the operation voltages.

Abstract: An automotive system includes a memory device and a controller. The memory device is installed in an automobile. The controller controls the memory device and an electronic device in the automobile. The controller controls the memory device to process a background operation during a time limit when a background operation trigger event may be detected.

Abstract: A storage device performs a read operation, based on a temperature measured in a program operation or an erase operation. The storage device includes: a memory device including a plurality of memory blocks, the memory device measuring a temperature in a program operation or an erase operation; and a memory controller for setting an area in which the measured temperature is to be stored in the memory device, and controlling a read operation to be performed in the memory device. When a read command for a selected page among a plurality of pages included in each of the plurality of memory blocks is received from the memory controller, the memory device determines a read voltage and a pass voltage based on a temperature corresponding to the selected page and performs a read operation on the selected page by using the read voltage and the pass voltage.

Abstract: A memory system includes a memory device including plural memory groups, each memory group including plural non-volatile memory cells; and a controller configured to transmit a command to the memory device so that the memory device performs a data input/output operation within at least one memory group among the plural memory groups, receive a response for the command and a status data regarding the at least one memory group from the memory device, and determine whether the data input/output operation has succeeded or failed based on the response and the status data.

Abstract: A memory device is provided to include: a plurality of memory cells; a peripheral circuit configured to perform an operation on the plurality of memory cells; a temperature circuit configured to measure a temperature of the memory device; a monitoring component configured to generate, based on whether a measured temperature is within a reference range, monitoring information representing an operation mode that is either a normal mode in which the operation is performed or a protection mode in which the operation is suspended; and an operation controller configured to output a signal for controlling the operation according to the monitoring information. The monitoring component is further configured to store the monitoring information and output the monitoring information to the operation controller in response to receiving the measured temperature from the temperature circuit.

Abstract: A controller controls a semiconductor memory device including a plurality of pages. The controller includes a command generator configured to generate a command for controlling a program operation or a read operation of a semiconductor memory device, and a data recovery manager configured to generate parity data corresponding to a weak page among a plurality of pages included in the semiconductor memory device and recover data programmed to the weak page.

Abstract: Provided herein is an electronic device including: a host configured to judge a possibility of occurrence of an SPO based on driving information of a transportation device, and determine an operation mode of a storage device to be an SPO protection mode or a performance mode based on the possibility of an SPO occurrence; a buffer memory device configured to temporarily store user data received from the host; a memory device configured to store the user data output from the buffer memory device; and a memory controller configured to set a size of the buffer memory device depending on the determined operation mode and to control the buffer memory device to output at least a part of the user data temporarily stored in the buffer memory device to the memory device based on an amount of the buffer memory device used.

Abstract: A memory controller and a method of operating the same may provide recovery from a Sudden Power-Off (SPO). The memory controller may control a memory device including a plurality of memory blocks, each memory block having a plurality of pages. The memory controller may include a dummy program controller configured to, after an SPO has occurred while a program operation was being performed on a page of the memory device, control a dummy program operation for recovering from the SPO; a parity data controller configured to control resetting and generation of parity data for chipkill decoding based on pages on which the dummy program operation is determined to be performed; and a valid data controller configured to control movement of valid data based on a number of pages on which the dummy program operation is to be performed.

Abstract: A memory device is provided to include: a plurality of memory cells; a peripheral circuit configured to perform an operation on the plurality of memory cells; a temperature circuit configured to measure a temperature of the memory device; a monitoring component configured to generate, based on whether a measured temperature is within a reference range, monitoring information representing an operation mode that is either a normal mode in which the operation is performed or a protection mode in which the operation is suspended; and an operation controller configured to output a signal for controlling the operation according to the monitoring information. The monitoring component is further configured to store the monitoring information and output the monitoring information to the operation controller in response to receiving the measured temperature from the temperature circuit.

Abstract: A storage device performs a read operation, based on a temperature measured in a program operation or an erase operation. The storage device includes: a memory device including a plurality of memory blocks, the memory device measuring a temperature in a program operation or an erase operation; and a memory controller for setting an area in which the measured temperature is to be stored in the memory device, and controlling a read operation to be performed in the memory device. When a read command for a selected page among a plurality of pages included in each of the plurality of memory blocks is received from the memory controller, the memory device determines a read voltage and a pass voltage based on a temperature corresponding to the selected page and performs a read operation on the selected page by using the read voltage and the pass voltage.

Abstract: Embodiments of the present disclosure relate to a memory system, a memory controller, and a method of operating the memory system. According to the embodiments of the present disclosure, when result data obtained by derandomizing data included in a flag area is different from reference data after a random data unit is derandomized based on a seed, it is possible to detect an error occurring in the seed in a process of derandomizing the data and to prevent malfunction of firmware in advance by searching for a target seed and derandomizing the random data unit based on the target seed.

Abstract: The present invention relates to a heteroarylamidopyridinol derivative and a pharmaceutical composition comprising same as an active ingredient for prevention or treatment of an autoimmune disease, specifically, inflammatory bowel disease, rheumatoid arthritis, etc. The heteroarylamidopyridinol derivative exhibits an excellent effect of inhibiting TNF-?- or IL-6-induced monocyte adhesion to gut epithelial cells and is proven to have a therapeutic effect on inflammatory bowel disease and rheumatoid arthritis in vivo. Thus, the heteroarylamidopyridinol derivative can be advantageously used for treatment of an autoimmune disease, specifically, inflammatory bowel disease or rheumatoid arthritis.

Abstract: A memory controller and a method of operating the same may provide recovery from a Sudden Power-Off (SPO). The memory controller may control a memory device including a plurality of memory blocks, each memory block having a plurality of pages. The memory controller may include a dummy program controller configured to, after an SPO has occurred while a program operation was being performed on a page of the memory device, control a dummy program operation for recovering from the SPO; a parity data controller configured to control resetting and generation of parity data for chipkill decoding based on pages on which the dummy program operation is determined to be performed; and a valid data controller configured to control movement of valid data based on a number of pages on which the dummy program operation is to be performed.

Abstract: Embodiments of the disclosure relate to a memory system and an operating method thereof. The memory system may decrypt first firmware which is stored in the memory device and is encrypted using a symmetric-key encryption algorithm, with a first key stored in the memory device, may generate a second key based on second firmware, which is obtained by decrypting the first firmware, first data stored in a first area in the memory controller, and second data stored in a second area in the memory device, and may drive the second firmware when the first key and the second key are the same.

Abstract: A memory system includes a memory device including plural memory groups, each memory group including plural non-volatile memory cells; and a controller configured to transmit a command to the memory device so that the memory device performs a data input/output operation within at least one memory group among the plural memory groups, receive a response for the command and a status data regarding the at least one memory group from the memory device, and determine whether the data input/output operation has succeeded or failed based on the response and the status data.

Abstract: Provided is a 2-cyanopyrimidin-4-yl carbamate or urea derivative or pharmaceutically acceptable salt thereof, a process for the preparation thereof, and a pharmaceutical composition comprising the same. The 2-cyanopyrimidin-4-yl carbamate or urea derivative or pharmaceutically acceptable salt thereof selectively inhibits cathepsin K and therefore can be usefully applied for preventing or treating osteoporosis.