Patents by Inventor Jung-Hau Shiu
Jung-Hau Shiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10515822Abstract: A method for manufacturing a semiconductor device includes forming a first insulating film over a semiconductor substrate and forming a second insulating film on the first insulating film. The first insulating film is a tensile film having a first tensile stress and the second insulating film is either a tensile film having a second tensile stress that is less than the first tensile stress or a compressive film. The first insulating film and second insulating film are formed of a same material. A metal hard mask layer is formed on the second insulating film.Type: GrantFiled: June 20, 2016Date of Patent: December 24, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jung-Hau Shiu, Chung-Chi Ko, Tze-Liang Lee, Yu-Yun Peng
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Publication number: 20190385902Abstract: Semiconductor devices and methods of forming semiconductor devices are provided. A method includes forming a first mask layer over an underlying layer, patterning the first mask layer to form a first opening, forming a non-conformal film over the first mask layer, wherein a first thickness of the non-conformal film formed on the top surface of the first mask layer is greater than a second thickness of the non-conformal film formed on a sidewall surface of the first mask layer, performing a descum process, wherein the descum process removes a portion of the non-conformal film within the first opening, and etching the underlying layer using the patterned first mask layer and remaining portions of the non-conformal film as an etching mask.Type: ApplicationFiled: June 15, 2018Publication date: December 19, 2019Inventors: Wei-Ren Wang, Shing-Chyang Pan, Ching-Yu Chang, Wan-Lin Tsai, Jung-Hau Shiu, Tze-Liang Lee
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Patent number: 10510585Abstract: A method includes forming a carbon-containing layer with a carbon atomic percentage greater than about 25 percent over a first hard mask layer, forming a capping layer over the carbon-containing layer, forming a first photo resist over the capping layer, and etching the capping layer and the carbon-containing layer using the first photo resist as a first etching mask. The first photo resist is then removed. A second photo resist is formed over the capping layer. The capping layer and the carbon-containing layer are etched using the second photo resist as a second etching mask. The second photo resist is removed. A third photo resist under the carbon-containing layer is etched using the carbon-containing layer as etching mask. A dielectric layer underlying the third photo resist is etched to form via openings using the third photo resist as etching mask. The via openings are filled with a conductive material.Type: GrantFiled: May 16, 2017Date of Patent: December 17, 2019Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Kai Chen, Jung-Hau Shiu, Chia Cheng Chou, Chung-Chi Ko, Tze-Liang Lee, Chih-Hao Chen, Shing-Chyang Pan
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Patent number: 10510584Abstract: A method includes forming a dielectric layer, forming a photo resist over the dielectric layer, forming a first mask layer over the photo resist, and forming a second mask layer over the first mask layer. A first-photo-first-etching is performed to form a first via pattern in the second mask layer, wherein the first-photo-first-etching stops on a top surface of the first mask layer. A second-photo-second-etching is performed to form a second via pattern in the second mask layer, wherein the second-photo-second-etching stops on the top surface of the first mask layer. The first mask layer is etched using the second mask layer as an etching mask. The photo resist and the dielectric layer are etched to simultaneously transfer the first via pattern and the second via pattern into the dielectric layer.Type: GrantFiled: July 1, 2019Date of Patent: December 17, 2019Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jung-Hau Shiu, Chung-Chi Ko, Tze-Liang Lee, Wen-Kuo Hsieh, Yu-Yun Peng
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Publication number: 20190326164Abstract: A method includes forming a dielectric layer, forming a photo resist over the dielectric layer, forming a first mask layer over the photo resist, and forming a second mask layer over the first mask layer. A first-photo-first-etching is performed to form a first via pattern in the second mask layer, wherein the first-photo-first-etching stops on a top surface of the first mask layer. A second-photo-second-etching is performed to form a second via pattern in the second mask layer, wherein the second-photo-second-etching stops on the top surface of the first mask layer. The first mask layer is etched using the second mask layer as an etching mask. The photo resist and the dielectric layer are etched to simultaneously transfer the first via pattern and the second via pattern into the dielectric layer.Type: ApplicationFiled: July 1, 2019Publication date: October 24, 2019Inventors: Jung-Hau Shiu, Chung-Chi Ko, Tze-Liang Lee, Wen-Kuo Hsieh, Yu-Yun Peng
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Patent number: 10361112Abstract: The present disclosure describes a method of forming a dielectric layer or a dielectric stack on a photoresist layer while minimizing or avoiding damage to the photoresist. In addition, the dielectric layer or dielectric stack can till high-aspect ratio openings and can be removed with etching. The dielectric layer or dielectric stack can be deposited with a conformal, low-temperature chemical vapor deposition process or a conformal, low-temperature atomic layer deposition process that utilizes a number of precursors and plasmas or reactant gases.Type: GrantFiled: October 5, 2017Date of Patent: July 23, 2019Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Wan-Lin Tsai, Shing-Chyang Pan, Sung-En Lin, Tze-Liang Lee, Jung-Hau Shiu, Jen Hung Wang
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Patent number: 10340178Abstract: A method includes forming a dielectric layer, forming a photo resist over the dielectric layer, forming a first mask layer over the photo resist, and forming a second mask layer over the first mask layer. A first-photo-first-etching is performed to form a first via pattern in the second mask layer, wherein the first-photo-first-etching stops on a top surface of the first mask layer. A second-photo-second-etching is performed to form a second via pattern in the second mask layer, wherein the second-photo-second-etching stops on the top surface of the first mask layer. The first mask layer is etched using the second mask layer as an etching mask. The photo resist and the dielectric layer are etched to simultaneously transfer the first via pattern and the second via pattern into the dielectric layer.Type: GrantFiled: November 26, 2018Date of Patent: July 2, 2019Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jung-Hau Shiu, Chung-Chi Ko, Tze-Liang Lee, Wen-Kuo Hsieh, Yu-Yun Peng
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Publication number: 20190103272Abstract: A method of manufacturing a semiconductor device includes depositing a dielectric layer over a substrate, performing a first patterning to form an opening in the dielectric layer, and depositing an oxide film over and contacting the dielectric layer and within the opening in the dielectric layer. The oxide film is formed from multiple precursors that are free of O2, and depositing the oxide film includes forming a plasma of a first precursor of the multiple precursors.Type: ApplicationFiled: April 30, 2018Publication date: April 4, 2019Inventors: Wan-Lin Tsai, Jung-Hau Shiu, Ching-Yu Chang, Jen Hung Wang, Shing-Chyang Pan, Tze-Liang Lee
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Publication number: 20190096752Abstract: A method includes forming a dielectric layer, forming a photo resist over the dielectric layer, forming a first mask layer over the photo resist, and forming a second mask layer over the first mask layer. A first-photo-first-etching is performed to form a first via pattern in the second mask layer, wherein the first-photo-first-etching stops on a top surface of the first mask layer. A second-photo-second-etching is performed to form a second via pattern in the second mask layer, wherein the second-photo-second-etching stops on the top surface of the first mask layer. The first mask layer is etched using the second mask layer as an etching mask. The photo resist and the dielectric layer are etched to simultaneously transfer the first via pattern and the second via pattern into the dielectric layer.Type: ApplicationFiled: November 26, 2018Publication date: March 28, 2019Inventors: Jung-Hau Shiu, Chung-Chi Ko, Tze-Liang Lee, Wen-Kuo Hsieh, Yu-Yun Peng
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Publication number: 20190006227Abstract: The present disclosure describes a method of forming a dielectric layer or a dielectric stack on a photoresist layer while minimizing or avoiding damage to the photoresist. In addition, the dielectric layer or dielectric stack can till high-aspect ratio openings and can be removed with etching. The dielectric layer or dielectric stack can be deposited with a conformal, low-temperature chemical vapor deposition process or a conformal, low-temperature atomic layer deposition process that utilizes a number of precursors and plasmas or reactant gases.Type: ApplicationFiled: October 5, 2017Publication date: January 3, 2019Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Wan-Lin TSAI, Shing-Chyang Pan, Sung-En Lin, Tze-Liang Lee, Jung-Hau Shiu, Jen Hung Wang
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Patent number: 10141220Abstract: A method includes forming a dielectric layer, forming a photo resist over the dielectric layer, forming a first mask layer over the photo resist, and forming a second mask layer over the first mask layer. A first-photo-first-etching is performed to form a first via pattern in the second mask layer, wherein the first-photo-first-etching stops on a top surface of the first mask layer. A second-photo-second-etching is performed to form a second via pattern in the second mask layer, wherein the second-photo-second-etching stops on the top surface of the first mask layer. The first mask layer is etched using the second mask layer as an etching mask. The photo resist and the dielectric layer are etched to simultaneously transfer the first via pattern and the second via pattern into the dielectric layer.Type: GrantFiled: September 1, 2017Date of Patent: November 27, 2018Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jung-Hau Shiu, Chung-Chi Ko, Tze-Liang Lee, Wen-Kuo Hsieh, Yu-Yun Peng
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Publication number: 20180033685Abstract: A method includes forming a carbon-containing layer with a carbon atomic percentage greater than about 25 percent over a first hard mask layer, forming a capping layer over the carbon-containing layer, forming a first photo resist over the capping layer, and etching the capping layer and the carbon-containing layer using the first photo resist as a first etching mask. The first photo resist is then removed. A second photo resist is formed over the capping layer. The capping layer and the carbon-containing layer are etched using the second photo resist as a second etching mask. The second photo resist is removed. A third photo resist under the carbon-containing layer is etched using the carbon-containing layer as etching mask. A dielectric layer underlying the third photo resist is etched to form via openings using the third photo resist as etching mask. The via openings are filled with a conductive material.Type: ApplicationFiled: May 16, 2017Publication date: February 1, 2018Inventors: Chun-Kai Chen, Jung-Hau Shiu, Chia Cheng Chou, Chung-Chi Ko, Tze-Liang Lee, Chih-Hao Chen, Shing-Chyang Pan
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Publication number: 20170365561Abstract: A method for manufacturing a semiconductor device includes forming a first insulating film over a semiconductor substrate and forming a second insulating film on the first insulating film. The first insulating film is a tensile film having a first tensile stress and the second insulating film is either a tensile film having a second tensile stress that is less than the first tensile stress or a compressive film. The first insulating film and second insulating film are formed of a same material. A metal hard mask layer is formed on the second insulating film.Type: ApplicationFiled: June 20, 2016Publication date: December 21, 2017Inventors: Jung-Hau SHIU, Chung-Chi KO, Tze-Liang LEE, Yu-Yun PENG
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Publication number: 20170365508Abstract: A method includes forming a dielectric layer, forming a photo resist over the dielectric layer, forming a first mask layer over the photo resist, and forming a second mask layer over the first mask layer. A first-photo-first-etching is performed to form a first via pattern in the second mask layer, wherein the first-photo-first-etching stops on a top surface of the first mask layer. A second-photo-second-etching is performed to form a second via pattern in the second mask layer, wherein the second-photo-second-etching stops on the top surface of the first mask layer. The first mask layer is etched using the second mask layer as an etching mask. The photo resist and the dielectric layer are etched to simultaneously transfer the first via pattern and the second via pattern into the dielectric layer.Type: ApplicationFiled: September 1, 2017Publication date: December 21, 2017Inventors: Jung-Hau Shiu, Chung-Chi Ko, Tze-Liang Lee, Wen-Kuo Hsieh, Yu-Yun Peng
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Patent number: 9754818Abstract: A method includes forming a dielectric layer, forming a photo resist over the dielectric layer, forming a first mask layer over the photo resist, and forming a second mask layer over the first mask layer. A first-photo-first-etching is performed to form a first via pattern in the second mask layer, wherein the first-photo-first-etching stops on a top surface of the first mask layer. A second-photo-second-etching is performed to form a second via pattern in the second mask layer, wherein the second-photo-second-etching stops on the top surface of the first mask layer. The first mask layer is etched using the second mask layer as an etching mask. The photo resist and the dielectric layer are etched to simultaneously transfer the first via pattern and the second via pattern into the dielectric layer.Type: GrantFiled: August 2, 2016Date of Patent: September 5, 2017Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jung-Hau Shiu, Chung-Chi Ko, Tze-Liang Lee, Wen-Kuo Hsieh, Yu-Yun Peng
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Publication number: 20170200636Abstract: A method includes forming a dielectric layer, forming a photo resist over the dielectric layer, forming a first mask layer over the photo resist, and forming a second mask layer over the first mask layer. A first-photo-first-etching is performed to form a first via pattern in the second mask layer, wherein the first-photo-first-etching stops on a top surface of the first mask layer. A second-photo-second-etching is performed to form a second via pattern in the second mask layer, wherein the second-photo-second-etching stops on the top surface of the first mask layer. The first mask layer is etched using the second mask layer as an etching mask. The photo resist and the dielectric layer are etched to simultaneously transfer the first via pattern and the second via pattern into the dielectric layer.Type: ApplicationFiled: August 2, 2016Publication date: July 13, 2017Inventors: Jung-Hau Shiu, Chung-Chi Ko, Tze-Liang Lee, Wen-Kuo Hsieh, Yu-Yun Peng
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Patent number: 9679804Abstract: A method includes forming a carbon-containing layer with a carbon atomic percentage greater than about 25 percent over a first hard mask layer, forming a capping layer over the carbon-containing layer, forming a first photo resist over the capping layer, and etching the capping layer and the carbon-containing layer using the first photo resist as a first etching mask. The first photo resist is then removed. A second photo resist is formed over the capping layer. The capping layer and the carbon-containing layer are etched using the second photo resist as a a second etching mask. The second photo resist is removed. A third photo resist under the carbon-containing layer is etched using the carbon-containing layer as etching mask. A dielectric layer underlying the third photo resist is etched to form via openings using the third photo resist as etching mask. The via openings are filled with a conductive material.Type: GrantFiled: July 29, 2016Date of Patent: June 13, 2017Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Kai Chen, Jung-Hau Shiu, Chia Cheng Chou, Chung-Chi Ko, Tze-Liang Lee, Chih-Hao Chen, Shing-Chyang Pan
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Patent number: 9412648Abstract: A method includes forming a dielectric layer, forming a photo resist over the dielectric layer, forming a first mask layer over the photo resist, and forming a second mask layer over the first mask layer. A first-photo-first-etching is performed to form a first via pattern in the second mask layer, wherein the first-photo-first-etching stops on a top surface of the first mask layer. A second-photo-second-etching is performed to form a second via pattern in the second mask layer, wherein the second-photo-second-etching stops on the top surface of the first mask layer. The first mask layer is etched using the second mask layer as an etching mask. The photo resist and the dielectric layer are etched to simultaneously transfer the first via pattern and the second via pattern into the dielectric layer.Type: GrantFiled: January 11, 2016Date of Patent: August 9, 2016Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jung-Hau Shiu, Chung-Chi Ko, Tze-Liang Lee, Wen-Kuo Hsieh, Yu-Yun Peng