Patents by Inventor Jung-Hoon Chun

Jung-Hoon Chun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8674477
    Abstract: In some embodiments, the semiconductor package includes a substrate having multiple layers, from a first layer to a final layer, a die coupled to the first layer, an electrical connector such as a solder ball coupled to the final layer, and a spiral trace disposed and electrically coupled between the die and the electrical connector. Inductance of the spiral trace is selected such that the package has a predetermined impedance. Material, cross-sectional area, number and density of windings, and total overall length of the spiral trace are selected accordingly. In other embodiments, the semiconductor package includes a substrate with multiple layers; a die coupled to the first of the layers; an electrical connector coupled to the final layer; and a spiral trace, in or on the substrate. The spiral trace is near the die, and electrically coupled between the die and the electrical connector.
    Type: Grant
    Filed: July 5, 2012
    Date of Patent: March 18, 2014
    Assignee: Rambus Inc.
    Inventors: Hao Shi, Jung-Hoon Chun, Xingchao Yuan
  • Publication number: 20120305174
    Abstract: Layer processing for pharmaceuticals, and related systems, methods, and articles are generally described. In some embodiments, ingestible pharmaceutical products (e.g., tablets) can be formed by processing one or more layers containing a pharmaceutically active composition. For example, at least one layer containing a pharmaceutically active composition can be manipulated (e.g., folded, rolled, stacked, etc.) such that the average thickness of the product formed by the manipulation is at least about two times the average thickness of the portions of the layer(s) used to form the product. In some embodiments, after the layer is manipulated, it can be processed (e.g., cut, coated, etc.) to form a final product such as, for example, a tablet.
    Type: Application
    Filed: April 27, 2012
    Publication date: December 6, 2012
    Applicant: Massachusetts Institute of Technology
    Inventors: Bernhardt Levy Trout, Trevor Alan Hatton, Emily Chang, James MB Evans, Salvatore Mascia, Won Kim, Ryan Richard Slaughter, Yi Du, Himanshu Hemant Dhamankar, Keith M. Forward, Gregory C. Rutledge, Mao Wang, Allan Stuart Myerson, Blair Kathryn Brettmann, Nikhil Padhye, Jung-Hoon Chun
  • Publication number: 20120267756
    Abstract: In some embodiments, the semiconductor package includes a substrate having multiple layers, from a first layer to a final layer, a die coupled to the first layer, an electrical connector such as a solder ball coupled to the final layer, and a spiral trace disposed and electrically coupled between the die and the electrical connector. Inductance of the spiral trace is selected such that the package has a predetermined impedance. Material, cross-sectional area, number and density of windings, and total overall length of the spiral trace are selected accordingly. In other embodiments, the semiconductor package includes a substrate with multiple layers; a die coupled to the first of the layers; an electrical connector coupled to the final layer; and a spiral trace, in or on the substrate. The spiral trace is near the die, and electrically coupled between the die and the electrical connector.
    Type: Application
    Filed: July 5, 2012
    Publication date: October 25, 2012
    Inventors: Hao Shi, Jung-Hoon Chun, Xingchao Yuan
  • Patent number: 8222714
    Abstract: In some embodiments, the semiconductor package includes a substrate having multiple layers, from a first layer to a final layer, a die coupled to the first layer, an electrical connector such as a solder ball coupled to the final layer, and a spiral trace disposed and electrically coupled between the die and the electrical connector. Inductance of the spiral trace is selected such that the package has a predetermined impedance. Material, cross-sectional area, number and density of windings, and total overall length of the spiral trace are selected accordingly. In other embodiments, the semiconductor package includes a substrate with multiple layers; a die coupled to the first of the layers; an electrical connector coupled to the final layer; and a spiral trace, in or on the substrate. The spiral trace is near the die, and electrically coupled between the die and the electrical connector.
    Type: Grant
    Filed: February 4, 2008
    Date of Patent: July 17, 2012
    Assignee: Rambus Inc.
    Inventors: Hao Shi, Jung-Hoon Chun, Xingchao Yuan
  • Publication number: 20110244764
    Abstract: Polishing pad conditioning system. The system includes a first rotatable platen supporting a polishing pad containing asperities having a radius of curvature. A second rotatable platen supports a disk of bulk material having holes therethrough, the second rotatable platen supported for translation as well as rotation. Means are provided for pushing the polishing pad and bulk material into contact at an interface during rotation and translation and means are provided for passing a slurry through the holes in the bulk material to the interface whereby the radius of curvature of the pad asperities is increased. Water may be delivered to the bulk material for cooling. A process for conditioning a polishing pad is also disclosed.
    Type: Application
    Filed: April 6, 2010
    Publication date: October 6, 2011
    Applicant: Massachusetts Institute of Technology
    Inventors: Nannaji Saka, Thor Eusner, Jung-Hoon Chun
  • Publication number: 20100281289
    Abstract: A bit slice circuit having transmit and receive modes of operation is described. The bit slice circuit comprises: first transmit circuitry and first receive circuitry operating in a first clock domain, wherein the first circuitry receives a first clock signal; second transmit circuitry and second receive circuitry operating in a second clock domain, wherein the second circuitry receives a second clock signal; transmit transition circuitry and receive transition circuitry, the transmit transition circuitry coupling the first transmit circuitry to the second transmit circuitry, the receive transition circuitry coupling the first receive circuitry to the second receive circuitry, wherein the transition circuitry receives the first and second clock signals; and a single phase mixer that generates the second clock signal, wherein the second clock signal has a first phase in the transmit mode of operation and second phase in the receive mode of operation.
    Type: Application
    Filed: November 14, 2008
    Publication date: November 4, 2010
    Inventors: Kun-Yung Chang, Jie Shen, Hae-Chang Lee, Fariborz Assaderaghi, Richard E. Perego, Jung-Hoon Chun
  • Publication number: 20100142607
    Abstract: A signaling system supports main and auxiliary communication channels between integrated circuits in the same direction over a single link. An equalizing transmitter applies appropriate filter coefficients to minimize the impact of intersymbol interference when transmitting the main data over a communication channel. The transmitter modulates at least one of the filter coefficients with the auxiliary data to induce apparent ISI in the transmitted signal. A main receiver ignores the apparent ISI to recover the main data, while an auxiliary receiver detects and demodulates the apparent ISI to recover the auxiliary data. The auxiliary data may be encoded using spread-spectrum techniques to reduce the impact of the auxiliary data on the main data.
    Type: Application
    Filed: March 25, 2008
    Publication date: June 10, 2010
    Applicant: Rambus Inc.
    Inventors: Jaeha Kim, Haechang Lee, Jung-Hoon Chun, Jared Zerbe
  • Publication number: 20100096725
    Abstract: In some embodiments, the semiconductor package includes a substrate having multiple layers, from a first layer to a final layer, a die coupled to the first layer, an electrical connector such as a solder ball coupled to the final layer, and a spiral trace disposed and electrically coupled between the die and the electrical connector. Inductance of the spiral trace is selected such that the package has a predetermined impedance. Material, cross-sectional area, number and density of windings, and total overall length of the spiral trace are selected accordingly. In other embodiments, the semiconductor package includes a substrate with multiple layers; a die coupled to the first of the layers; an electrical connector coupled to the final layer; and a spiral trace, in or on the substrate. The spiral trace is near the die, and electrically coupled between the die and the electrical connector.
    Type: Application
    Filed: February 4, 2008
    Publication date: April 22, 2010
    Inventors: Hao Shi, Jung-Hoon Chun, Xingchao Yuan
  • Patent number: 7030039
    Abstract: A method of and an apparatus for coating a substrate with a polymer solution to produce a film of uniform thickness, includes mounting the substrate inside an enclosed housing and passing a control gas, which may be a solvent vapor-bearing gas into the housing through an inlet. The polymer solution is deposited onto the surface of the substrate in the housing and the substrate is then spun. The control gas and any solvent vapor and particulate contaminants suspended in the control gas are exhausted from the housing through an outlet and the solvent vapor concentration is controlled by controlling the temperature of the housing and the solvent from which the solvent vapor-bearing gas is produced. Instead the concentration can be controlled by mixing gases having different solvent concentrations. The humidity of the gas may also be controlled.
    Type: Grant
    Filed: June 30, 2001
    Date of Patent: April 18, 2006
    Assignee: ASML Holding N.V.
    Inventors: Emir Gurer, Tom Zhong, John Lewellen, Edward C. Lee, Robert P. Mandal, James C. Grambow, Ted C. Bettes, Donald R. Sauer, Edmond R. Ward, Jung-Hoon Chun, Sangjun Han
  • Publication number: 20040149084
    Abstract: An apparatus and method of forming fluxless solder balls includes forming solder balls from a supply of solder. A coating is formed on the solder balls for limiting naturally occurring oxide growth on the solder balls before significant natural oxide growth on the solder balls has occurred. The coating allows the solder balls to be soldered without using flux.
    Type: Application
    Filed: September 5, 2002
    Publication date: August 5, 2004
    Applicant: Massachusetts Institute of Technology
    Inventors: Jung-Hoon Chun, Richard F. Foulke, Juan C. Rocha, Nannaji Saka
  • Publication number: 20020098283
    Abstract: A method of and an apparatus for coating a substrate with a polymer solution to produce a film of uniform thickness, includes mounting the substrate inside an enclosed housing and passing a control gas, which may be a solvent vapor-bearing gas into the housing through an inlet. The polymer solution is deposited onto the surface of the substrate in the housing and the substrate is then spun. The control gas and any solvent vapor and particulate contaminants suspended in the control gas are exhausted from the housing through an outlet and the solvent vapor concentration is controlled by controlling the temperature of the housing and the solvent from which the solvent vapor-bearing gas is produced. Instead the concentration can be controlled by mixing gases having different solvent concentrations. The humidity of the gas may also be controlled.
    Type: Application
    Filed: June 30, 2001
    Publication date: July 25, 2002
    Inventors: Emir Gurer, Tom Zhong, John Lewellen, Edward C. Lee, Robert P. Mandal, James C. Grambow, Ted C. Dettes, Donald R. Sauer, Edmond R. Ward, Jung-Hoon Chun, Sangjun Han
  • Publication number: 20010001746
    Abstract: An improved method and apparatus for coating semiconductor substrates with organic photoresist polymers by extruding a ribbon of photoresist in a spiral pattern which covers the entire top surface of the wafer. The invention provides a more uniform photoresist layer and is much more efficient than are current methods in the use of expensive photoresist solutions. A wafer is mounted on a chuck, aligned horizontally and oriented upward. An extrusion head is positioned adjacent to the outer edge of the wafer and above the top surface of the wafer with an extrusion slot aligned radially with respect to the wafer. The wafer is rotated and the extrusion head moved radially toward the center of the wafer while photoresist is extruded out the extrusion slot. The rotation rate of the wafer and the radial speed of the extrusion head are controlled so that the tangential velocity of the extrusion head with respect to the rotating wafer is a constant.
    Type: Application
    Filed: December 20, 2000
    Publication date: May 24, 2001
    Inventors: Jung-Hoon Chun, James Derksen, Sangjun Han
  • Patent number: 6191053
    Abstract: An improved method and apparatus for coating semiconductor substrates with organic photoresist polymers by extruding a ribbon of photoresist in a spiral pattern which covers the entire top surface of the wafer. The invention provides a more uniform photoresist layer and is much more efficient than are current methods in the use of expensive photoresist solutions. A wafer is mounted on a chuck, aligned horizontally and oriented upward. An extrusion head is positioned adjacent to the outer edge of the wafer and above the top surface of the wafer with an extrusion slot aligned radially with respect to the wafer. The wafer is rotated and the extrusion head moved radially toward the center of the wafer while photoresist is extruded out the extrusion slot. The rotation rate of the wafer and the radial speed of the extrusion head are controlled so that the tangential velocity of the extrusion head with respect to the rotating wafer is a constant.
    Type: Grant
    Filed: June 10, 1998
    Date of Patent: February 20, 2001
    Assignee: Silicon Valley Group, Inc.
    Inventors: Jung-Hoon Chun, James Derksen, Sangjun Han
  • Patent number: 5673746
    Abstract: A liquid metal/solid metal interface detecting device comprises in general a radiation source for generating gamma radiation, which is directed to pass through a strand extruded from a continuous casting mold. A detector detects the gamma radiation passing through the partially solidified strand to determine a spatial profile for a liquid metal/solid metal interface by relying on the different gamma radiation attenuation characteristics of the solid metal and the liquid metal. Preferably, the gamma radiation is at energies of greater than one million electron volts. In some embodiments, a movable support carries the radiation source and the detector and moves the radiation source and detector along and around the ingot enabling generation of a three-dimensional profile of the liquid metal/solid metal interface by utilizing tomographic imaging techniques.
    Type: Grant
    Filed: April 1, 1996
    Date of Patent: October 7, 1997
    Assignee: Massachusetts Institute of Technology
    Inventors: Jung-Hoon Chun, Richard C. Lanza, Nannaji Saka
  • Patent number: 5509460
    Abstract: A liquid metal/solid metal interface detecting device comprises in general a radiation source for generating gamma radiation, which is directed to pass through a strand extruded from a continuous casting mold. A detector detects the gamma radiation passing through the partially solidified strand to determine a spatial profile for a liquid metal/solid metal interface by relying on the different gamma radiation attenuation characteristics of the solid metal and the liquid metal. Preferably, the gamma radiation is at energies of greater than one million electron volts. In some embodiments, a movable support carries the radiation source and the detector and moves the radiation source and detector along and around the ingot enabling generation of a three-dimensional profile of the liquid metal/solid metal interface by utilizing tomographic imaging techniques.
    Type: Grant
    Filed: August 25, 1994
    Date of Patent: April 23, 1996
    Assignee: Massachusetts Institute of Technology
    Inventors: Jung-Hoon Chun, Richard C. Lanza, Nannaji Saka
  • Patent number: 5431315
    Abstract: An apparatus for coating the surface of a substrate with a coating material, which apparatus includes a chamber into which the material is supplied in a pressurized molten state from a source thereof. The molten material is subjected to vibrations within the chamber and is forced out of the chamber through one or more orifices so that the vibration breaks up the molten material exiting from the orifices into uniform sized droplets. A charging plate places a charge on each of the droplets and supplies the charged droplets via one or more corresponding orifices in the charging plate for use in coating the substrate. The charging of the droplets maintains the uniform size of the droplets as they are applied to the substrate. The droplets are further maintained in an oxygen-free atmosphere as they pass from the chamber to and through the charging plate. Each of the components of the apparatus is made as a separate module so that the overall apparatus can be readily assembled and disassembled.
    Type: Grant
    Filed: May 15, 1993
    Date of Patent: July 11, 1995
    Assignee: Massachusetts Institute of Technology
    Inventors: Jung-Hoon Chun, Christian H. Passow, Manish H. Bhatia
  • Patent number: 5266098
    Abstract: A process for producing charged uniformly sized metal droplets in which a quantity of metal is placed in a container and liquified, the container having a plurality of orifices to permit passage of the liquified metal therethrough. The liquified metal is vibrated in the container. The vibrating liquified metal is forced through the orifices, the vibration causing the liquified metal to form uniformly sized metal droplets. A charge is placed on the liquified metal either when it is in the container or after the liquified metal exits the container, the charging thereof causing the droplets to maintain their uniform size. The uniformly sized droplets can be used to coat a substrate with the liquified metal.
    Type: Grant
    Filed: January 7, 1992
    Date of Patent: November 30, 1993
    Assignee: Massachusetts Institute of Technology
    Inventors: Jung-Hoon Chun, Christian H. Passow
  • Patent number: 5071618
    Abstract: A method of manufacturing dispersion-strengthened material wherein a first material having a metal matrix M and at least one metal X capable of reacting with boron is supplied in a molten state to a mixing region at a first velocity. A second material having a metal matrix M and boron is supplied to the mixing region at a second velocity. The materials impinge on one another to produce a reaction between the metal X and the boron to form a boride in the metal matrix M. The mixture is solidified and pulverized to a powder which is then cleaned and consolidated.
    Type: Grant
    Filed: September 20, 1990
    Date of Patent: December 10, 1991
    Assignee: Sutek Corporation
    Inventors: Luis E. Sanchez-Caldera, Arthur K. Lee, Nam P. Suh, Jung-Hoon Chun
  • Patent number: 4999050
    Abstract: This invention relates generally to materials and processes for making materials and, more particularly, to high performance boride dispersion strengthened materials, including alloy-modified, boride dispersion strengthened materials and techniques for making such materials.
    Type: Grant
    Filed: August 30, 1988
    Date of Patent: March 12, 1991
    Assignee: Sutek Corporation
    Inventors: Luis E. Sanchez-Caldera, Arthur K. Lee, Nam P. Suh, Jung-Hoon Chun
  • Patent number: 4890662
    Abstract: A method and system for forming a composite mixture of at least two materials, at least one of which is a metal or metal alloy. The materials in a molten state are supplied via inlet channels to a mixing region so as to indirectly impinge on each other and then to flow through an outlet channel to a cooling system, such as a casting or mold device or a device for providing rapid solidification thereof. The ratio of the cross-sectional area of the outlet channel to the sum of the cross-sectional areas of the inlet channels is arranged to be less than 32 and the ratio of the distance from the input side of the outlet channel to the input of the cooling system to the diameter of the outlet channel is arranged to be greater than 5.
    Type: Grant
    Filed: July 15, 1988
    Date of Patent: January 2, 1990
    Assignee: Sutek Corporation
    Inventors: Luis E. Sanchez-Caldera, Arthur K. Lee, Nam P. Suh, Jung-Hoon Chun