Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a base portion and a fin portion over the base portion. The semiconductor device structure includes an epitaxial structure over the fin portion. The semiconductor device structure includes a dielectric fin over the base portion. A top surface of the dielectric fin is close to the epitaxial structure. The semiconductor device structure includes a silicide layer wrapping around the epitaxial structure and partially between the dielectric fin and the epitaxial structure. The silicide layer covers a lower surface of the epitaxial structure, and the lower surface is lower than the top surface of the dielectric fin.

Abstract: The present disclosure provides a semiconductor device that includes a semiconductor fin disposed over a substrate, an isolation structure at least partially surrounding the fin, an epitaxial source/drain (S/D) feature disposed over the semiconductor fin, where an extended portion of the epitaxial S/D feature extends over the isolation structure, and a silicide layer disposed on the epitaxial S/D feature, where the silicide layer covers top, bottom, sidewall, front, and back surfaces of the extended portion of the S/D feature.

Abstract: Semiconductor devices using a dielectric structure and methods of manufacturing are described herein. The semiconductor devices are directed towards gate-all-around (GAA) devices that are formed over a substrate and are isolated from one another by the dielectric structure. The dielectric structure is formed over the fin between two GAA devices and cuts a gate electrode that is formed over the fin into two separate gate electrodes. The two GAA devices are also formed with bottom spacers underlying source/drain regions of the GAA devices. The bottom spacers isolate the source/drain regions from the substrate. The dielectric structure is formed with a shallow bottom that is located above the bottoms of the bottom spacers.

Abstract: Provided is a method of manufacturing a semiconductor device including providing a semiconductor substrate, and forming an epitaxial stack on the semiconductor substrate. The epitaxial stack comprises a plurality of first epitaxial layers interposed by a plurality of second epitaxial layers. The method further includes patterning the epitaxial stack and the semiconductor substrate to form a semiconductor fin, recessing a portion of the semiconductor fin to form source/drain spaces; and laterally removing portions of the plurality of first epitaxial layers exposed by the source/drain spaces to form a plurality of cavities. The method further includes forming inner spacers in the plurality of cavities, performing a treatment process to remove an inner spacer residue in the source/drain spaces, forming S/D features in the source/drain spaces, and forming a gate structure engaging the semiconductor fin.

Abstract: A semiconductor device according to the present disclosure includes first gate-all-around (GAA) devices in a first device area and a second GAA devices in a second device area. Each of the first GAA devices includes a first vertical stack of channel members, a first gate structure over and around the first vertical stack of channel members, and a plurality of inner spacer features. Each of the second GAA devices includes a second vertical stack of channel members and a second gate structure over and around the second vertical stack of channel members. Two adjacent channel members of the first vertical stack of channel members are separated by a portion of the first gate structure and at least one of the plurality of inner spacer features. Two adjacent channel members of the second vertical stack of channel members are separated only by a portion of the second gate structure.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first gate stack and a second gate stack over a substrate. The substrate has a base, a first fin structure, and a second fin structure over the base, the second fin structure is wider than the first fin structure. The method includes partially removing the first fin structure, which is not covered by the first gate stack, and the second fin structure, which is not covered by the second gate stack. The method includes forming an inner spacer layer over the first fin structure, which is not covered by the first gate stack. The method includes forming a first stressor and a second stressor respectively over the inner spacer layer and the second fin structure, which is not covered by the second gate stack.

Abstract: A semiconductor structure includes a semiconductor fin disposed over a substrate, an epitaxial source/drain (S/D) feature disposed over the semiconductor fin, a silicide layer disposed over the epitaxial S/D feature, the silicide layer is disposed on sidewalls of the epitaxial S/D feature, a dielectric layer disposed over sidewalls of the silicide layer, and an S/D contact disposed over the epitaxial S/D feature in an interlayer dielectric (ILD) layer.

Abstract: The present disclosure provides a semiconductor device that includes a semiconductor fin disposed over a substrate; an isolation structure at least partially surrounding the fin; an epitaxial source/drain (S/D) feature disposed over the semiconductor fin, wherein an extended portion of the epitaxial S/D feature extends over the isolation structure; and a silicide layer disposed on the epitaxial S/D feature, the silicide layer continuously surrounding the extended portion of the epitaxial S/D feature over the isolation structure.

Abstract: According to one example, a semiconductor device includes a substrate and a fin stack that includes a plurality of nanostructures, a gate device surrounding each of the nanostructures, and inner spacers along the gate device and between the nanostructures. A width of the inner spacers differs between different layers of the fin stack.

Abstract: A method includes forming a pad layer and a mask layer over a substrate; patterning the mask layer, the pad layer, and the substrate to form pads, masks, and first and semiconductor fins over the substrate; forming a liner covering the pads, the masks, and the first and second semiconductor fins; removing a first portion of the liner to expose sidewalls of the first semiconductor fin, while leaving a second portion of the liner covering sidewalls of the second semiconductor fin; forming an isolation material over the substrate; and performing a CMP process to the isolation material until a first one of the pads over the second semiconductor fin is exposed; and etching back the isolation material and the second portion of the liner.

Abstract: A semiconductor device and a method of forming the same are provided. A semiconductor device according to the present disclosure includes a first source/drain feature, a second source/drain feature, a first semiconductor channel member and a second semiconductor channel member extending between the first and second source/drain features, and a first dielectric feature and a second dielectric feature each including a first dielectric layer and a second dielectric layer different from the first dielectric layer. The first and second dielectric features are sandwiched between the first and second semiconductor channel members.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a base portion and a fin portion over the base portion. The semiconductor device structure includes an epitaxial structure over the fin portion. The semiconductor device structure includes a dielectric fin over the base portion. A top surface of the dielectric fin is close to the epitaxial structure. The semiconductor device structure includes a silicide layer wrapping around the epitaxial structure and partially between the dielectric fin and the epitaxial structure. The silicide layer covers a lower surface of the epitaxial structure, and the lower surface is lower than the top surface of the dielectric fin.

Abstract: A method includes forming a first dielectric layer over a semiconductor fin protruding from a substrate, forming a second dielectric layer over the first dielectric layer, then removing a portion of the semiconductor fin to form a first recess defined by portions of the first dielectric layer, followed by removing that portions of the first dielectric layer that define the first recess. Thereafter, the method proceeds to forming an epitaxial source/drain (S/D) feature in the first recess, removing the second dielectric layer to form a second recess that is disposed between the epitaxial S/D feature and remaining portions of the first dielectric layer, and subsequently forming a silicide layer over the epitaxial S/D feature, such that the silicide layer wraps around the epitaxial S/D feature.

Abstract: A semiconductor device includes a substrate, a liner, and an isolation structure. The substrate has at least one first semiconductor fin and at least one second semiconductor fin. The liner is disposed on at least one sidewall of the second semiconductor fin. The isolation structure is disposed over the substrate, in which the isolation structure is in contact with the first semiconductor fin and the liner.

Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a substrate. The method includes forming a first dielectric layer over the base portion and a first sidewall of the fin portion. The method includes forming a first spacer layer over the first dielectric layer. The method includes forming a first dielectric fin over the first spacer layer. The method includes forming an epitaxial structure over the fin portion, wherein a void is surrounded by the epitaxial structure, the first dielectric layer, and the first spacer layer. The method includes removing the first spacer layer between the epitaxial structure and the first dielectric fin. The method includes forming a silicide layer over the epitaxial structure, wherein a first lower portion of the silicide layer covers a lower surface of the epitaxial structure and is in the void.

Abstract: The present disclosure provides a semiconductor device that includes a semiconductor fin disposed over a substrate; an isolation structure at least partially surrounding the fin; an epitaxial source/drain (S/D) feature disposed over the semiconductor fin, wherein an extended portion of the epitaxial S/D feature extends over the isolation structure; and a silicide layer disposed on the epitaxial S/D feature, the silicide layer continuously surrounding the extended portion of the epitaxial S/D feature over the isolation structure.

Abstract: A method includes forming a first dielectric layer over a semiconductor fin protruding from a substrate, forming a second dielectric layer over the first dielectric layer, then removing a portion of the semiconductor fin to form a first recess defined by portions of the first dielectric layer, followed by removing that portions of the first dielectric layer that define the first recess. Thereafter, the method proceeds to forming an epitaxial source/drain (S/D) feature in the first recess, removing the second dielectric layer to form a second recess that is disposed between the epitaxial S/D feature and remaining portions of the first dielectric layer, and subsequently forming a silicide layer over the epitaxial S/D feature, such that the silicide layer wraps around the epitaxial S/D feature.

Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a substrate. The method includes forming a first dielectric layer over the base portion and a first sidewall of the fin portion. The method includes forming a first spacer layer over the first dielectric layer. The method includes forming a first dielectric fin over the first spacer layer. The method includes forming an epitaxial structure over the fin portion, wherein a void is surrounded by the epitaxial structure, the first dielectric layer, and the first spacer layer. The method includes removing the first spacer layer between the epitaxial structure and the first dielectric fin. The method includes forming a silicide layer over the epitaxial structure, wherein a first lower portion of the silicide layer covers a lower surface of the epitaxial structure and is in the void.

Abstract: A semiconductor device includes a substrate, a liner, and an isolation structure. The substrate has at least one first semiconductor fin and at least one second semiconductor fin. The liner is disposed on at least one sidewall of the second semiconductor fin. The isolation structure is disposed over the substrate, in which the isolation structure is in contact with the first semiconductor fin and the liner.