Abstract: A horizontal charge coupled device (CCD) driving circuit, a solid-state image-sensing device having the same, and a method of driving the solid-state image-sensing device, transmits image signals using horizontal driving signals having a middle voltage during rising and falling of the horizontal signals. The middle voltage of the horizontal driving signals is generated when an equipotential switch is turned “on” while the output nodes of buffer circuits are in a floating state.

Abstract: A biasing circuit for a charge-coupled device (CCD) includes one or more transistors and a nonvolatile memory cell connected in series between a first electric potential node and a second electric potential node and configured to produce a bias voltage at a node between the nonvolatile memory and one of the one or more transistors. The one or more transistors may include one or more transistors coupled in series between a first terminal of the nonvolatile memory cell and the first electric potential node, and one or more transistors coupled in series between a second terminal of the nonvolatile memory cell and the second electric potential node. The nonvolatile memory cell may include a flash memory cell, e.g., a stacked-gate-type flash memory cell and/or a split-gate-type flash memory cell.

Abstract: The present invention relates to a variable region of the monoclonal antibody against the S-surface antigen of hepatis B virus and a gene encoding the same, a recombinant vector containing the said gene, and a transformant obtained from the said recombinant vector.

Abstract: A solid state image sensing device and method of driving provide a sub-sampling mode for improving a dynamic range in the solid state image sensing device by using vertical driving electrodes that receive inputs of vertical driving signals, a vertical CCD that receives each of video signals of a plurality of rows that are arranged at intervals of one row, and adding the received signal with the video signal of a row which is a proportional number of rows distant from the row of the received signal, in which the proportional number is proportional to the number of the plurality of rows, and vertically transmitting the result; and by using horizontal driving electrodes that receive inputs of horizontal driving signals, a horizontal CCD receives the added video signals, again adds sequentially the same number of the added video signals as the number of the plurality of rows, and horizontally transmits and outputs the video signals added by row.

Abstract: A CCD-based solid state image sensing (imaging) device and a driving method, enabling three-color still or video image signal charge processing without requiring a frame memory buffer. By using horizontal electrodes to selectively assert predetermined vertical-driving signals of the vertical CCDs, the vertical CCDs receive and vertically transmit the image signals (charges) of active pairs of vertically adjacent rows. Each active pair of adjacent rows is separated by (at least) two (a pair of) inactive adjacent rows, and the image signal (charges) of the active pair of adjacent rows represent all three colors (R, G, B) of one line (or one field) of real-image pixels. A horizontal CCD receives the selected image signals (charges) for each active row among the active pairs of rows, and outputs the image signals (charges) for each active row by conventional horizontal transmission to an interpolator adapted to continuously output three-color pixel signals (e.g., digital signals), e.g.

Abstract: A signal converter, for converting signal charge into a voltage, comprises a first driver FET for a first stage that receives the signal charge. A subsequent driver FET is coupled to an output of the first driver FET, and a gate dielectric thickness of the subsequent driver FET is decreased. The subsequent driver FET is either for a second stage or for a third stage. The decrease of the gate dielectric thickness for the subsequent driver FET increases the voltage gain AVtotal without decreasing the charge transfer efficiency such that the overall sensitivity of the signal converter is enhanced.

Abstract: Low-power and low-noise CDS (correlated double sampling) comparators for use with a CIS (CMOS image sensor) device are provided. A CDS comparator is constructed using one of various low-power inverters that provide decreased instantaneous transition currents at a logic threshold voltage. The use of such low-power inverters in CDS comparators enables a significant reduction in power consumption and noise in the CIS device, or other devices that implement such CDS comparators and/or inverters.

Abstract: The present invention relates to a variable region of the monoclonal antibody against the S-surface antigen of hepatis B virus and a gene encoding the same, a recombinant vector containing the said gene, and a transformant obtained from the said recombinant vector.

Abstract: An image sensor and method, which includes a switching device for establishing a connection between at least one column line and one of at least two analog-to-digital converter blocks, where at least one of the at least two analog-to-digital converter blocks is connectable to at least two rows of a plurality of unit pixels. An image sensor and method, where, if a row line is odd, column outputs from odd column lines of an active pixel sensor array are connected to a first correlated double sampling block and column outputs from even column lines of the active pixel sensor array are connected to a second correlated double sampling block and if the row line is even, column outputs from odd column lines of the active pixel sensor array are connected to the second correlated double sampling block and column outputs from even column lines of the active pixel sensor array are connected to the first correlated double sampling block.

Abstract: The present invention relates to a variable region of the monoclonal antibody against the S-surface antigen of hepatis B virus and a gene encoding the same, a recombinant vector containing the said gene, and a transformant obtained from the said recombinant vector.

Abstract: An image sensor includes a photosensitive element that generates an electrical signal corresponding to light incident thereon and a ramp signal generator that generates a ramp signal. Generation of the ramp signal is initiated in response to activation of a ramp enable signal. An offset adjusting circuit generates a counter enable signal after activation of the ramp enable signal and after initiating generation of the ramp signal. A counter initiates counting responsive to generation of the counter enable signal. A latch latches a counter output responsive to a comparison of the ramp signal and the electrical signal corresponding to light incident on the photosensitive element. Related methods are also discussed.

Abstract: A one-step diagnostic device for simultaneously detecting and distinguishing between a normal pregnancy and an ectopic pregnancy and methods for preparing the device are disclosed. Utilizing the device and principles of the present invention, normal pregnancy and ectopic pregnancy can be rapidly and accurately determined at an early stage by immunologically detecting the morphological differences between human chorionic gonadotropin (hCG) and modified forms thereof, which are secreted into the body fluid of a pregnant female.

Abstract: The present invention relates to a variable region of the monoclonal antibody against the S-surface antigen of hepatis B virus and a gene encoding the same, a recombinant vector containing the said gene, and a transformant obtained from the said recombinant vector.

Abstract: Integrated circuit devices having improved test capabilities may include a mode selection circuit that generates a mode signal that designates an operational mode based on the magnitude of a mode control signal when a power supply signal transitions from a first state to a second state. A preferred embodiment of the mode selection circuit generates a mode signal that designates a first mode of the integrated circuit device when the power supply signal transitions from a first state to a second state while a magnitude of the mode control signal exceeds a potential threshold. Moreover, the mode selection circuit may also prevent subsequent changes in the magnitude of the mode control signal from disabling the first mode. The mode signal may be generated without the need for additional dummy pads and/or input pins, which may necessitate an increase in chip size and/or more complex test equipment to test an integrated circuit device.

Abstract: A charge coupled device has a transfer electrode portion having a first gate electrode, a second gate electrode having an end portion partially overlapping an end portion of the first gate electrode, and a third gate electrode having one end portion partially overlapping the other end portion of the first gate electrode. The charge coupled device also has a charge transfer portion located in a semiconductor substrate under the first, second and third gate electrodes, which includes a first potential area formed in the semiconductor substrate under the second gate electrode and a second potential area formed in the semiconductor substrate under the third gate electrode. The charge coupled device further has a clock portion which includes a first clock terminal connected to the first and third gate electrodes, and a second clock terminal connected to the second gate electrode.

Abstract: A charge coupled device and a manufacturing method therefor are provided. The charge coupled device has a transfer electrode portion having a first gate electrode, a second gate electrode having an end portion partially overlapping an end portion of the first gate electrode, and a third gate electrode having one end portion partially overlapping the other end portion of the first gate electrode and the other end portion thereof partially overlapping the other end portion of the second gate electrode. The charge coupled device also has a charge transfer portion located in a semiconductor substrate under the first, second and third gate electrodes, which includes a first potential area formed in the semiconductor substrate under the second gate electrode and a second potential area formed in the semiconductor substrate under the third gate electrode.

Abstract: Charge coupled device (CCD) solid-state image sensors comprise a substrate including a plurality of sensor groups. Each sensor group consists of N photodiodes and 2N+1 transfer electrodes, where N is at least two. By providing, for example, two photodiodes and five transfer electrodes in a group, improved area efficiency may be provided along with efficient manufacturing and driving. Three insulated patterned conductive layers are formed on a gate insulating layer, to define the first through fifth transfer electrodes on the transfer region.

Abstract: A charge-coupled device type image sensor having a floating diffusion-type amplifier including a drive transistor comprising a substrate, a drain region, a source region, a depletion channel region formed between the drain and source regions in contact with the drain region, and a gate electrode formed on the substrate between the source region and the drain region, such that the gate electrode overlays a portion of the source region and overlays a portion of the depletion channel region, wherein the drain region is spaced apart from said gate electrode.

Abstract: There is disclosed a solid-state image sensor comprising: photo-detecting devices arranged in a matrix structure for receiving external light signals; vertical charge transfer device interposed between the columns of said photo-detecting device for vertically transferring the charges produced from said photo-detecting device according to external control signal; first horizontal charge transfer device for horizontally transferring the charges coming out of said vertical charge transfer device according to external control signal; output control device for controlling the charges flowing from said first horizontal charge transfer device to said output device; second horizontal charge transfer device for transferring the output charges of said first horizontal charge transfer device controlled by said output control device to said vertical charge transfer device according to external control signal; and a feedback line for connecting the output of said first horizontal charge transfer device to the input of sai