Patents by Inventor Jung Il Cho

Jung Il Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9954943
    Abstract: A method for configuring multi-vision by an electronic device is provided. The method includes obtaining, by the electronic device, a user input, generating first user input information from the obtained user input, determining whether the electronic device is one of a master device and a slave device, when the electronic device is determined to be the master device, obtaining second user input information from one or more other electronic devices, and determining an arrangement structure of one of the master device and the slave device based on one of the first user input information and the second user input information.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: April 24, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Gyu-Cheol Choi, Hyung-Jin Kim, Jung-Il Cho
  • Patent number: 9851898
    Abstract: Provided are methods for changing a display range in an electronic device having a touchscreen. The method for changing a display range in an electronic device includes: detecting a plurality of touches; determining a plurality of regions in consideration of a plurality of touch points; and changing a display range of at least one region of the plurality of regions in consideration of change in a distance between the plurality of touch points.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: December 26, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yong-Jin Lim, Byung-Hwan Kim, Youn-Soo Kim, Hyung-Jin Kim, Jeong-Hwan Noh, In-Su Park, Jung-Il Cho
  • Publication number: 20170185290
    Abstract: Provided are methods for changing a display range in an electronic device having a touchscreen. The method for changing a display range in an electronic device includes: detecting a plurality of touches; determining a plurality of regions in consideration of a plurality of touch points; and changing a display range of at least one region of the plurality of regions in consideration of change in a distance between the plurality of touch points.
    Type: Application
    Filed: March 13, 2017
    Publication date: June 29, 2017
    Inventors: Yong-Jin Lim, Byung-Hwan Kim, Youn-Soo Kim, Hyung-Jin Kim, Jeong-Hwan Noh, In-Su Park, Jung-IL Cho
  • Patent number: 9594501
    Abstract: Provided are methods for changing a display range in an electronic device having a touchscreen. The method for changing a display range in an electronic device includes: detecting a plurality of touches; determining a plurality of regions in consideration of a plurality of touch points; and changing a display range of at least one region of the plurality of regions in consideration of change in a distance between the plurality of touch points.
    Type: Grant
    Filed: August 21, 2013
    Date of Patent: March 14, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Jin Lim, Byung-Hwan Kim, Youn-Soo Kim, Hyung-Jin Kim, Jeong-Hwan Noh, In-Su Park, Jung-Il Cho
  • Patent number: 9293360
    Abstract: A semiconductor memory device includes a semiconductor substrate in which an active region and an isolation region are defined, a tunnel insulating layer and a floating gate formed on the semiconductor substrate in the active region, a trench formed in the semiconductor substrate in the isolation region, a dielectric layer formed along a top surface and a portion of a side surface of the floating gate, wherein the dielectric layer extends higher than a surface of the semiconductor substrate in the isolation region and defines an air gap in the trench, and a control gate formed on the dielectric layer, wherein the dielectric layer includes the first nitride layer, a first oxide layer, a second nitride layer and a second oxide layer.
    Type: Grant
    Filed: June 18, 2014
    Date of Patent: March 22, 2016
    Assignee: SK Hynix Inc.
    Inventors: Jung Il Cho, Jong Moo Choi, Eun Joo Jung
  • Publication number: 20150309684
    Abstract: A method for configuring multi-vision by an electronic device is provided. The method includes obtaining, by the electronic device, a user input, generating first user input information from the obtained user input, determining whether the electronic device is one of a master device and a slave device, when the electronic device is determined to be the master device, obtaining second user input information from one or more other electronic devices, and determining an arrangement structure of one of the master device and the slave device based on one of the first user input information and the second user input information.
    Type: Application
    Filed: April 23, 2015
    Publication date: October 29, 2015
    Inventors: Gyu-Cheol CHOI, Hyung-Jin KIM, Jung-Il CHO
  • Publication number: 20140295641
    Abstract: A semiconductor memory device includes a semiconductor substrate in which an active region and an isolation region are defined, a tunnel insulating layer and a floating gate formed on the semiconductor substrate in the active region, a trench formed in the semiconductor substrate in the isolation region, a dielectric layer formed along a top surface and a portion of a side surface of the floating gate, wherein the dielectric layer extends higher than a surface of the semiconductor substrate in the isolation region and defines an air gap in the trench, and a control gate formed on the dielectric layer, wherein the dielectric layer includes the first nitride layer, a first oxide layer, a second nitride layer and a second oxide layer.
    Type: Application
    Filed: June 18, 2014
    Publication date: October 2, 2014
    Inventors: Jung Il CHO, Jong Moo CHOI, Eun Joo JUNG
  • Publication number: 20140151779
    Abstract: A semiconductor memory device includes a semiconductor substrate in which an active region and an isolation region are defined, a tunnel insulating layer and a floating gate formed on the semiconductor substrate in the active region, a trench formed in the semiconductor substrate in the isolation region, a dielectric layer formed along a top surface and a portion of a side surface of the floating gate, wherein the dielectric layer extends higher than a surface of the semiconductor substrate in the isolation region and defines an air gap in the trench, and a control gate formed on the dielectric layer, wherein the dielectric layer includes the first nitride layer, a first oxide layer, a second nitride layer and a second oxide layer.
    Type: Application
    Filed: February 28, 2013
    Publication date: June 5, 2014
    Applicant: SK HYNIX INC.
    Inventors: Jung Il CHO, Jong Moo CHOI, Eun Joo JUNG
  • Publication number: 20140055390
    Abstract: Provided are methods for changing a display range in an electronic device having a touchscreen. The method for changing a display range in an electronic device includes: detecting a plurality of touches; determining a plurality of regions in consideration of a plurality of touch points; and changing a display range of at least one region of the plurality of regions in consideration of change in a distance between the plurality of touch points.
    Type: Application
    Filed: August 21, 2013
    Publication date: February 27, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yong-Jin Lim, Byung-Hwan Kim, Youn-Soo Kim, Hyung-Jin Kim, Jeong-Hwan Noh, In-Su Park, Jung-IL Cho
  • Patent number: 7348240
    Abstract: A method for forming a metal line in a flash memory device includes sequentially forming a first inter-layer insulation layer, an etch stop layer, a second inter-layer insulation layer, and a hard mask layer over a substrate where a contact plug is formed, etching the hard mask layer to form a hard mask pattern, performing a first etching process on the second inter-layer insulation layer to form a trench exposing a portion of the etch stop layer, performing a second etching process to selectively remove the hard mask pattern and the exposed portion of the etch stop layer, forming a spacer over sidewalls of the trench, and forming a metal line filling the trench to make contact with the contact plug. The hard mask layer and the etch stop layer include substantially the same material. The spacer includes substantially the same material as the first and second inter-layer insulation layers.
    Type: Grant
    Filed: June 28, 2006
    Date of Patent: March 25, 2008
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jung-Il Cho
  • Publication number: 20070072372
    Abstract: A method for forming a metal line in a flash memory device includes sequentially forming a first inter-layer insulation layer, an etch stop layer, a second inter-layer insulation layer, and a hard mask layer over a substrate where a contact plug is formed, etching the hard mask layer to form a hard mask pattern, performing a first etching process on the second inter-layer insulation layer to form a trench exposing a portion of the etch stop layer, performing a second etching process to selectively remove the hard mask pattern and the exposed portion of the etch stop layer, forming a spacer over sidewalls of the trench, and forming a metal line filling the trench to make contact with the contact plug. The hard mask layer and the etch stop layer include substantially the same material. The spacer includes substantially the same material as the first and second inter-layer insulation layers.
    Type: Application
    Filed: June 28, 2006
    Publication date: March 29, 2007
    Inventor: Jung-Il Cho
  • Patent number: 6908805
    Abstract: The present invention is provided to manufacture a dual gate oxide film. According to the present invention, it is possible to obtain a high-quality NO gate oxide film for high voltage and a high-quality NO gate oxide film for low voltage where nitrogen is distributed uniformly in the entire oxide films by carrying out a rapid annealing process in an inert atmosphere after carrying out an NO annealing process in order to prevent a phenomenon that nitrogen is not distributed uniformly and segregated in a gate oxide film for high voltage due to application of the NO annealing process after forming a gate oxide film for low voltage.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: June 21, 2005
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jung Il Cho, Seung Cheol Lee, Sang Wook Park
  • Publication number: 20040253780
    Abstract: The present invention is provided to manufacture a dual gate oxide film. According to the present invention, it is possible to obtain a high-quality NO gate oxide film for high voltage and a high-quality NO gate oxide film for low voltage where nitrogen is distributed uniformly in the entire oxide films by carrying out a rapid annealing process in an inert atmosphere after carrying out an NO annealing process in order to prevent a phenomenon that nitrogen is not distributed uniformly and segregated in a gate oxide film for high voltage due to application of the NO annealing process after forming a gate oxide film for low voltage.
    Type: Application
    Filed: December 18, 2003
    Publication date: December 16, 2004
    Inventors: Jung Il Cho, Seung Cheol Lee, Sang Wook Park
  • Patent number: 6780743
    Abstract: Disclosed is a method of forming a floating gate in a date flash memory device on which first and second polysilicon films are stacked. After the first polysilicon film is formed, a SiH4 gas is introduced to decompose SiH4 and SiO2 into Si and H2 and Si and O2. A N2 anneal process is then implemented so that the decomposed H2 gas and O2 gas react to a N2 gas and are then outgassed. Next, a SiH4 gas and a PH3 gas are introduced to form the second polysilicon film. A native oxide film within the interface of the first polysilicon film and the second polysilicon film is removed to improve characteristics of the data flash memory device.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: August 24, 2004
    Assignee: Hynix Semiconductor Inc.
    Inventors: Sang Wook Park, Seung Cheol Lee, Jung Il Cho
  • Publication number: 20040115885
    Abstract: Disclosed is a method of forming a floating gate in a date flash memory device on which first and second polysilicon films are stacked. After the first polysilicon film is formed, a SiH4 gas is introduced to decompose SiH4 and SiO2 into Si and H2 and Si and O2. A N2 anneal process is then implemented so that the decomposed H2 gas and O2 gas react to a N2 gas and are then outgassed. Next, a SiH4 gas and a PH3 gas are introduced to form the second polysilicon film. A native oxide film within the interface of the first polysilicon film and the second polysilicon film is removed to improve characteristics of the data flash memory device.
    Type: Application
    Filed: July 31, 2003
    Publication date: June 17, 2004
    Inventors: Sang Wook Park, Seung Cheol Lee, Jung Il Cho
  • Publication number: 20020001898
    Abstract: A method of manufacturing a flash memory cell is disclosed. The method comprises the steps of forming an oxide film on a semiconductor substrate in which a device separation film is formed and then patterning the oxide film to expose the semiconductor substrate at a portion in which a floating gate will be formed; sequentially forming a tunnel oxide film and a first polysilicon layer on the entire structure, and then flattening the first polysilicon layer until the tunnel oxide film is exposed to form a floating gate; etching the tunnel oxide film and the oxide film in the exposed portion to a given thickness and the forming a dielectric film on the entire structure; sequentially forming a second polysilicon layer, a tungsten silicide layer and a hard mask and then patterning them to form a control gate; and injecting impurity ions into the semiconductor substrate at the both sides of the floating gate to form a junction region.
    Type: Application
    Filed: June 15, 2001
    Publication date: January 3, 2002
    Inventors: Soo Young Park, Jung Il Cho