Patents by Inventor Jung Kwon

Jung Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10458656
    Abstract: Disclosed herein is a cooking apparatus including a switch assembly configured to uniformly distribute light emitted around a switch. A cooking apparatus includes a main body having a cooking chamber and a switch assembly rotatably mounted on the main body. The switch assembly includes a switch rotatably provided, a switch holder coupled to the switch and a light guide disposed between the switch and the switch holder to uniformly emit light emitted from a light source.
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: October 29, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Gwang Jin Jung, Byoung Woo Ko, Jung Kwon Kim, Chun Seong Kim
  • Publication number: 20190318694
    Abstract: Disclosed are a source driver and a display device using the same, and the display device includes the source driver that generates sensing data by performing a pre-processing operation on pixel data obtained by sensing display pixels, and a timing controller that generates correction data for correction for pixel characteristics by performing a post-processing operation on the sensing data.
    Type: Application
    Filed: December 12, 2017
    Publication date: October 17, 2019
    Applicant: SILICON WORKS CO., LTD.
    Inventors: Yong Jung KWON, Min Young JEONG, Sang Min LEE, Jeung Hie CHOI
  • Patent number: 10406737
    Abstract: Provided is an injection molding apparatus for a worm wheel, in which the worm wheel is not only integrally manufactured by an injection mold method, but a gear teeth structure of a gear forming unit is also manufactured as an injection mold without a hobbing operation, and the structure of the injection molding apparatus is also improved so that worm wheel products can be easily taken out from the injection mold. The injection molding apparatus includes: a boss injection mold; a product injection mold having a movable side core, a fixed side core, and a worm gear tooth-shaped core; and a take-out unit for taking out a worm wheel product formed with a worm gear by the product injection mold, wherein the take-out unit includes: a plurality of take-out pins; a take-out plate; and a guide unit guiding rotation of the worm gear tooth-shaped core.
    Type: Grant
    Filed: March 11, 2016
    Date of Patent: September 10, 2019
    Assignee: MTC CO., LTD.
    Inventors: Jung kwon Cho, Ki jung Cho, Kwang ryeal Choi, Won bum Sohn, Sung jae Yoo
  • Patent number: 10403196
    Abstract: Disclosed is a source driver including a sensing circuit capable of sensing whether a short occurred between a data output line and a power line. The source driver may include: an output circuit configured to output a preset voltage to a display panel in a checking mode; and a sensing circuit configured to sense whether data output lines connecting the output circuit and the display panel are shorted, using the preset voltage, and output a sensing result signal.
    Type: Grant
    Filed: June 14, 2016
    Date of Patent: September 3, 2019
    Assignee: SILICON WORKS CO., LTD.
    Inventors: Ju Young Shin, Jung Bae Yun, Yong Jung Kwon, Jeung Hie Choi
  • Publication number: 20190267584
    Abstract: A method for manufacturing a battery module includes preparing a plurality of cylindrical battery cells having electrode terminals respectively at upper and lower portions, and a module housing having an accommodation portion with a plurality of hollow structures to accommodate the cylindrical battery cells therein; adding an adhesive having thermally and ultraviolet curing properties to an inner surface of the accommodation portion; partially curing the adhesive by applying heat thereto to increase a viscosity of the adhesive; accommodating the cylindrical battery cells in the accommodation portion so that the partially-cured adhesive is between the accommodation portion of the module housing and the cylindrical battery cells; after the accommodating of the cylindrical battery cells in the accommodation portion, applying heat to the adhesive to lower the viscosity of the adhesive; and, after the viscosity is lowered by applying the heat, curing the adhesive by irradiating ultraviolet rays to the adhesive.
    Type: Application
    Filed: January 29, 2019
    Publication date: August 29, 2019
    Applicant: LG CHEM, LTD.
    Inventors: Pan-Jung KWON, Geon-Tae PARK, Ju-Hwan BAEK
  • Patent number: 10388399
    Abstract: Memory devices and methods of operating the same are provided. The memory device including at least one internal circuit including a memory cell array and a peripheral circuit configured to drive the memory cell array, a monitor logic configured to monitor a current flowing into the at least one internal circuit and output a monitoring result, a detect logic configured to detect whether a leakage current flows in the at least one internal circuit based on the monitoring result, and output detected information regarding the leakage current, and diagnosis logic configured to diagnose an error in the at least one internal circuit based on the detected information.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: August 20, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hye-jung Kwon, Kwang-il Park, Seung-jun Bae, Eun-sung Seo
  • Publication number: 20190203617
    Abstract: A lock pin for a VCT device that has a locked position, locking a housing assembly relative to a rotor assembly of the variable cam timing device, and an unlocked position. The lock pin has a body comprising a first diameter with a first area, a second diameter with a second area, and a chamber formed between the first area of the first diameter and the second area of the second diameter for receiving fluid, the first area being greater than the second area. When fluid is applied to the chamber through the variable cam timing phaser, a difference between first area and the second area defining the chamber creates a force imbalance, such that the oil pressure applied to the chamber of the body assists in maintaining the Sock pin in the locked position.
    Type: Application
    Filed: August 23, 2017
    Publication date: July 4, 2019
    Inventors: Jared D. NICHOLS, Won-Jung KWON
  • Publication number: 20190180881
    Abstract: The present invention relates to a non-invasive prenatal testing method and, more particularly, to a method for enhancing the sensitivity and accuracy of non-invasive prenatal testing by applying multi-dimensional threshold values based on multiple Z-scores. Designed to reduce false-positive and false-negative possibility by applying two or more Z-score threshold values to aneuploidy detection for one chromosome, the non-invasive prenatal testing method according to the present invention exhibits the effect of obtaining a more sensitive and more accurate test result. Further, the method can minimize test errors in spite of using a small number of nucleotide sequence fragments, with the resultant effect of reducing an experiment cost and thus expensive testing cost and rapidly performing testing with a low expense.
    Type: Application
    Filed: June 9, 2017
    Publication date: June 13, 2019
    Applicant: EONE DIAGNOMICS GENOME CENTER CO., LTD
    Inventors: Min Seob LEE, Shang Cheol SHIN, Sung Hoon LEE, Hyuk Jung KWON
  • Publication number: 20190180797
    Abstract: A memory system includes a logic circuit and a phase locked loop (PLL) circuit. The logic circuit determines a first frequency of a first clock using a first signal and generates a second signal for adjusting the first frequency of the first clock. The PLL circuit receives a second clock, and generates the first clock having the first frequency determined by the logic circuit, using the second clock and the second signal. When a second frequency of the second clock varies, the logic circuit determines the first frequency of the first clock such that the first frequency of the first clock generated by the PLL circuit is uniform, and operates based on the first clock having the first frequency adjusted by the second signal.
    Type: Application
    Filed: August 3, 2018
    Publication date: June 13, 2019
    Inventors: YOUNG-JU KIM, DONG-SEOK KANG, HYE JUNG KWON, BYUNGCHUL KIM, SEUNGJUN BAE
  • Publication number: 20190164594
    Abstract: A memory device may include a first data line driver circuit that generates a first reference voltage set based on a first code and a second code associated with a first data line, and determines bit values of the first input data received through the first data line, based on the first reference voltage set. A second data line driver circuit may similarly generate a second reference voltage set. The reference voltages may have levels based on a decision feedback equalization (DFE) technique to reduce bit errors otherwise caused by inter symbol interference.
    Type: Application
    Filed: September 20, 2018
    Publication date: May 30, 2019
    Inventors: YOON-JOO EOM, SEUNGJUN BAE, HYE JUNG KWON, YOUNG-JU KIM
  • Publication number: 20190164309
    Abstract: Disclosed is a method of detecting a shooting direction and apparatuses performing the method, the method including calculating a crossed angle between an object and a shadow of the object in an image and detecting a shooting direction of a shooting apparatus used for capturing the image based on the crossed angle and a reference angle corresponding to a time and a position at which the image is captured.
    Type: Application
    Filed: October 25, 2018
    Publication date: May 30, 2019
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: SungWon BYON, Eun Jung KWON, Hyunho PARK, Yong Tae LEE, Won Jae LEE, Dong Man JANG, Eui Suk JUNG, Sun-Joong KIM
  • Patent number: 10305457
    Abstract: A voltage trimming circuit includes a comparator, a code generator, nonvolatile storage device, a switch circuit, and a voltage generator. The comparator compares a reference voltage with a feedback voltage. The code generator generates a plurality of trimming codes for trimming the feedback voltage based on the comparison result of the comparator. If the feedback voltage is less than the reference voltage, the code generator adjusts up codes to increase the feedback voltage, from among the plurality of trimming codes and maintains down codes to decrease the feedback voltage, from among the plurality of trimming codes at an initial value. If the feedback voltage is greater than the reference voltage, the code generator adjusts the down codes and maintains the up codes at an initial value.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: May 28, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hye Jung Kwon, Younghun Seo
  • Publication number: 20190158320
    Abstract: A memory device includes memory cell array including a plurality of memory cells that store data, a first transmitter that transmits the data to an external device through a first data line, and a ZQ controller that performs a ZQ calibration operation to generate a first ZQ code for impedance matching of the first data line. The first transmitter encodes the first ZQ code and the first data based on a first clock and drives the first data line based on the encoded result based on a second clock.
    Type: Application
    Filed: August 22, 2018
    Publication date: May 23, 2019
    Inventors: Hye Jung Kwon, Seungjun Bae, Yongjae Lee, Young-Sik Kim, Young-Ju Kim, Suyeon Doo, Yoon-Joo Eom
  • Publication number: 20190137563
    Abstract: A test circuit includes a first logic gate that receives a test signal or a first voltage, a second logic gate that receives the test signal, a third logic gate that receives an output of the first logic gate, an output of the second logic gate, or a second voltage, a fourth logic gate that receives the output of the first logic gate or the output of the second logic gate, and a power circuit that prevents the second and fourth logic gates from being driven by supplying power to the second and fourth logic gates when the first logic gate receives the first voltage and the third logic gate receives the second voltage.
    Type: Application
    Filed: June 29, 2018
    Publication date: May 9, 2019
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hye Jung KWON, Seungjun BAE
  • Publication number: 20190116310
    Abstract: Disclosed is a method of processing an object in an image and a system for the same. According to an embodiment of the present disclosure, there is provided a method of processing an object in an image, the method including: detecting a first object from a first image obtained by a first network camera; detecting a second object from a second image obtained by a second network camera; checking similarity between the first and second objects in consideration of feature information of the first and second objects, installation location information of the first and second network cameras, and location information of a terminal device; and determining whether the first object is equal to the second object on the basis of the similarity between the first and second objects.
    Type: Application
    Filed: September 7, 2018
    Publication date: April 18, 2019
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Sung Won BYON, Eun Jung KWON, Hyun Ho PARK, Yong Tae LEE, Dong Man JANG, Eui Suk JUNG
  • Patent number: 10248433
    Abstract: A network management apparatus and method for remotely controlling a state of an IT device in order to use WOL to change a remote device from an inactive state to an active state over an IP network. The network management apparatus includes a detection pattern generator, a remote state controller, and a wake-up cause analyzer. By activating an inactivated PC connected over an IP network and positioned at a remote site using WOL to control a state of another IT device interoperating through the IP network as well as a state of the PC, it is possible to inactivate the device without unnecessarily having to leave the device on and then control the device as necessary, thereby reducing power consumption of the device and extending a lifetime of the device.
    Type: Grant
    Filed: April 4, 2017
    Date of Patent: April 2, 2019
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung Won Byon, Eun Jung Kwon, Jung Hak Kim, Hyun Ho Park, Yong Tae Lee, Eui Suk Jung, Hyun Woo Lee
  • Publication number: 20190053718
    Abstract: An intravascular sensor delivery device for measuring a physiological parameter of a patient, such as blood pressure, within a vascular structure or passage. In some embodiments, the device can be used to measure the pressure gradient across a stenotic lesion or heart valve. The sensor delivery device can be sized to pass over different sizes of guidewires to enable usage in coronary and peripheral arteries, for example.
    Type: Application
    Filed: October 22, 2018
    Publication date: February 21, 2019
    Inventors: Dale R. Manstrom, Amy Raatikka, Robert F. Wilson, Edward R. Miller, Jung Kwon Pak
  • Patent number: 10192887
    Abstract: The migration of dislocations into pristine single crystal material during crystal growth of an adjacent conductive strap is inhibited by a conductive barrier formed at the interface between the layers. The conductive barrier may be formed by implanting carbon impurities or depositing Si:C layer that inhibits dislocation movement across the barrier layer, or by forming a passivation layer by annealing in vacuum prior to deposition of amorphous Si to prevent polycrystalline nucleation at the surface of single crystalline Si, or by implanting nucleation promoting species to enhance the nucleation of polycrystalline Si away from single crystalline Si.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: January 29, 2019
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Yun Y. Wang, Oh-Jung Kwon, Stephen G. Fugardi, Sean M. Dillon
  • Publication number: 20190018737
    Abstract: A memory device includes an output pin, a mode register, a signal generator configured to generate a detection clock output signal including one of a random data pattern and a hold data pattern in response to first and second control signals from the mode register, and output the detection clock output signal through the output pin. The random data pattern includes pseudo-random data generated by the memory device. The hold data pattern is a fixed pattern pre stored in the memory device. The detection clock output signal is used for a clock and data recovery operation.
    Type: Application
    Filed: March 28, 2018
    Publication date: January 17, 2019
    Inventors: YONG-HUN KIM, SU-YEON DOO, DONG-SEOK KANG, HYE-JUNG KWON, YOUNG-JU KIM
  • Patent number: 10170304
    Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to self-aligned nanotube structures and methods of manufacture. The structure includes at least one nanotube structure supported by a plurality of spacers and an insulator material between the spacers and contacting the at least one nanotube structure.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: January 1, 2019
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Oh-Jung Kwon, Claude Ortolland, Dominic Schepis, Christopher Collins