Patents by Inventor Jung-Min Ha

Jung-Min Ha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12161722
    Abstract: The present invention relates to a novel heterocyclic compound and a composition, for preventing or treating a cancer, an autoimmune disease, and an inflammatory disease, comprising same. The novel heterocyclic compound of the present invention is a bifunctional compound having a Bruton's tyrosine kinase (BTK) degradation function via a ubiquitin proteasome pathway, and may be utilized as a composition for preventing or treating a cancer, an autoimmune disease, and Parkinson's disease.
    Type: Grant
    Filed: June 24, 2022
    Date of Patent: December 10, 2024
    Assignees: KOREA RESEARCH INSTITUTE OF CHEMICAL TECHNOLOGY, UBIX THERAPEUTICS, INC.
    Inventors: Pil Ho Kim, Sung Yun Cho, Jae Du Ha, Chi Hoon Park, Jong Yeon Hwang, Hyun Jin Kim, Song Hee Lee, Ye Seul Lim, Han Wool Kim, Sun Mi Yoo, Beom Seon Suh, Ji Youn Park, Je Ho Ryu, Jung Min Ahn, Hee Jung Moon, Ho Hyun Lee
  • Publication number: 20240285778
    Abstract: The present invention relates to a novel heterocyclic compound and a composition, for preventing or treating a cancer, an autoimmune disease, and an inflammatory disease, comprising same. The novel heterocyclic compound of the present invention is a bifunctional compound having a Bruton's tyrosine kinase (BTK) degradation function via a ubiquitin proteasome pathway, and may be utilized as a composition for preventing or treating a cancer, an autoimmune disease, and Parkinson's disease.
    Type: Application
    Filed: June 24, 2022
    Publication date: August 29, 2024
    Applicants: KOREA RESEARCH INSTITUTE OF CHEMICAL TECHNOLOGY, UBIX THERAPEUTICS, INC.
    Inventors: Pil Ho KIM, Sung Yun CHO, Jae Du HA, Chi Hoon PARK, Jong Yeon HWANG, Hyun Jin KIM, Song Hee LEE, Ye Seul LIM, Han Wool KIM, Sun Mi YOO, Beom Seon SUH, Ji Youn PARK, Je Ho RYU, Jung Min AHN, Hee Jung MOON, Ho Hyun LEE
  • Patent number: 12072878
    Abstract: Techniques are disclosed for generating a search index for a hierarchical data set so that a search query of the hierarchical data may return results without searching or analyzing the hierarchical data set itself. The techniques generate a flattened index that includes selected indexed attributes and additional attributes to be displayed with the indexed attributes. The techniques also generate a hierarchy representation of the hierarchical data. Using these generated data structures, query results may be returned without directly traversing the hierarchical data itself while also providing data and hierarchical context for the query results by overlaying the query results with nodes of the hierarchical representation or otherwise concurrently displaying the query results with nodes of the hierarchical representation.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: August 27, 2024
    Assignee: Oracle International Corporation
    Inventors: George John Kellner, Jung Min Ha, Mark Pearson, Jingyi Han, Jennifer Darmour, Abhay Kumar, David Barry Groves, Hong Tuck Liew, Abburi Rahul Krishna Naga Karthik, Johnson Kunnel Joesph, Ann Deena Philip, Subramanya Sarma Kuchi Venkata Raghavendra, Jitin Sai Pichika, Srinivas Sureshkumar Guthivari
  • Publication number: 20240270859
    Abstract: The present invention relates to a novel antibody specifically binding to OX40L and a bispecific antibody specifically binding to OX40L and TNF? and, specifically, to an antibody or a bispecific antibody specifically binding to human OX40L to effectively inhibit the binding of OX40 to an OX40 receptor; a nucleic acid encoding the antibody; an expression vector comprising the nucleic acid; a transformant comprising the expression vector; a method for preparing the antibody; a pharmaceutical composition for treating autoimmune diseases or inflammatory diseases, comprising the antibody; a composition for diagnosing autoimmune diseases or inflammatory diseases, comprising the antibody; a method for diagnosing autoimmune diseases or inflammatory diseases by using the antibody; a method for providing information on diagnosis of autoimmune diseases or inflammatory diseases by using the antibody; and a kit for providing the same.
    Type: Application
    Filed: December 9, 2020
    Publication date: August 15, 2024
    Inventors: Jung Min YOO, Chung Min LEE, Yoon Jung LEE, Hyeon Ju KANG, Seung Hee JUNG, Jong Ryoul CHOI, Kyu Eun CHO, Gyong Sik HA, Soo Young KIM, Bum Chan PARK, Jae Eun PARK, Eun Young SHIM, Hyun Mi LEE
  • Publication number: 20230303675
    Abstract: The present invention relates to an improved modified antibody, of which solubility is increased and which can be concentrated to have a high concentration and a method for manufacturing same, and to a modified antibody in which amino acids located in the framework region of the antibody are substituted, and a method for manufacturing same.
    Type: Application
    Filed: August 19, 2021
    Publication date: September 28, 2023
    Inventors: Jongil KO, Jung Min HA, Joo Hyoung LEE, Ju Ryoung NAM, Weon Sup LEE
  • Publication number: 20230090050
    Abstract: Techniques are disclosed for generating a search index for a hierarchical data set so that a search query of the hierarchical data may return results without searching or analyzing the hierarchical data set itself. The techniques generate a flattened index that includes selected indexed attributes and additional attributes to be displayed with the indexed attributes. The techniques also generate a hierarchy representation of the hierarchical data. Using these generated data structures, query results may be returned without directly traversing the hierarchical data itself while also providing data and hierarchical context for the query results by overlaying the query results with nodes of the hierarchical representation or otherwise concurrently displaying the query results with nodes of the hierarchical representation.
    Type: Application
    Filed: September 22, 2021
    Publication date: March 23, 2023
    Applicant: Oracle International Corporation
    Inventors: George John Kellner, Jung Min Ha, Mark Pearson, Jingyi Han, Jennifer Darmour, Abhay Kumar, David Barry Groves, Hong Tuck Liew, Abburi Rahul Krishna Naga Karthik, Johnson Kunnel Joesph, Ann Deena Philip, Subramanya Sarma Kuchi Venkata Raghavendra, Jitin Sai Pichika, Srinivas Sureshkumar Guthivari
  • Patent number: 11407833
    Abstract: The present invention relates to an anti-VISTA antibody or an antigen binding fragment thereof, a nucleic acid coding for the same, a vector carrying the nucleic acid, a cell transformed with the vector, a method for preparing the antibody or an antigen binding fragment thereof, a composition for prevention or treatment of autoimmune disease, comprising the same antibody, and a composition for concurrent administration in combination with a PD-1 antibody or PD-L1 antibody.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: August 9, 2022
    Assignee: PHARMABCINE INC.
    Inventors: Youngae Lee, Sang Soon Byun, Jung Min Ha, Sungho Ahn, Keunhee Oh, Weon Sup Lee, MiJu Park, Eun Hee Lee, Do-yun Kim, Jin-San Yoo
  • Publication number: 20220204603
    Abstract: The present disclosure relates to an antibody to inhibit function of Angiopoietin-2 (Ang-2) by binding specifically to Ang-2, and directed to an anti-Ang2 antibody, a nucleic acid encoding the same, a vector comprising the nucleic acid, a cell transformed with the vector, a method of preparing the same, an angiogenesis inhibitor comprising the same, a composition for treating a disease related with Angiopoietin-2 activation and/or overproduction, a composition for diagnosing a disease related with Angiopoietin-2 activation and/or overproduction, a composition for treating eye disease or a composition for preventing or treating a cancer, and a composition for combining an antibody binding to Ang2 with a drug other than the antibody binding to Ang2.
    Type: Application
    Filed: February 25, 2020
    Publication date: June 30, 2022
    Inventors: Ju Ryoung NAM, Sang Soon BYUN, Jongil KO, Do-yun KIM, Joo Hyoung LEE, Jung Min HA, Cheonho PARK, Eun-Ah LEE, Weon Sup LEE, Jin-San YOO
  • Publication number: 20200407449
    Abstract: The present invention relates to an anti-VISTA antibody or an antigen binding fragment thereof, a nucleic acid coding for the same, a vector carrying the nucleic acid, a cell transformed with the vector, a method for preparing the antibody or an antigen binding fragment thereof, a composition for prevention or treatment of autoimmune disease, comprising the same antibody, and a composition for concurrent administration in combination with a PD-1 antibody or PD-L1 antibody.
    Type: Application
    Filed: October 22, 2018
    Publication date: December 31, 2020
    Inventors: Youngae Lee, Sang Soon Byun, Jung Min Ha, Sungho Ahn, Keunhee Oh, Weon Sup Lee, MiJu Park, Eun Hee Lee, Do-yun Kim, Jin-San Yoo
  • Patent number: 8398769
    Abstract: A chemical vapor deposition apparatus is disclosed, which is capable of improving the yield by an extension of a cleaning cycle, the chemical vapor deposition apparatus comprising a chamber with a substrate-supporting member for supporting a substrate; a chamber lid with plural first source supplying holes, the chamber lid installed over the chamber; plural source supplying pipes for supplying a process source to the plural first source supplying holes; a spraying-pipe supporting member with plural second source supplying holes corresponding to the plural first source supplying holes, the spraying-pipe supporting member detachably installed in the chamber lid; and plural source spraying pipes with plural third source supplying holes and plural source spraying holes, the plural source spraying pipes supported by the spraying-pipe supporting member, wherein the plural third source supplying holes are supplied with the process source through the plural second source supplying holes, and the plural source sprayin
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: March 19, 2013
    Assignee: Jusung Engineering Co., Ltd.
    Inventors: Sang Ki Park, Jung Min Ha, Seong Ryong Hwang
  • Publication number: 20100307416
    Abstract: A chemical vapor deposition apparatus is disclosed, which is capable of improving the yield by an extension of a cleaning cycle, the chemical vapor deposition apparatus comprising a chamber with a substrate-supporting member for supporting a substrate; a chamber lid with plural first source supplying holes, the chamber lid installed over the chamber; plural source supplying pipes for supplying a process source to the plural first source supplying holes; a spraying-pipe supporting member with plural second source supplying holes corresponding to the plural first source supplying holes, the spraying-pipe supporting member detachably installed in the chamber lid; and plural source spraying pipes with plural third source supplying holes and plural source spraying holes, the plural source spraying pipes supported by the spraying-pipe supporting member, wherein the plural third source supplying holes are supplied with the process source through the plural second source supplying holes, and the plural source sprayin
    Type: Application
    Filed: May 27, 2010
    Publication date: December 9, 2010
    Inventors: Sang Ki PARK, Jung Min Ha, Seong Ryong Hwang
  • Publication number: 20100242275
    Abstract: In a method of manufacturing an inspection apparatus for inspecting an electronic device, a sacrificial substrate is formed into a substrate pattern including a through-hole. A principal substrate including an internal wiring penetrating from a first surface to a second surface thereof is combined with the substrate pattern in such a configuration that the through-hole is positioned over the internal wiring, thereby forming a combined structure. A filling structure is formed in the through-hole of the substrate pattern, and the filling structure is electrically connected to the internal wiring of the principal substrate. The substrate pattern is removed from the combined structure, and thus the filling structure is formed into a probe structure on the principal substrate. The probe structure may be connected to the principal substrate without any adhesives such as a solder, to thereby prevent electrical resistance increase and excessive thermal stress.
    Type: Application
    Filed: October 22, 2008
    Publication date: September 30, 2010
    Inventors: Woo-Chang Choi, Jung-Min Ha, Yong-Ji Lee, Ji-Hee Hwang, Sung-Jae Oh
  • Patent number: 7326587
    Abstract: A semiconductor memory device having a capacitor is disclosed. The capacitor includes a bottom capacitor surface formed of a silicon-germanium crystalline layer or a dual layer in which a silicon-germanium crystalline layer covers a silicon crystalline layer. The bottom capacitor surface is uneven and is conventionally formed by an epitaxial method. The silicon germanium crystalline layer is approximately 5 to 50 percent germanium content by weight. The method of fabricating the semiconductor memory device comprises: selectively exposing the surface of a crystalline silicon substrate at the region where the capacitor bottom electrode is formed; supplying a source gas to grow a silicon germanium crystalline layer at the surface of the selectively exposed silicon substrate; stacking a dielectric layer over the silicon germanium crystalline layer; and stacking a conductive layer over the dielectric layer to form a capacitor top electrode.
    Type: Grant
    Filed: June 14, 2005
    Date of Patent: February 5, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Woo Park, Jung-Min Ha
  • Publication number: 20050230732
    Abstract: A semiconductor memory device having a capacitor is disclosed. The capacitor includes a bottom capacitor surface formed of a silicon-germanium crystalline layer or a dual layer in which a silicon-germanium crystalline layer covers a silicon crystalline layer. The bottom capacitor surface is uneven and is conventionally formed by an epitaxial method. The silicon germanium crystalline layer is approximately 5 to 50 percent germanium content by weight. The method of fabricating the semiconductor memory device comprises: selectively exposing the surface of a crystalline silicon substrate at the region where the capacitor bottom electrode is formed; supplying a source gas to grow a silicon germanium crystalline layer at the surface of the selectively exposed silicon substrate; stacking a dielectric layer over the silicon germanium crystalline layer; and stacking a conductive layer over the dielectric layer to form a capacitor top electrode.
    Type: Application
    Filed: June 14, 2005
    Publication date: October 20, 2005
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jung-Woo Park, Jung-Min Ha
  • Patent number: 6927444
    Abstract: A semiconductor memory device having a capacitor is disclosed. The capacitor includes a bottom capacitor surface formed of a silicon-germanium single crystalline layer or a dual layer in which a silicon-germanium single crystalline layer covers a silicon single crystalline layer. The bottom capacitor surface is uneven and is conventionally formed by an epitaxial method. The silicon germanium single crystalline layer is approximately 5 to 50 percent germanium content by weight. The method of fabricating the semiconductor memory device comprises: selectively exposing the surface of a single crystalline silicon substrate at the region where the capacitor bottom electrode is formed; supplying a source gas to grow a silicon germanium single crystalline layer at the surface of the selectively exposed silicon substrate; stacking a dielectric layer over the silicon germanium single crystalline layer; and stacking a conductive layer over the dielectric layer to form a capacitor top electrode.
    Type: Grant
    Filed: May 30, 2002
    Date of Patent: August 9, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Woo Park, Jung-Min Ha
  • Patent number: 6596605
    Abstract: A method of forming polycrystalline silicon germanium gate electrode is disclosed. The method include the steps of forming gate insulation layer on a substrate, forming a polycrystalline silicon layer on the gate insulation layer and making a plasma doping of germanium to the polycrystalline silicon layer. Generally, boron is doped to the polycrystalline silicon after the step of the plasma doping of germanium. The process of plasma doping of germanium comprises the step of forming germanium contained plasma and enhancing bias electric potential to substrate for the formulated germanium plasma to be accelerated and injected to the polycrystalline silicon layer revealed. If the present invention is applied to CMOS transistor device, doping mask for the germanium plasma doping can be used.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: July 22, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Min Ha, Jung-Woo Park
  • Patent number: 6562707
    Abstract: A method of forming a semiconductor device using selective epitaxial growth (SEG) is provided. This method includes forming an insulating layer pattern having a window on a semiconductor substrate. The window exposes a predetermined region of the semiconductor substrate. The substrate having the window is cleaned, thereby removing any native oxide layer on the exposed substrate. The cleaned substrate is oxidized. Accordingly, a sacrificial oxide layer is formed thereon. The sacrificial oxide layer is removed. Thus, the exposed substrate has substantially no crystalline defects. A single crystalline semiconductor layer is then grown on the exposed substrate using SEG.
    Type: Grant
    Filed: January 10, 2002
    Date of Patent: May 13, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Ryol Ryu, Jung-Woo Park, Jung-Min Ha, Si-Young Choi
  • Publication number: 20030017667
    Abstract: A semiconductor memory device having a capacitor is disclosed. The capacitor includes a bottom capacitor surface formed of a silicon-germanium single crystalline layer or a dual layer in which a silicon-germanium single crystalline layer covers a silicon single crystalline layer. The bottom capacitor surface is uneven and is conventionally formed by an epitaxial method. The silicon germanium single crystalline layer is approximately 5 to 50 percent germanium content by weight. The method of fabricating the semiconductor memory device comprises: selectively exposing the surface of a single crystalline silicon substrate at the region where the capacitor bottom electrode is formed; supplying a source gas to grow a silicon germanium single crystalline layer at the surface of the selectively exposed silicon substrate; stacking a dielectric layer over the silicon germanium single crystalline layer; and stacking a conductive layer over the dielectric layer to form a capacitor top electrode.
    Type: Application
    Filed: May 30, 2002
    Publication date: January 23, 2003
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jung-Woo Park, Jung-Min Ha
  • Publication number: 20020146888
    Abstract: A method of forming a semiconductor device using selective epitaxial growth (SEG) is provided. This method includes forming an insulating layer pattern having a window on a semiconductor substrate. The window exposes a predetermined region of the semiconductor substrate. The substrate having the window is cleaned, thereby removing any native oxide layer on the exposed substrate. The cleaned substrate is oxidized. Accordingly, a sacrificial oxide layer is formed thereon. The sacrificial oxide layer is removed. Thus, the exposed substrate has substantially no crystalline defects. A single crystalline semiconductor layer is then grown on the exposed substrate using SEG.
    Type: Application
    Filed: January 10, 2002
    Publication date: October 10, 2002
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jong-Ryol Ryu, Jung-Woo Park, Jung-Min Ha, Si-Young Choi
  • Publication number: 20020072182
    Abstract: A method of forming polycrystalline silicon germanium gate electrode is disclosed. The method include the steps of forming gate insulation layer on a substrate, forming a polycrystalline silicon layer on the gate insulation layer and making a plasma doping of germanium to the polycrystalline silicon layer. Generally, boron is doped to the polycrystalline silicon after the step of the plasma doping of germanium. The process of plasma doping of germanium comprises the step of forming germanium contained plasma and enhancing bias electric potential to substrate for the formulated germanium plasma to be accelerated and injected to the polycrystalline silicon layer revealed. If the present invention is applied to CMOS transistor device, doping mask for the germanium plasma doping can be used.
    Type: Application
    Filed: December 28, 2000
    Publication date: June 13, 2002
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jung-Min Ha, Jung-Woo Park