Abstract: A display device, includes: a scan driver configured to sequentially supply scan signals having a turn-on level to the first scan line and the second scan line during a first period and to concurrently supply scan signals having a turn-on level to the first scan line and the second scan line during a second period after the first period, wherein: a mask period corresponds to a difference between a start point of the second period and a start point of the first period in a next frame period, a first frame period and a second frame period have different mask periods, a third frame period between the first frame period and the second frame period has a same mask period as the first frame period, and a fourth frame period between the first frame period and the second frame period has a same mask period as the second frame period.

Abstract: A display device includes: a low drop-out (“LDO”) regulator which provides a second power voltage to a power line during a first period of one frame; a buck converter which provides a first power voltage to the power line during a third period of the one frame; and a pixel connected to the LDO regulator and the buck converter through the power line. A voltage level of the second power voltage is equal to a voltage level of the first power voltage.

Abstract: A display device includes: a pixel connected to each of a first scan line, a second scan line, and a data line; a scan driver supplying a first scan signal to the first scan line and a second scan signal to the second scan line; a controller dividing one frame period into an active period and a blank period and generating a count signal in which a time duration of the blank period is counted and a power control signal; a data driver supplying a data signal to the data line; and a power supply controlling a source driving voltage supplied to the data driver according to a duration of the blank period based on the power control signal. When the count signal reaches a reference value, the controller supplies a start signal for output of the first scan signal to the scan driver.

Abstract: A power voltage generator includes a booster, a voltage sensor, a constant voltage controller and a constant current controller. The booster is configured to boost an input voltage to an output voltage based on an on-off operation of a switch. The voltage sensor is configured to generate a sensing voltage by sensing the output voltage. The constant voltage controller is configured to generate a first switching signal to control the switch by comparing the sensing voltage with a reference voltage. The constant current controller is configured to generate a gain based on a ratio of an electrode signal of the switch and a target signal by comparing the electrode signal of the switch with the target signal.

Abstract: A display device includes: a low drop-out (“LDO”) regulator which provides a second power voltage to a power line during a first period of one frame; a buck converter which provides a first power voltage to the power line during a third period of the one frame; and a pixel connected to the LDO regulator and the buck converter through the power line. A voltage level of the second power voltage is equal to a voltage level of the first power voltage.

Abstract: A display device includes a plurality of pixels, a power supply, a voltmeter, and a timing controller. The power supply is configured to generate an initialization voltage to be supplied to a sensing pixel among the pixels. The voltmeter is configured to measure a first value of the initialization voltage supplied to the sensing pixel during an active period of a frame period and a second value of the initialization voltage supplied to the sensing pixel during a vertical blank period of the frame period. The timing controller is configured to generate rewrite image data that is supplied to the sensing pixel during the vertical blank period. The rewrite image data is generated from image data applied to the pixels during the active period and a difference between the first and second values.

Abstract: A display device includes: a plurality of pixel blocks each including a plurality of pixels; a scan driver supplying a scan signal to the scan lines and to supply a control signal to the control lines; a data driver supplying an image data voltage or a low grayscale data voltage to the data lines; and a power supply supplying a reference voltage to the pixels, wherein the pixels are configured to receive the image data voltage during a first scan period of a frame, and to receive the low grayscale data voltage during a second scan period of the frame, and the reference voltage supplied to a first pixel row of at least one of the pixel blocks in the first scan period is different from the reference voltage supplied to a last pixel row of at least one of the pixel blocks in the first scan period.

Abstract: A semiconductor device includes an active pattern including a lower pattern and a plurality of sheet patterns; a gate structure disposed on the lower pattern and surrounding the plurality of sheet patterns; and a source/drain pattern filling a source/drain recess formed on one side of the gate structure. The source/drain pattern includes a first semiconductor pattern extending along the source/drain recess and contacting the lower pattern, a second and third semiconductor patterns sequentially disposed on the first semiconductor pattern, a lower surface of the third semiconductor pattern is disposed below a lower surface of a lowermost sheet pattern, a side surface of the third semiconductor pattern includes a planar portion, and a thickness of the second semiconductor pattern on the lower surface of the third semiconductor pattern is different from a thickness of the second semiconductor pattern on the planar portion of the side surface of the third semiconductor pattern.

Abstract: A semiconductor device includes a multi-channel active pattern, a plurality of gate structures on the multi-channel active pattern and spaced apart from each other in a first direction, the plurality of gate structures including a gate electrode that extends in a second direction different from the first direction, a source/drain recess between the adjacent gate structures, and a source/drain pattern on the multi-channel active pattern in the source/drain recess, wherein the source/drain pattern includes: a semiconductor liner layer including silicon-germanium and extending along the source/drain recess, a semiconductor filling layer including silicon-germanium on the semiconductor liner layer, and at least one or more semiconductor insertion layers between the semiconductor liner layer and the semiconductor filling layer, and wherein the at least one or more semiconductor insertion layers have a saddle structure.

Abstract: A semiconductor device includes an active pattern which includes a lower pattern, and a sheet pattern that is spaced apart from the lower pattern in a first direction, a gate structure on the lower pattern that includes a gate electrode that surrounds the sheet pattern, the gate electrode extending in a second direction that is perpendicular to the first direction, and a source/drain pattern on the lower pattern and in contact with the sheet pattern. A contact surface between the sheet pattern and the source/drain pattern has a first width in the second direction, and the sheet pattern has a second width in the second direction that is greater than the first width.

Abstract: There is provided a semiconductor device comprising an active pattern, including a lower pattern extending in a first direction, and a plurality of sheet patterns spaced apart from the lower pattern in a second direction perpendicular to the first direction, a plurality of gate structures on the lower pattern to be spaced apart from each other in the first direction and including a gate electrode and a gate insulating film wrapping the plurality of sheet patterns, a source/drain recess defined between the gate structures adjacent to each other, and a source/drain pattern inside the source/drain recess and including a semiconductor blocking film formed continuously along the source/drain recess, wherein the source/drain recesses include a plurality of width extension regions, and a width of each of the width extension regions in the first direction increases and then decreases, as it goes away from an upper surface of the lower pattern.

Abstract: A power voltage generator includes a booster, a voltage sensor, a constant voltage controller and a constant current controller. The booster is configured to boost an input voltage to an output voltage based on an on-off operation of a switch. The voltage sensor is configured to generate a sensing voltage by sensing the output voltage. The constant voltage controller is configured to generate a first switching signal to control the switch by comparing the sensing voltage with a reference voltage. The constant current controller is configured to generate a gain based on a ratio of an electrode signal of the switch and a target signal by comparing the electrode signal of the switch with the target signal.

Abstract: A display device according to some embodiments includes pixels divided into pixel rows arranged in a horizontal direction, and including a light emitting element, and a first transistor for applying a drive current to the light emitting element, and a sensing driver configured to receive a sensing value extracted from one or more of the pixels, wherein at least one pixel row of the pixel rows is configured to be driven in one frame including an emission period in which the light emitting element emits light after a data voltage is applied to the pixels, and an active sensing period for sensing a characteristic of the first transistor.

Abstract: A display device includes: a pixel connected to each of a first scan line, a second scan line, and a data line; a scan driver supplying a first scan signal to the first scan line and a second scan signal to the second scan line; a controller dividing one frame period into an active period and a blank period and generating a count signal in which a time duration of the blank period is counted and a power control signal; a data driver supplying a data signal to the data line; and a power supply controlling a source driving voltage supplied to the data driver according to a duration of the blank period based on the power control signal. When the count signal reaches a reference value, the controller supplies a start signal for output of the first scan signal to the scan driver.

Abstract: A display device includes: a net power control circuit configured to analyze a screen load from an input image signal to generate a load signal including a load value corresponding to the screen load; and an overcurrent protection circuit configured to set a set current value at a predetermined ratio with respect to a global current value corresponding to the load value included in the load signal, and to determine whether or not the display device is powered off based on the set current value.

Abstract: A display device includes: a plurality of pixel blocks each including a plurality of pixels; a scan driver supplying a scan signal to the scan lines and to supply a control signal to the control lines; a data driver supplying an image data voltage or a low grayscale data voltage to the data lines; and a power supply supplying a reference voltage to the pixels, wherein the pixels are configured to receive the image data voltage during a first scan period of a frame, and to receive the low grayscale data voltage during a second scan period of the frame, and the reference voltage supplied to a first pixel row of at least one of the pixel blocks in the first scan period is different from the reference voltage supplied to a last pixel row of at least one of the pixel blocks in the first scan period.

Abstract: A display device includes a processor which supplies grayscale data in active periods of frame periods and stops supply of the grayscale data in blank periods of the frame periods, a timing controller which generates a change signal when a difference between a first blank period of a first frame period and a second blank period of a second frame period is greater than a threshold value, a power supply which supplies a first power voltage having a voltage level changed based on the change signal to a first power line, and pixels commonly connected to the first power line.

Abstract: A semiconductor device includes a fin-type pattern on a substrate, the fin-type pattern extending in a first direction and protruding from the substrate in a third direction, a first wire pattern on the fin-type pattern, the first wire pattern being spaced apart from the fin-type pattern in the third direction, and a gate electrode extending in a second direction, which is perpendicular to the first and third directions, and surrounding the first wire pattern, the gate electrode including a first portion that overlaps with the fin-type pattern in the second direction and a second portion corresponding to a remainder of the gate electrode except for the first portion.

Abstract: A display device includes a scan driver which includes a first stage including a first output terminal connected to a first carry line, a second output terminal connected to a first scan line, and a third output terminal connected to a first sensing line, and a second stage including a first input terminal connected to the first carry line, a fourth output terminal connected to a second scan line, and a fifth output terminal connected to a second sensing line. In a sensing period, signals having a turn-on level are respectively output from the first output terminal, the second output terminal, and the third output terminal during a predetermined delay period before signals having a turn-on level are respectively output from the fourth output terminal and the fifth output terminal.

Abstract: A semiconductor device includes a fin-type pattern on a substrate, the fin-type pattern extending in a first direction and protruding from the substrate in a third direction, a first wire pattern on the fin-type pattern, the first wire pattern being spaced apart from the fin-type pattern in the third direction, and a gate electrode extending in a second direction, which is perpendicular to the first and third directions, and surrounding the first wire pattern, the gate electrode including a first portion that overlaps with the fin-type pattern in the second direction and a second portion corresponding to a remainder of the gate electrode except for the first portion.