Abstract: The present invention relates to a semiconductor memory device and a method for fabricating the same. The semiconductor memory device, including: a plurality of gate structures formed on a substrate; a contact junction region formed beneath the substrate disposed in lateral sides of the respective gate structures; a trench formed by etching a portion of the substrate disposed in the contact junction region with a predetermined thickness; a dopant diffusion barrier layer formed on sidewalls of the trench; and a contact plug filled into a space created between the gate structures and inside of the trench, wherein the dopant diffusion barrier layer prevents dopants within the contact plug from diffusing out.

Abstract: The present invention relates to a semiconductor memory device and a method for fabricating the same. The semiconductor memory device, including: a plurality of gate structures formed on a substrate; a contact junction region formed beneath the substrate disposed in lateral sides of the respective gate structures; a trench formed by etching a portion of the substrate disposed in the contact junction region with a predetermined thickness; a dopant diffusion barrier layer formed on sidewalls of the trench; and a contact plug filled into a space created between the gate structures and inside of the trench, wherein the dopant diffusion barrier layer prevents dopants within the contact plug from diffusing out.

Abstract: A method for fabricating a semiconductor device is provided. The method includes: forming an inter-layer insulation layer on a substrate; forming a hard mask layer on the inter-layer insulation layer; etching the hard mask layer using a contact mask; and etching the inter-layer insulation layer using the hard mask layer as an etch barrier, thereby obtaining an opening wherein the etching of the hard mask layer and the etching of the inter-layer insulation layer are performed in one etch chamber.

Abstract: The present invention relates to a semiconductor memory device and a method for fabricating the same. The semiconductor memory device, including: a plurality of gate structures formed on a substrate; a contact junction region formed beneath the substrate disposed in lateral sides of the respective gate structures; a trench formed by etching a portion of the substrate disposed in the contact junction region with a predetermined thickness; a dopant diffusion barrier layer formed on sidewalls of the trench; and a contact plug filled into a space created between the gate structures and inside of the trench, wherein the dopant diffusion barrier layer prevents dopants within the contact plug from diffusing out.

Abstract: A method for forming a semiconductor device having improved characteristics and reliability by forming a hard mask layer on a bit line to prevent degradation of characteristics of the device in a self-alignment contact process of a storage electrode is disclosed. The hard mask layer utilizes over-hang formed at the upper portion of the bit line so as to provide sufficient protection for the bit line in the subsequent etching processes.

Abstract: A method for forming a semiconductor device having improved characteristics and reliability by forming a hard mask layer on a bit line to prevent degradation of characteristics of the device in a self-alignment contact process of a storage electrode is disclosed. The hard mask layer utilizes over-hang formed at the upper portion of the bit line so as to provide sufficient protection for the bit line in the subsequent etching processes.