Patents by Inventor Jung Wu

Jung Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240387536
    Abstract: An embodiment includes a semiconductor device, a plurality of fin structures extending from a substrate, the plurality of fin structures having a plurality of first fin structures and a plurality of second fin structures. The semiconductor device also includes a plurality of isolation regions on the substrate and disposed between the plurality of fin structures. The device also includes a plurality of gate structures on the plurality of isolation regions. The device also includes a plurality of epitaxy structures on one of the plurality of first fin structures. The device also includes a plurality of contact structures on the plurality of epitaxy structures, where the plurality of first fin structures, the plurality of gate structures, the plurality of epitaxy structures, and the plurality of contact structures are components of one or more resonators.
    Type: Application
    Filed: July 30, 2024
    Publication date: November 21, 2024
    Inventors: Hsi-Jung Wu, Sheng-Fu Yu, Ru-Shang Hsiao, Ying-Hsin Lu
  • Publication number: 20240388720
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for reducing a quantity of buffers for a video codec. One of the methods includes determining, from a plurality of prediction modes, a prediction mode for data that represents frame data in a frame; in response to determining the prediction mode, selecting, using the prediction mode, one or more buffers from a plurality of buffers, each buffer of which is for a prediction mode from the plurality of prediction modes, a first quantity of buffers in the plurality of buffers being less than a second quantity of prediction modes in the plurality of prediction modes; retrieving, from each of the one or more buffers, historical data for the frame data; and in response to retrieving the historical data, generating, using the historical data, updated data for the frame data in the frame of the video sequence.
    Type: Application
    Filed: July 25, 2024
    Publication date: November 21, 2024
    Inventors: Yunfei Zheng, Alexandros Tourapis, Alican Nalci, Felix C. Fernandes, Hilmi Enes Egilmez, Hsi-Jung Wu, Jaehong Chon, Jun Xin, Yeqing Wu, Yixin Du
  • Publication number: 20240387258
    Abstract: Methods for forming patterned multi-layer stacks including a metal-containing layer are provided herein. Methods involve using silicon-containing non-metal materials in a multi-layer stack including one sacrificial layer to be later removed and replaced with metal while maintaining etch contrast to pattern the multi-layer stack and selectively remove the sacrificial layer prior to depositing metal. Methods involve using silicon oxycarbide in lieu of silicon nitride, and a sacrificial non-metal material in lieu of a metal-containing layer, to fabricate the multi-layer stack, pattern the multi-layer stack, selectively remove the sacrificial non-metal material to leave spaces in the stack, and deposit metal-containing material into the spaces. Sacrificial non-metal materials include silicon nitride and doped polysilicon, such as boron-doped silicon.
    Type: Application
    Filed: July 26, 2024
    Publication date: November 21, 2024
    Inventors: Hui-Jung Wu, Bart J. Van Schravendijk, Mark Naoshi Kawaguchi, Gereng Gunawan, Jay E. Uglow, Nagraj Shankar, Gowri Channa Kamarthy, Kevin M. McLaughlin, Ananda K. Banerji, Jialing Yang, John Hoang, Aaron Lynn Routzahn, Nathan Musselwhite, Meihua Shen, Thorsten Bernd Lill, Hao Chi, Nicholas Dominic Altieri
  • Patent number: 12149699
    Abstract: Techniques are disclosed by which a coding parameter is determined to encode video data resulting in encoded video data possessing a highest possible video quality. Features may be extracted from an input video sequence. The extracted features may be compared to features described in a model of coding parameters generated by a machine learning algorithm from reviews of previously-coded videos, extracted features of the previously-coded videos, and coding parameters of the previously-coded videos. When a match is detected between the extracted features of the input video sequence and extracted features represented in the model, a determination may be made as to whether coding parameters that correspond to the matching extracted feature correspond to a tier of service to which the input video sequence is to be coded.
    Type: Grant
    Filed: October 4, 2021
    Date of Patent: November 19, 2024
    Assignee: APPLE INC.
    Inventors: Yeping Su, Xingyu Zhang, Chris Chung, Jun Xin, Hsi-Jung Wu
  • Publication number: 20240379038
    Abstract: A display device includes a display panel, an optical structure layer, a driving unit, a timing control unit and a light sensing unit. The optical structure layer is disposed on the display panel. The driving unit is electrically connected to the display panel. The timing control unit is electrically connected to the driving unit. The light sensing unit is electrically connected to the timing control unit to provide a light sensing result to the timing control unit. The timing control unit is used to receive a first signal and provides a second signal and a third signal to the driving unit according to the light sensing result, and the driving unit drives the display panel according to the second signal and the third signal.
    Type: Application
    Filed: April 11, 2024
    Publication date: November 14, 2024
    Inventors: Jen-I YANG, Kuo-Jung WU, Po-Yang CHEN, I-An YAO
  • Patent number: 12142868
    Abstract: The present invention relates to a chip-fixing device for a socket, which comprises a fixing base body and a movable stop. The socket is assembled in a socket-accommodating recess of the fixing base body. The movable stop is assembled in the fixing base body and controlled in such a manner that a stopper is moved between a first position and a second position, wherein the first position refers to a position where the stopper is located right above the socket, and the second position refers to a position where the stopper is not located right above the socket. Accordingly, the socket-accommodating recess can be used to install sockets of different sizes, and the movable stop can drive the stopper to restrict a chip from falling off the socket or drive the stopper to release the chip, depending on presence or absence of an external force.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: November 12, 2024
    Assignee: CHROMA ATE INC.
    Inventors: Hui-Jung Wu, Tsung-I Lin, Shou-Sheng Hsu
  • Publication number: 20240366877
    Abstract: An injection device is provided, including a syringe having a barrel and a flange and a backstop configured to be coupled with the syringe adjacent to the flange. The backstop includes an inner surface generally extending around at least a portion of the syringe, wherein the inner surface includes at least one protrusion extending away from the inner surface and configured to engage the flange and/or the barrel to permit or promote airflow through a space between the inner surface and the syringe.
    Type: Application
    Filed: May 24, 2024
    Publication date: November 7, 2024
    Applicant: AMGEN INC.
    Inventors: Wael Mismar, Jessica Hai Liu, Dylan Bourelle, Chia-Jung Wu, Shaun Devitt, Kenneth G. Schalhoub, Tej Desai, Mads Schjoth Due, Anthony Bitong, Arin Keshishian, Chelsea Balli-Cruz, Pierre Burquel, Ryan Oba, Malak Guirguis
  • Publication number: 20240371917
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a resistor structure overlying a semiconductor substrate. A dielectric structure overlies the semiconductor substrate. The resistor structure is disposed within the dielectric structure. The resistor structure includes a thin film resistor (TFR) layer and a first capping structure disposed on the TFR layer. A first cavity is disposed within the dielectric structure and abuts a first sidewall of the first capping structure.
    Type: Application
    Filed: May 5, 2023
    Publication date: November 7, 2024
    Inventors: Chun-Heng Chen, Hsi-Jung Wu, Jiun-Jie Huang, Ru-Shang Hsiao, Yu-Wei Liang, Yu-Chun Chang
  • Publication number: 20240371705
    Abstract: A wafer bonding apparatus is provided. The wafer bonding apparatus includes a first wafer chuck, a second wafer chuck, and a plurality of bonding pins. The first wafer chuck is configured to hold a first wafer. The second wafer chuck is configured to hold a second wafer. The bonding pins are accommodated in the first wafer chuck and configured to be movable through the first wafer chuck to apply pressure to bend the first wafer, thereby causing bonding contact of the first wafer and the second wafer.
    Type: Application
    Filed: May 4, 2023
    Publication date: November 7, 2024
    Inventors: Jeng-Nan HUNG, Chen-Hua YU, Tung-Li WU, Chung-Jung WU
  • Patent number: 12137199
    Abstract: A system obtains a data set representing immersive video content for display at a display time, including first data representing the content according to a first level of detail, and second data representing the content according to a second higher level of detail. During one or more first times prior to the display time, the system causes at least a portion of the first data to be stored in a buffer. During one or more second times prior to the display time, the system generates a prediction of a viewport for displaying the content to a user at the display time, identifies a portion of the second data corresponding to the prediction of the viewport, and causes the identified portion of the second data to be stored in the video buffer. At the display time, the system causes the content to be displayed to the user using the video buffer.
    Type: Grant
    Filed: January 8, 2024
    Date of Patent: November 5, 2024
    Assignee: Apple Inc.
    Inventors: Fanyi Duanmu, Jun Xin, Hsi-Jung Wu, Xiaosong Zhou
  • Publication number: 20240345428
    Abstract: An electronic device including an active region and a peripheral region, and includes a substrate including a first edge; a first electrode layer disposed on the substrate; a first conductive glue disposed on the substrate and in the peripheral region; a second conductive glue disposed on the substrate and in the peripheral region; an insulating glue disposed in the peripheral region and overlapped with the first conductive glue and the second conductive glue; and a first metal element fixed on the first electrode layer through the first conductive glue and the insulating glue; wherein in a top view, the insulating glue extends along an extension direction parallel to the first edge, and along the extension direction, a sum of lengths of the first conductive glue and the second conductive glue is less than a length of the insulating glue.
    Type: Application
    Filed: June 25, 2024
    Publication date: October 17, 2024
    Inventors: Wen-Cheng HUANG, Bi-Ly LIN, Chia-Chun YANG, Ying-Jung WU, Chien-Wei TSENG
  • Publication number: 20240340438
    Abstract: Techniques are proposed to improve temporal motion projection in video coding. Candidate reference frames available for use in temporal motion projection are sorted in processing order according to scores assigned based on estimates of the reference frames' suitability for prediction. Such estimates may be based on temporal distance between each candidate reference frame and that reference frame's prediction references. Estimates may be based, for each reference frame, based on an estimate of coding quality of a reference frame from which the respective candidate reference frame makes a prediction reference. Once sorted, the candidate reference frames may be processing in the sorting order to supply prediction data to a current frame that is to be coded from the candidate reference frames. Additionally, hardware friendly designs of motion field hole filling and motion vector smoothing operations are proposed.
    Type: Application
    Filed: March 1, 2024
    Publication date: October 10, 2024
    Inventors: Yeqing WU, Yunfei ZHENG, Yixin DU, Alican NALCI, Hilmi E. EGILMEZ, Guoxin JIN, Alexandros TOURAPIS, Jun XIN, Hsi-Jung WU
  • Publication number: 20240330091
    Abstract: An information handling system may include a processor, one or more audio speakers configured to play back audible audio signals, and a basic input/output system (BIOS) comprising a program of instructions comprising boot firmware configured to be the first code executed by the processor when the information handling system is booted or powered on in order to initialize the information handling system for operation. The BIOS may be further configured to monitor for an error occurring during execution of the BIOS and responsive to an error occurring during execution of the BIOS, cause the one or more audio speakers to play back a sequence of one or more multi-frequency audio signals encoding an identity of the error.
    Type: Application
    Filed: March 27, 2023
    Publication date: October 3, 2024
    Applicant: Dell Products L.P.
    Inventors: Huang-Lung CHEN, Daniel L. SMYTHIA, Chia-Wen MA, Chia-Hao CHANG, Chi-Hsiu KAO, Chung-Jung WU
  • Publication number: 20240323442
    Abstract: In an example method, a decoder accesses a bitstream representing video content, and parses one or more flexible coefficient position (FCP) syntax from the bitstream, where the one or more FCP syntax indicate one or more index values. The decoder further determines side information representing one or more characteristics of an encoded portion of the video content. The decoder interprets the one or more FCP syntax based on the side information, including determining a coefficient position with respect to the encoded portion of the video content based on the one or more index values and the side information. The decoder decodes the encoded portion of the video content according to the coefficient position.
    Type: Application
    Filed: March 12, 2024
    Publication date: September 26, 2024
    Inventors: Alican Nalci, Guoxin Jin, Hilmi Enes Egilmez, Hsi-Jung Wu, Jun Xin, Yixin Du, Yunfei Zheng, Yeqing Wu
  • Patent number: 12096044
    Abstract: In communication applications, aggregate source image data at a transmitter exceeds the data that is needed to display a rendering of a viewport at a receiver. Improved streaming techniques that include estimating a location of a viewport at a future time. According to such techniques, the viewport may represent a portion of an image from a multi-directional video to be displayed at the future time, and tile(s) of the image may be identified in which the viewport is estimated to be located. In these techniques, the image data of tile(s) in which the viewport is estimated to be located may be requested at a first service tier, and the other tile in which the viewport is not estimated to be located may be requested at a second service tier, lower than the first service tier.
    Type: Grant
    Filed: March 9, 2023
    Date of Patent: September 17, 2024
    Assignee: APPLE INC.
    Inventors: Xiaohua Yang, Alexandros Tourapis, Dazhong Zhang, Hang Yuan, Hsi-Jung Wu, Jae Hoon Kim, Jiefu Zhai, Ming Chen, Xiaosong Zhou
  • Patent number: 12094711
    Abstract: Tin oxide film on a semiconductor substrate is etched selectively with an etch selectivity of at least 10 in a presence of silicon (Si), carbon (C), or a carbon-containing material (e.g., photoresist) by exposing the substrate to a process gas comprising hydrogen (H2) and a hydrocarbon (e.g., at a hydrogen/hydrocarbon ratio of at least 5), such that a carbon-containing polymer is formed on the substrate. In some embodiments an apparatus for processing a semiconductor substrate includes a process chamber configured for housing the semiconductor substrate and a controller having program instructions on a non-transitory medium for causing selective etching of a tin oxide layer on a substrate in a presence of silicon, carbon, or a carbon-containing material by exposing the substrate to a plasma formed in a process gas that includes H2 and a hydrocarbon.
    Type: Grant
    Filed: February 10, 2022
    Date of Patent: September 17, 2024
    Assignee: Lam Research Corporation
    Inventors: Jengyi Yu, Samantha S. H. Tan, Yu Jiang, Hui-Jung Wu, Richard Wise, Yang Pan, Nader Shamma, Boris Volosskiy
  • Patent number: 12080592
    Abstract: Methods for forming patterned multi-layer stacks including a metal-containing layer are provided herein. Methods involve using silicon-containing non-metal materials in a multi-layer stack including one sacrificial layer to be later removed and replaced with metal while maintaining etch contrast to pattern the multi-layer stack and selectively remove the sacrificial layer prior to depositing metal. Methods involve using silicon oxycarbide in lieu of silicon nitride, and a sacrificial non-metal material in lieu of a metal-containing layer, to fabricate the multi-layer stack, pattern the multi-layer stack, selectively remove the sacrificial non-metal material to leave spaces in the stack, and deposit metal-containing material into the spaces. Sacrificial non-metal materials include silicon nitride and doped polysilicon, such as boron-doped silicon.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: September 3, 2024
    Assignee: Lam Research Corporation
    Inventors: Hui-Jung Wu, Bart J. van Schravendijk, Mark Naoshi Kawaguchi, Gereng Gunawan, Jay E. Uglow, Nagraj Shankar, Gowri Channa Kamarthy, Kevin M. McLaughlin, Ananda K. Banerji, Jialing Yang, John Hoang, Aaron Lynn Routzahn, Nathan Musselwhite, Meihua Shen, Thorsten Bernd Lill, Hao Chi, Nicholas Dominic Altieri
  • Patent number: 12068237
    Abstract: An apparatus including; a substrate; an isolator that is formed over the substrate, the isolator including a silicon shield layer that is formed between a first buried oxide (BOX) layer and a second BOX layer; a silicon layer having an oxide trench structure formed therein, the oxide trench structure being arranged to define a first silicon island and a second silicon island; a first electronic circuit that is formed over the first silicon island; and a second electronic circuit that is formed over the second silicon island, the first electronic circuit being electrically coupled to the first electronic circuit.
    Type: Grant
    Filed: October 31, 2022
    Date of Patent: August 20, 2024
    Assignee: Allegro MicroSystems, LLC
    Inventors: Sundar Chetlur, Maxim Klebanov, Cory Voisine, Kenneth Snowdon, Hsuan-Jung Wu
  • Patent number: 12059555
    Abstract: An injection device is provided, including a syringe having a barrel and a flange and a backstop configured to be coupled with the syringe adjacent to the flange. The backstop includes an inner surface generally extending around at least a portion of the syringe, wherein the inner surface includes at least one protrusion extending away from the inner surface and configured to engage the flange and/or the barrel to permit or promote airflow through a space between the inner surface and the syringe.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: August 13, 2024
    Assignee: AMGEN INC.
    Inventors: Wael Mismar, Jessica Hai Liu, Dylan Bourelle, Chia-Jung Wu, Shaun Devitt, Kenneth G. Schalhoub, Tej Desai, Mads Schjoth Due, Anthony Bitong, Arin Keshishian, Chelsea Balli-Cruz, Pierre Burquel, Ryan Oba, Malak Guirguis
  • Publication number: 20240263301
    Abstract: Methods and apparatuses for processing semiconductor substrates in an integration scheme to form chamferless vias are provided herein. Methods include bifurcating etching of dielectric by depositing a conformal removable sealant layer having properties for selective removal relative to dielectric material without damaging dielectric material. Some methods include forming an ashable conformal sealant layer. Methods also include forming hard masks including a Group IV metal and removing conformal removable sealant layers and hard masks in one operation using same etching chemistries.
    Type: Application
    Filed: April 12, 2024
    Publication date: August 8, 2024
    Inventors: Sivananda Krishnan Kanakasabapathy, Hui-Jung Wu, Richard Wise, Arpan Pravin Mahorowala