Patents by Inventor Junichi Koike
Junichi Koike has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7633164Abstract: The present invention includes a liquid crystal display device having an oxide film having high adhesiveness to a substrate to thereby prevent oxidation of a wiring material or the like, and includes, an electrode or a terminal electrode having high conductivity, and a manufacturing method therefor. Consequently, in the present invention, a liquid crystal display device has an electrode terminal of a TFT substrate, wherein the electrode is formed on an insulator and is comprised of a conductive layer mainly consisting of copper and an oxide covering an outer part, further the oxide is a layered structure of transparent electrodes, the layered portion having ohmic contact, and the oxide mainly consists of manganese oxide.Type: GrantFiled: April 10, 2007Date of Patent: December 15, 2009Assignees: Tohoku University, Advanced Interconnect Materials LLCInventors: Junichi Koike, Hideaki Kawakami
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Patent number: 7626665Abstract: To provide a highly conductive Cu alloy which is advantageous in that an alloying element added to Cu is first reacted with oxygen contained in a gas atmosphere or solid in contact with the Cu member to form an oxide film which can prevent oxidation of Cu. The copper alloy comprises copper (Cu) containing an inevitable impurity, and an element added to the copper, wherein the added element is capable of being dissolved in the copper in an amount of 0.1 to 20 at. %, wherein the added element has an oxide formation free energy smaller than that of Cu and has a diffusion coefficient in Cu larger than the self-diffusion coefficient of Cu.Type: GrantFiled: August 30, 2005Date of Patent: December 1, 2009Assignees: Tohoku University, Advanced Interconnect Materials LLCInventor: Junichi Koike
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Publication number: 20090290116Abstract: The present invention includes a liquid crystal display device having an oxide film having high adhesiveness to a substrate to thereby prevent oxidation of a wiring material or the like, and includes, an electrode or a terminal electrode having high conductivity, and a manufacturing method therefor. Consequently, in the present invention, a liquid crystal display device has an electrode terminal of a TFT substrate, wherein the electrode is formed on an insulator and is comprised of a conductive layer mainly consisting of copper and an oxide covering an outer part, further the oxide is a layered structure of transparent electrodes, the layered portion having ohmic contact, and the oxide mainly consists of manganese oxide.Type: ApplicationFiled: May 29, 2009Publication date: November 26, 2009Applicants: Tohoku University, Advanced Interconnect Materials, LLCInventors: Junichi Koike, Hideaki Kawakami
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Semiconductor device, its manufacturing method, and sputtering target material for use in the method
Publication number: 20090253260Abstract: A semiconductor device enables a barrier layer to fully acquire a barriering property against the diffusion of Cu from a wiring main body and the diffusion of Si from an insulating film, enhances the adhesiveness of the barrier layer and the insulating film and excels in reliability of operation over a long period of time. In this invention, a semiconductor device provided on an insulating film with a wiring includes the insulating film containing silicon, a wiring main body formed of copper in a groove-like opening disposed in the insulating film, and a barrier layer formed between the wiring main body and the insulating film and made of an oxide containing Cu and Si and Mn.Type: ApplicationFiled: March 24, 2009Publication date: October 8, 2009Applicant: Advanced Interconnect Materials, LLCInventor: Junichi KOIKE -
Publication number: 20090243112Abstract: A copper interconnection structure includes an insulating layer, an interconnection and a barrier layer. The insulating layer includes silicon (element symbol: Si), carbon (element symbol: C), hydrogen (element symbol: H) and oxygen (element symbol: O). The interconnection is located on the insulating layer, and the interconnection includes copper (element symbol: Cu). The barrier layer is located between the insulating layer and the interconnection. The barrier layer includes an additional element, carbon (element symbol: C) and hydrogen (element symbol: H). The barrier layer has atomic concentrations of carbon (element symbol: C) and hydrogen (element symbol: H) maximized in a region of a thickness of the barrier layer where the atomic concentration of the additional element is maximized.Type: ApplicationFiled: March 24, 2009Publication date: October 1, 2009Applicants: Advanced Interconnecte Materials, LLC, Tohoku UniversityInventors: Junichi Koike, Akihiro Shibatomi
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Publication number: 20090236747Abstract: A multilevel interconnect structure in a semiconductor device comprises a first insulating layer (2) formed on a semiconductor wafer (1), a Cu interconnect layer (4) formed on the first insulating layer (2), a second insulating layer (6) formed on the Cu interconnect layer (4), and a metal oxide layer (5) formed at an interface between the Cu interconnect layer (4) and the second insulating layer (6). The metal oxide layer (5) is formed by immersion-plating a metal, such as Sn or Zn, on the Cu interconnect layer (4) and then heat-treating the plated layer in an oxidizing atmosphere.Type: ApplicationFiled: March 19, 2009Publication date: September 24, 2009Applicants: SEMICONDUCTOR TECHNOLOGY ACADEMIC RESEARCH CENTER, NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITYInventors: Junichi Koike, Yoshito Fujii, Jun Iijima, Noriyoshi Shimizu, Kazuyoshi Maekawa, Koji Arita, Ryotaro Yagi, Masaki Yoshimaru
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SEMICONDUCTOR DEVICE, ITS MANUFACTURING METHOD, AND SPUTTERING TARGET MATERIAL FOR USE IN THE METHOD
Publication number: 20090212432Abstract: A semiconductor device enables a barrier layer to fully acquire a barriering property against the diffusion of Cu from a wiring main body and the diffusion of Si from an insulating film, enhances the adhesiveness of the barrier layer and the insulating film and excels in reliability of operation over a long period of time.Type: ApplicationFiled: February 27, 2007Publication date: August 27, 2009Applicant: Advanced Interconnect Materials, LLCInventor: Junichi Koike -
Semiconductor device, its manufacturing method, and sputtering target material for use in the method
Publication number: 20090095620Abstract: A semiconductor device enables a barrier layer to fully acquire a barriering property against the diffusion of Cu from a wiring main body and the diffusion of Si from an insulating film, enhances the adhesiveness of the barrier layer and the insulating film and excels in reliability of operation over a long period of time. In this invention, a semiconductor device provided on an insulating film with a wiring includes the insulating film containing silicon (Si), a wiring main body formed of copper (Cu) in a groove-like opening disposed in the insulating film, and a barrier layer formed between the wiring main body and the insulating film and made of an oxide containing Cu and Si and Mn.Type: ApplicationFiled: November 20, 2008Publication date: April 16, 2009Applicant: Advanced Interconnect Materials, LLCInventor: Junichi Koike -
Publication number: 20080278649Abstract: The present invention includes a liquid crystal display device with an oxide film having high adhesiveness to a semiconductor layer or a pixel electrode to thereby prevent oxidation of a wiring material or the like, and includes a source electrode and a drain electrode having high conductivity, and a manufacturing method therefor. In one embodiment of the present invention, a liquid crystal display device has a TFT electrode of a TFT substrate, wherein a source electrode or a drain electrode includes a layer of mainly copper and an oxide covering an outer part of the layer. Further, in the present invention, the semiconductor layer or the pixel electrode and said source electrode or the drain electrode are in ohmic contact in the TFT electrode.Type: ApplicationFiled: May 9, 2007Publication date: November 13, 2008Applicants: Tohoku University, Advanced Interconnect Materials, LLCInventors: Junichi Koike, Hideaki Kawakami
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Publication number: 20080252843Abstract: The present invention includes a liquid crystal display device having an oxide film having high adhesiveness to a substrate to thereby prevent oxidation of a wiring material or the like, and includes, an electrode or a terminal electrode having high conductivity, and a manufacturing method therefor. Consequently, in the present invention, a liquid crystal display device has an electrode terminal of a TFT substrate, wherein the electrode is formed on an insulator and is comprised of a conductive layer mainly consisting of copper and an oxide covering an outer part, further the oxide is a layered structure of transparent electrodes, the layered portion having ohmic contact, and the oxide mainly consists of manganese oxide.Type: ApplicationFiled: April 10, 2007Publication date: October 16, 2008Applicants: Tohoku University, Advanced Interconnect Materials, LLCInventors: Junichi Koike, Hideaki Kawakami
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Publication number: 20080170193Abstract: The present invention has been made to form an oxide film having high adhesiveness to a substrate to thereby prevent oxidation of a wiring material or the like, and also provide a liquid crystal display device provided with wiring, an electrode or a terminal electrode having high conductivity, and a manufacturing method therefor. Consequently, the present invention, a liquid crystal display device comprising gate wiring or a gate electrode formed on a substrate on a TFT side of the TFT liquid crystal display device, wherein the wiring or the electrode has a structure of being held between two different insulation layers or insulators, and the structure is comprised of a first layer mainly consisting of copper and a second layer consisting of an oxide covering an outer circumferential part of the first layer, further, the second layer has compositional formula of CuXMnYSiZO (0<X<Y, 0<Z<Y).Type: ApplicationFiled: January 12, 2007Publication date: July 17, 2008Applicants: Tohoku University, Advanced Interconnect Materials, LLCInventors: Junichi Koike, Hideaki Kawakami
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Publication number: 20080057704Abstract: A method of manufacturing a semiconductor device, including forming an opening in an interlevel insulating film disposed on a semiconductor substrate, forming an auxiliary film containing a predetermined metal element, to cover an inner surface of the opening, forming a main film to fill the opening after forming the auxiliary film, the main film containing, as a main component, Cu used as a material of an interconnection main layer, and performing a heat treatment before or after forming the main film, thereby diffusing the predetermined metal element of the auxiliary film onto a surface of the interlevel insulating film facing the auxiliary film, so as to form a barrier film on the interlevel insulating film within the opening, the barrier film containing, as a main component, a compound of the predetermined metal element with a component element of the interlevel insulating film.Type: ApplicationFiled: October 23, 2007Publication date: March 6, 2008Applicant: SEMICONDUCTOR TECHNOLOGY ACADEMIC RESEARCH CENTERInventors: Junichi Koike, Makoto Wada, Shingo Takahashi, Noriyoshi Shimizu, Hideki Shibata, Satoshi Nishikawa, Takamasa Usui, Hayato Nasu, Masaki Yoshimaru
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Patent number: 7315232Abstract: In an image processing apparatus is arranged for authenticating through collating an input of identification code with an identification code stored in advance, reading the biometrics information from an entry process made when the authentication has been admitted and storing the biometrics information in the first storage area of a storage unit, collating biometrics information read from the succeeding entry process with the biometrics information stored in the first storage area, conducting a process based on the entry process with the authenticated identification code when the collation result is conformity, and erasing the biometrics information stored in the first storage area when the collation result is disconformity, when an entry process is made with biometrics information which is different from the biometrics information stored in the first storage area, the biometrics information stored in the first storage area before erased is evacuated to the second storage area.Type: GrantFiled: October 20, 2005Date of Patent: January 1, 2008Assignee: Sharp Kabushiki KaishaInventor: Junichi Koike
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Patent number: 7304384Abstract: A semiconductor device includes an interlevel insulating film disposed on a semiconductor substrate and having an opening formed therein. An interconnection main layer, which contains Cu as a main component, is embedded in the opening. A barrier film is interposed between the interlevel insulating film and the interconnection main layer within the opening. The barrier film contains, as a main component, a compound of a predetermined metal element with a component element of the interlevel insulating film.Type: GrantFiled: February 24, 2005Date of Patent: December 4, 2007Assignee: Semiconductor Technology Academic Research CenterInventors: Junichi Koike, Makoto Wada, Shingo Takahashi, Noriyoshi Shimizu, Hideki Shibata, Satoshi Nishikawa, Takamasa Usui, Hayato Nasu, Masaki Yoshimaru
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Publication number: 20070002239Abstract: To provide a highly conductive Cu alloy which is advantageous in that an alloying element added to Cu is first reacted with oxygen contained in a gas atmosphere or solid in contact with the Cu member to form an oxide film which can prevent oxidation of Cu. The copper alloy comprises copper (Cu) containing an inevitable impurity, and an element added to the copper, wherein the added element is capable of being dissolved in the copper in an amount of 0.1 to 20 at. %, wherein the added element has an oxide formation free energy smaller than that of Cu and has a diffusion coefficient in Cu larger than the self-diffusion coefficient of Cu.Type: ApplicationFiled: August 30, 2005Publication date: January 4, 2007Inventor: Junichi Koike
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Publication number: 20060087424Abstract: In an image processing apparatus is arranged for authenticating through collating an input of identification code with an identification code stored in advance, reading the biometrics information from an entry process made when the authentication has been admitted and storing the biometrics information in the first storage area of a storage unit, collating biometrics information read from the succeeding entry process with the biometrics information stored in the first storage area, conducting a process based on the entry process with the authenticated identification code when the collation result is conformity, and erasing the biometrics information stored in the first storage area when the collation result is disconformity, when an entry process is made with biometrics information which is different from the biometrics information stored in the first storage area, the biometrics information stored in the first storage area before erased is evacuated to the second storage area.Type: ApplicationFiled: October 20, 2005Publication date: April 27, 2006Applicant: Sharp Kabushiki KaishaInventor: Junichi Koike
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Publication number: 20050218519Abstract: A semiconductor device includes an interlevel insulating film disposed on a semiconductor substrate and having an opening formed therein. An interconnection main layer, which contains Cu as a main component, is embedded in the opening. A barrier film is interposed between the interlevel insulating film and the interconnection main layer within the opening. The barrier film contains, as a main component, a compound of a predetermined metal element with a component element of the interlevel insulating film.Type: ApplicationFiled: February 24, 2005Publication date: October 6, 2005Inventors: Junichi Koike, Makoto Wada, Shingo Takahashi, Noriyoshi Shimizu, Hideki Shibata, Satoshi Nishikawa, Takamasa Usui, Hayato Nasu, Masaki Yoshimaru
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Publication number: 20040019260Abstract: There is disclosed a home care system in which a center terminal and a patient terminal are detachably connected to each other through communication lines, such as a public telephone line, an ISDN (integrated services digital network), a CATV (cable television), a radio and the like, and further to center terminals and patient terminals which constitute such a home care system. The patient terminal has an urgency transmitter device for transmitting a predetermined urgency code to the center terminal, and the center terminal comprises an urgency receiver device for receiving, while connected to a first patient terminal, the urgency code transmitted from a second patient terminal, and an urgency alarm device for informing of the fact that the urgency code has been received.Type: ApplicationFiled: July 21, 2003Publication date: January 29, 2004Inventors: Takaki Shimura, Satoshi Mori, Keiichi Murakami, Nagaaki Koshino, Minoru Iwata, Takehito Takano, Keiko Nakamura, Junichi Koike, Keiichi Takeda
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Patent number: 6620099Abstract: There is disclosed a home care system in which a center terminal and a patient terminal are detachably connected to each other through communication lines, such as a public telephone line, an ISDN (integrated services digital network), a CATV (cable television), a radio and the like, and further to center terminals and patient terminals which constitute such a home care system. The patient terminal has an urgency transmitter device for transmitting a predetermined urgency code to the center terminal, and the center terminal comprises an urgency receiver device for receiving, while connected to a first patient terminal, the urgency code transmitted from a second patient terminal, and an urgency alarm device for informing of the fact that the urgency code has been received.Type: GrantFiled: November 17, 2000Date of Patent: September 16, 2003Assignee: Fujitsu LimitedInventors: Takaki Shimura, Satoshi Mori, Keiichi Murakami, Nagaaki Koshino, Minoru Iwata, Takehito Takano, Keiko Nakamura, Junichi Koike, Keiichi Takeda
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Publication number: 20030042618Abstract: In connection with a semiconductor device which adopts the face down mounting method, it is intended to provide a technique which can check the state of continuity between electrode pads formed on a semiconductor chip and electrode pads formed on a wiring substrate.Type: ApplicationFiled: July 16, 2002Publication date: March 6, 2003Applicant: Hitachi, Ltd.Inventors: Fujiaki Nose, Tomo Shimizu, Hiroshi Kikuchi, Junichi Koike, Masataka Murata