Patents by Inventor Junichi Sakano

Junichi Sakano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240055423
    Abstract: A semiconductor device that is equipped with a MOSFET with a Zener diode embedded and capable of achieving both improvement in the surge resistance and the low on-resistance of the MOSFET is provided. The semiconductor device equipped with a MOSFET with a Zener diode embedded includes an active region in which the MOSFET operates, and a peripheral region that is disposed outside of the active region and holds a withstand voltage of a chip peripheral portion, in which the active region includes a first region including a chip central portion and a second region disposed outside of the first region, and a withstand voltage of the first region is lower than a withstand voltage of the second region and a withstand voltage of the peripheral region.
    Type: Application
    Filed: October 6, 2020
    Publication date: February 15, 2024
    Applicant: Hitachi Power Semiconductor Device, Ltd.
    Inventors: Masaki SHIRAISHI, Junichi SAKANO
  • Patent number: 11152887
    Abstract: A temperature abnormality of the power module is accurately detected. A power conversion device including a power semiconductor module with a switching element, includes: a gate driver circuit configured to drive a switching element and transmitting a response signal upon a switching operation of the switching element; a control unit device configured to output to a gate driver circuit an instruction signal for switching; a temperature detection unit configured to calculate a bonding temperature of the switching element based on a response signal to the instruction signal; and a calculation unit configured to determine a state of a power semiconductor module according to a bonding temperature calculated by the temperature detection unit and the response signal.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: October 19, 2021
    Assignee: HITACHI, LTD.
    Inventors: Yoshinobu Kimura, Kazuki Tani, Takashi Ogawa, Hiroshi Suzuki, Junichi Sakano
  • Patent number: 11049965
    Abstract: A semiconductor device includes a first external electrode with a first electrode surface portion; a second external electrode with a second electrode surface portion; a MOSFET chip with a built-in Zener diode which includes an active region and a peripheral region; a control IC chip which drives the MOSFET chip based on voltage or current between a drain electrode and a source electrode of the MOSFET chip; and a capacitor which supplies power to the MOSFET chip and the control IC chip. The first electrode surface portion is connected to either the drain electrode or the source, the second electrode surface portion is connected to either the source electrode or the drain electrode, a plurality of unit cells of the MOSFET with the built-in Zener diode are provided in the active region, and the breakdown voltage of the Zener diode is set to be lower than that of the peripheral region.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: June 29, 2021
    Assignee: HITACHI POWER SEMICONDUCTOR DEVICE, LTD.
    Inventors: Masaki Shiraishi, Tetsuya Ishimaru, Junichi Sakano, Mutsuhiro Mori, Shinichi Kurita
  • Patent number: 11016138
    Abstract: A diagnostic system for a power conversion apparatus including a semiconductor device and performing a switching operation for carrying and interrupting a main current to a main current is disclosed. This system includes a trigger circuit that acquires reference time for the switching operation; and a delay time calculation circuit that acquires first time at which the main current takes a first main current set value and second time at which the main current takes a second main current set value, and that detects numerical data about a difference between the first time and the reference time and numerical data about a difference between the second time and the reference time.
    Type: Grant
    Filed: May 9, 2016
    Date of Patent: May 25, 2021
    Assignee: Hitachi, Ltd.
    Inventors: Yoshinobu Kimura, Junichi Sakano, Kimihisa Furukawa, Takashi Ogawa, Renichi Yamada
  • Patent number: 11012022
    Abstract: The object of the invention is to provide an inverter device and an electric motor device using the same to shorten a dead time. Thus, an inverter device is provided, which includes: a switching element including a control terminal and a pair of main terminals; a control circuit configured to output a control signal which indicates whether to instruct an ON state of the switching element; a decision circuit configured to output a decision signal which indicates a state of the switching element based on a voltage between the main terminals of the switching element; and a drive circuit configured to control the ON state or an OFF state of the switching element based on the control signal and the decision signal.
    Type: Grant
    Filed: May 28, 2018
    Date of Patent: May 18, 2021
    Assignee: Hitachi Power Semiconductor Device, Ltd.
    Inventors: Tetsuya Ishimaru, Junichi Sakano, Shinichi Kurita
  • Publication number: 20210021227
    Abstract: A temperature abnormality of the power module is accurately detected. A power conversion device including a power semiconductor module with a switching element, includes: a gate driver circuit configured to drive a switching element and transmitting a response signal upon a switching operation of the switching element; a control unit device configured to output to a gate driver circuit an instruction signal for switching; a temperature detection unit configured to calculate a bonding temperature of the switching element based on a response signal to the instruction signal; and a calculation unit configured to determine a state of a power semiconductor module according to a bonding temperature calculated by the temperature detection unit and the response signal.
    Type: Application
    Filed: March 5, 2018
    Publication date: January 21, 2021
    Inventors: Yoshinobu KIMURA, Kazuki TANI, Takashi OGAWA, Hiroshi SUZUKI, Junichi SAKANO
  • Publication number: 20200186076
    Abstract: The object of the invention is to provide an inverter device and an electric motor device using the same to shorten a dead time. Thus, an inverter device is provided, which includes: a switching element including a control terminal and a pair of main terminals; a control circuit configured to output a control signal which indicates whether to instruct an ON state of the switching element; a decision circuit configured to output a decision signal which indicates a state of the switching element based on a voltage between the main terminals of the switching element; and a drive circuit configured to control the ON state or an OFF state of the switching element based on the control signal and the decision signal.
    Type: Application
    Filed: May 28, 2018
    Publication date: June 11, 2020
    Inventors: Tetsuya ISHIMARU, Junichi SAKANO, Shinichi KURITA
  • Patent number: 10319849
    Abstract: The semiconductor device has a first external electrode having an outer peripheral section, which has a circular shape in top plan view and which is to be attached to an alternator. On the first external electrode there mounted: a MOSFET chip; a control circuitry to which voltages at or a current flowing between a first main terminal and a second main terminal of the MOSFET chip is inputted and which generates, on the basis of the voltages or the current, a control signal applied to a gate of the MOSFET chip; and a capacitor for providing a power supply to the control circuitry. The semiconductor device further has a second external electrode disposed opposite to the first external electrode with respect to the MOSFET chip. An electrical connection is made between the first main terminal of the MOSFET chip and the first external electrode, and between the second main terminal of the MOSFET chip and the second external electrode.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: June 11, 2019
    Assignee: Hitachi Power Semiconductor Device, Ltd.
    Inventors: Tetsuya Ishimaru, Mutsuhiro Mori, Junichi Sakano, Kohhei Onda
  • Publication number: 20190146026
    Abstract: A diagnostic system for a power conversion apparatus including a semiconductor device and performing a switching operation for carrying and interrupting a main current to a main current is disclosed. This system includes a trigger circuit that acquires reference time for the switching operation; and a delay time calculation circuit that acquires first time at which the main current takes a first main current set value and second time at which the main current takes a second main current set value, and that detects numerical data about a difference between the first time and the reference time and numerical data about a difference between the second time and the reference time.
    Type: Application
    Filed: May 9, 2016
    Publication date: May 16, 2019
    Inventors: Yoshinobu KIMURA, Junichi SAKANO, Kimihisa FURUKAWA, Takashi OGAWA, Renichi YAMADA
  • Patent number: 10229974
    Abstract: To solve a problem of realizing a large current and highly reliable power semiconductor device while shrinking a unit cell. A semiconductor device according to the present invention includes a plurality of p-type body regions extending in a first direction. The semiconductor device further includes: a JFET region formed to extend in the first direction between p-type body regions which are adjacent to each other in a second direction orthogonal to the first direction; an n+-type source region formed to extend in the first direction within a p-type body region and separate from an end side surface of the p-type body; and a channel region formed to extend in the first direction and in a top layer portion of a p-type body region between an end side surface of the p-type body region and an end side surface of an n+-type source region.
    Type: Grant
    Filed: May 18, 2015
    Date of Patent: March 12, 2019
    Assignee: HITACHI, LTD.
    Inventors: Mieko Matsumura, Junichi Sakano, Naoki Tega, Yuki Mori, Haruka Shimizu, Keisuke Kobayashi
  • Publication number: 20190043984
    Abstract: A semiconductor device includes a first external electrode with a first electrode surface portion; a second external electrode with a second electrode surface portion; a MOSFET chip with a built-in Zener diode which includes an active region and a peripheral region; a control IC chip which drives the MOSFET chip based on voltage or current between a drain electrode and a source electrode of the MOSFET chip; and a capacitor which supplies power to the MOSFET chip and the control IC chip. The first electrode surface portion is connected to either the drain electrode or the source, the second electrode surface portion is connected to either the source electrode or the drain electrode, a plurality of unit cells of the MOSFET with the built-in Zener diode are provided in the active region, and the breakdown voltage of the Zener diode is set to be lower than that of the peripheral region.
    Type: Application
    Filed: August 6, 2018
    Publication date: February 7, 2019
    Applicant: HITACHI POWER SEMICONDUCTOR DEVICE, LTD.
    Inventors: Masaki SHIRAISHI, Tetsuya ISHIMARU, Junichi SAKANO, Mutsuhiro MORI, Shinichi KURITA
  • Patent number: 10122299
    Abstract: The present invention relates to a power conversion device in the power electronics field. An object of the present invention is to provide a technique of determining whether a switching element operates normally or not from a gate monitor signal of a power conversion device, and predicting a sign of a failure by obtaining the temperature of the switching element from a transient state of the switching voltage of the power conversion circuit as a component of the power conversion device without using a new signal path.
    Type: Grant
    Filed: April 8, 2015
    Date of Patent: November 6, 2018
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Ogawa, Kimihisa Furukawa, Junichi Sakano
  • Patent number: 10122296
    Abstract: A diagnostic system for a power converter which includes a semiconductor device, and which performs a switching operation between conduction and interruption of the principal current flowing through a main circuit. The diagnostic system includes a current change amount calculation circuit for obtaining numeric data which reflects a current change amount of the principal current per unit time, a determination circuit for determining a state of the power converter by comparing the numeric data with a reference value, and an output circuit for outputting a determination result of the determination circuit.
    Type: Grant
    Filed: June 22, 2015
    Date of Patent: November 6, 2018
    Assignee: HITACHI, LTD.
    Inventors: Junichi Sakano, Kimihisa Furukawa, Takashi Ogawa, Hisashi Endou
  • Publication number: 20180138830
    Abstract: The present invention relates to a power conversion device in the power electronics field. An object of the present invention is to provide a technique of determining whether a switching element operates normally or not from a gate monitor signal of a power conversion device, and predicting a sign of a failure by obtaining the temperature of the switching element from a transient state of the switching voltage of the power conversion circuit as a component of the power conversion device without using a new signal path.
    Type: Application
    Filed: April 8, 2015
    Publication date: May 17, 2018
    Inventors: Takashi OGAWA, Kimihisa FURUKAWA, Junichi SAKANO
  • Patent number: 9966871
    Abstract: A rectifier including an autonomous type synchronous-rectification MOSFET is provided, which prevents chattering and through-current caused by a malfunction when a noise is applied. The rectifier includes: a rectification MOSFET for performing synchronous rectification; a determination circuit configured to input a voltage between a pair of main terminals of the rectification MOSFET, and to determine whether the rectification MOSFET is in on or off state on the basis of the inputted voltage; and a gate drive circuit configured such that a gate of the rectification MOSFET is turned on and off by a comparison signal from the determination circuit, and such that a time required to boost a gate voltage when the rectification MOSFET is turned on is longer than a time required to lower the gate voltage when the rectification MOSFET is turned off.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: May 8, 2018
    Assignee: Hitachi Power Semiconductor Device, Ltd.
    Inventors: Tetsuya Ishimaru, Kohhei Onda, Junichi Sakano, Mutsuhiro Mori
  • Publication number: 20180123477
    Abstract: There is provided a diagnostic system for a power converter which includes a semiconductor device, and performs a switching operation between conduction and interruption of the principal current flowing through the main circuit. The diagnostic system includes a current change amount calculation circuit for obtaining numeric data which reflects a current change amount of the principal current per unit time, a determination circuit for determining a state of the power converter by comparing the numeric data with a reference value, and an output circuit for outputting a determination result of the determination circuit.
    Type: Application
    Filed: June 22, 2015
    Publication date: May 3, 2018
    Inventors: Junichi SAKANO, Kimihisa FURUKAWA, Takashi OGAWA, Hisashi ENDOU
  • Publication number: 20180090574
    Abstract: To solve a problem of realizing a large current and highly reliable power semiconductor device while shrinking a unit cell. A semiconductor device according to the present invention includes a plurality of p-type body regions extending in a first direction. The semiconductor device further includes: a JFET region formed to extend in the first direction between p-type body regions which are adjacent to each other in a second direction orthogonal to the first direction; an n+-type source region formed to extend in the first direction within a p-type body region and separate from an end side surface of the p-type body; and a channel region formed to extend in the first direction and in a top layer portion of a p-type body region between an end side surface of the p-type body region and an end side surface of an n+-type source region.
    Type: Application
    Filed: May 18, 2015
    Publication date: March 29, 2018
    Inventors: Mieko MATSUMURA, Junichi SAKANO, Naoki TEGA, Yuki MORI, Haruka SHIMIZU, Keisuke KOBAYASHI
  • Patent number: 9831145
    Abstract: Provided is a semiconductor device including: a first external electrode which includes a circular outer peripheral portion; a MOSFET chip; a control circuit chip which receives voltages of a drain electrode and a source electrode of the MOSFET and supplies a signal to a gate electrode to control the MOSFET on the basis of the voltage; a second external electrode which is disposed on an opposite side of the first external electrode with respect to the MOSFET chip and includes an external terminal on a center axis of the circular outer peripheral portion of the first external electrode; and an isolation substrate which isolates the control circuit chip from the external electrode. The first external electrode, the drain electrode and the source electrode of the MOSFET chip, and the second external electrode are disposed to be overlapped in a direction of the center axis. The drain electrode of the MOSFET chip and the first external electrode are connected.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: November 28, 2017
    Assignee: Hitachi Power Semiconductor Device, Ltd.
    Inventors: Tetsuya Ishimaru, Mutsuhiro Mori, Shinichi Kurita, Shigeru Sugayama, Junichi Sakano, Kohhei Onda
  • Patent number: 9793011
    Abstract: Provided is a structure including a first member (2); a second member (3) disposed opposite to the first member (2); and a glass layer (4) disposed between the first member (2) and the second member (3) so as to bond the first member (2) and the second member (3). A glass transition point of the glass layer (4) is lower than a temperature of the glass layer (4) under operation. In the glass layer (4), at least either of ceramic and metallic particles 4b, 4c is dispersed. In a temperature region lower than the glass transition point of the glass layer (4), a thermal expansion coefficient thereof falls in between thermal expansion coefficients of the first member (2) and the second member (3). This allows thermal strain caused within the structure (1) to be reduced when the structure (1) is operated at a higher temperature than a room temperature.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: October 17, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Ryou Ishibashi, Takashi Naitou, Motomune Kodama, Takuya Aoyagi, Tetsushi Hino, Motoo Aoyama, Tsuneyuki Hashimoto, Katsuhito Takahashi, Junichi Sakano, Hiroshi Nakano
  • Publication number: 20170282720
    Abstract: By detecting a temperature abnormality of a power semiconductor by using the power semiconductor as a temperature sensor, it is possible to detect deterioration and an abnormality of elements, a drive circuit and a cooling system, prevent a failure during an operation by taking an appropriate measure in advance, and make a system operational life long. More specifically, a power converting device which includes the power semiconductor and an arithmetic operation circuit which gives a drive instruction to the power semiconductor detects the temperature abnormality of the power semiconductor based on the drive instruction of the power semiconductor and a delay time of a control drive voltage applied to the power semiconductor to protect the power converting device.
    Type: Application
    Filed: August 21, 2015
    Publication date: October 5, 2017
    Inventors: Junichi SAKANO, Kohhei ONDA, Takeshi TAMAKOSHI