Abstract: By detecting a temperature abnormality of a power semiconductor by using the power semiconductor as a temperature sensor, it is possible to detect deterioration and an abnormality of elements, a drive circuit and a cooling system, prevent a failure during an operation by taking an appropriate measure in advance, and make a system operational life long. More specifically, a power converting device which includes the power semiconductor and an arithmetic operation circuit which gives a drive instruction to the power semiconductor detects the temperature abnormality of the power semiconductor based on the drive instruction of the power semiconductor and a delay time of a control drive voltage applied to the power semiconductor to protect the power converting device.

Abstract: Provided is a semiconductor device including: a first external electrode which includes a circular outer peripheral portion; a MOSFET chip; a control circuit chip which receives voltages of a drain electrode and a source electrode of the MOSFET and supplies a signal to a gate electrode to control the MOSFET on the basis of the voltage; a second external electrode which is disposed on an opposite side of the first external electrode with respect to the MOSFET chip and includes an external terminal on a center axis of the circular outer peripheral portion of the first external electrode; and an isolation substrate which isolates the control circuit chip from the external electrode. The first external electrode, the drain electrode and the source electrode of the MOSFET chip, and the second external electrode are disposed to be overlapped in a direction of the center axis. The drain electrode of the MOSFET chip and the first external electrode are connected.

Abstract: A rectifier including an autonomous type synchronous-rectification MOSFET is provided, which prevents chattering and through-current caused by a malfunction when a noise is applied. The rectifier includes: a rectification MOSFET for performing synchronous rectification; a determination circuit configured to input a voltage between a pair of main terminals of the rectification MOSFET, and to determine whether the rectification MOSFET is in on or off state on the basis of the inputted voltage; and a gate drive circuit configured such that a gate of the rectification MOSFET is turned on and off by a comparison signal from the determination circuit, and such that a time required to boost a gate voltage when the rectification MOSFET is turned on is longer than a time required to lower the gate voltage when the rectification MOSFET is turned off.

Abstract: The semiconductor device has a first external electrode having an outer peripheral section, which has a circular shape in top plan view and which is to be attached to an alternator. On the first external electrode there mounted: a MOSFET chip; a control circuitry to which voltages at or a current flowing between a first main terminal and a second main terminal of the MOSFET chip is inputted and which generates, on the basis of the voltages or the current, a control signal applied to a gate of the MOSFET chip; and a capacitor for providing a power supply to the control circuitry. The semiconductor device further has a second external electrode disposed opposite to the first external electrode with respect to the MOSFET chip. An electrical connection is made between the first main terminal of the MOSFET chip and the first external electrode, and between the second main terminal of the MOSFET chip and the second external electrode.

Abstract: The present invention provides a semiconductor device of a bi-directional analog switch having a high linearity and a low electric power loss. An ultrasonic diagnostic apparatus having a high degree of detection accuracy, comprising the semiconductor device, is also provided. A semiconductor device of a bi-directional analog switch, comprising a switch circuit capable of switching ON or OFF bi-directionally, and built-in driving circuits for the switch circuit, wherein the driving circuit is connected to first and second power supplies, and a first power supply voltage is higher than a maximum voltage of a signal applied to an input/output terminal of the switch circuit, a second power supply voltage is lower than a minimum voltage of a signal applied to an input/output terminal of the switch circuit, and the driving circuit comprises a Zener diode and a p-type MOSFET connected in series between the first power supply and the switch circuit.

Abstract: Provided is a structure including a first member (2); a second member (3) disposed opposite to the first member (2); and a glass layer (4) disposed between the first member (2) and the second member (3) so as to bond the first member (2) and the second member (3). A glass transition point of the glass layer (4) is lower than a temperature of the glass layer (4) under operation. In the glass layer (4), at least either of ceramic and metallic particles 4b, 4c is dispersed. In a temperature region lower than the glass transition point of the glass layer (4), a thermal expansion coefficient thereof falls in between thermal expansion coefficients of the first member (2) and the second member (3). This allows thermal strain caused within the structure (1) to be reduced when the structure (1) is operated at a higher temperature than a room temperature.

Abstract: In order to provide a communication system which performs a communication while maintaining high voltage insulation, a control circuit which is operated at a low voltage, and a controlled circuit which is operated at a high voltage are connected through a propagation layer having a waveguide structure, thereby performing a communication. In particular, a displacement current (surge current) flows between a high voltage circuit and a low voltage circuit due to a potential fluctuation which occurs in the high voltage circuit A surge current protection circuit is provided, and applying an input which is out of rating to the communication module and the low voltage circuit due to such a surge current is prevented.

Abstract: A first annular isolation trench is formed in a periphery of an element region, and a second annular isolation trench is formed around the first annular isolation trench with a predetermined distance provided from the first annular isolation trench, and a semiconductor layer between the first annular isolation trench and the second annular isolation trench is separated into a plurality of portions by a plurality of linear isolation trenches formed in the semiconductor layer between the first annular isolation trench and the second annular isolation trench, and the semiconductor layer (source-side isolation region) which opposes a p-type channel layer end portion and is located between the first annular isolation trench and the second annular isolation trench is separated from other semiconductor layers (drain-side isolation regions) by the linear isolation trenches.

Abstract: There is provided an MOSFET having a large current density, which can be mixed with a logic circuit, and is used in a circuit that conducts the operation of applying a negative voltage to a drain electrode. An electrode surrounded by an insulating film is formed, at an intermediate position of a gate electrode and a drain of the MOSFET formed on an SOI substrate having a drain electrode applied with a negative voltage, and the electrode is connected to the ground to prevent a withstand voltage from being lowered which is caused by an increase in impurity concentration of a drift region. A drift resistance is lowered to improve the current density.

Abstract: In order to provide a communication system which performs a communication while maintaining high voltage insulation, a control circuit which is operated at a low voltage, and a controlled circuit which is operated at a high voltage are connected through a propagation layer having a waveguide structure, thereby performing a communication. In particular, a displacement current (surge current) flows between a high voltage circuit and a low voltage circuit due to a potential fluctuation which occurs in the high voltage circuit A surge current protection circuit is provided, and applying of an input which is out of rating to the communication module and the low voltage circuit due to such a surge current is prevented.

Abstract: A horizontal-type IGBT having a large current density, which is formed on a SOI substrate, has an emitter region, which is made up with two (2) or more of base-layers of a second conductivity-type on an oxide film groove, wherein the base-layers of the second conductivity-type in the emitter region are covered with a layer of a first conductivity-type, being high in the conductivity than a drift layer, and length of a gate electrode on the oxide film groove is reduced than the length of the gate electrode on the collector, and further the high-density layer of the first conductivity-type is formed below the base layer of the second conductivity-type on the collector, thereby achieving the high density of the layer of the first conductivity-type while maintaining an endurable voltage, and an increase of the current density.

Abstract: The output circuit uses an IGBT incorporating a normal latch-up operation measure and the ESD clamp circuit uses an IGBT that can more easily latch up than the output circuit device which has the latch-up prevention layer lowered in impurity density or removed.

Abstract: The present invention relates to an integrated circuit (semiconductor device) for which consolidation of a fine CMOS and a medium/high-voltage MOSFET is assumed to be carried out. A feature of the present invention is a small width (channel length) of a channel region CH. Specifically, when the width of the channel region planarly overlapped with a gate electrode is “L” and the thickness of the gate electrode is “t”, the channel region is formed to have the width of the channel region being larger than or equal to ? times the thickness t of the gate electrode and smaller than or equal to the thickness t. Thus, the width L of the channel region can be reduced, and variations in the threshold voltage can be reduced.

Abstract: In a level shift circuit, when a power-source voltage variation dV/dt of a high voltage side occurs and influences on a logic level of a circuit, the passing through of a malfunction signal is masked and prevented in the first and second logic circuits, by a signal from a time-constant generation circuit or a portion where a power voltage variation occurs in advance, by utilizing the fact that this variation occurs both at a set side and a reset side. When the power source voltage variation dV/dt is generated at a high voltage side, sufficient allowance in the timing of this masking prevents an erroneous signal from being transmitted to a flip-flop, and a control signal is transmitted from a low voltage side circuit not giving malfunction to a high voltage side circuit, even when there is a production variation in each element in semiconductor processes.

Abstract: The present invention provides a semiconductor device of a bi-directional analog switch having a high linearity and a low electric power loss. An ultrasonic diagnostic apparatus having a high degree of detection accuracy, comprising the semiconductor device, is also provided. A semiconductor device of a bi-directional analog switch, comprising a switch circuit capable of switching ON or OFF bi-directionally, and built-in driving circuits for the switch circuit, wherein the driving circuit is connected to first and second power supplies, and a first power supply voltage is higher than a maximum voltage of a signal applied to an input/output terminal of the switch circuit, a second power supply voltage is lower than a minimum voltage of a signal applied to an input/output terminal of the switch circuit, and the driving circuit comprises a Zener diode and a p-type MOSFET connected in series between the first power supply and the switch circuit.

Abstract: A first annular isolation trench is formed in a periphery of an element region, and a second annular isolation trench is formed around the first annular isolation trench with a predetermined distance provided from the first annular isolation trench, and a semiconductor layer between the first annular isolation trench and the second annular isolation trench is separated into a plurality of portions by a plurality of linear isolation trenches formed in the semiconductor layer between the first annular isolation trench and the second annular isolation trench, and the semiconductor layer (source-side isolation region) which opposes a p-type channel layer end portion and is located between the first annular isolation trench and the second annular isolation trench is separated from other semiconductor layers (drain-side isolation regions) by the linear isolation trenches.

Abstract: In a level shift circuit, when a power-source voltage variation dV/dt of a high voltage side occurs and influences on a logic level of a circuit, the passing through of a malfunction signal is masked and prevented in the first and second logic circuits, by a signal from a time-constant generation circuit or a portion where a power voltage variation occurs in advance, by utilizing the fact that this variation occurs both at a set side and a reset side. When the power source voltage variation dV/dt is generated at a high voltage side, sufficient allowance in the timing of this masking prevents an erroneous signal from being transmitted to a flip-flop, and a control signal is transmitted from a low voltage side circuit not giving malfunction to a high voltage side circuit, even when there is a production variation in each element in semiconductor processes.

Abstract: A lateral IGBT structure having an emitter terminal including two or more base layers of a second conductivity-type for one collector terminal, in which the base layers of a second conductivity-type in emitter regions are covered with a first conductivity-type layer having a concentration higher than that of a drift layer so that a silicon layer between the first conductivity-type layer covering the emitter regions and a buried oxide film has a reduced resistance to increase current flowing to an emitter farther from the collector to thereby enhance the current density.

Abstract: In a manufacturing method of a SOI type high withstand voltage semiconductor device formed on a support substrate via an insulation film, a small-sized semiconductor device having small dispersion of withstand voltage is manufactured by introducing impurities into the whole surface of a p-type or n-type SOI substrate having an impurity concentration of 2E14 cm?3 or less and serving as an active layer of the semiconductor device with an ion implantation method and thereby forming a drift layer.

Abstract: A horizontal-type IGBT having a large current density, which is formed on a SOI substrate, has an emitter region, which is made up with two (2) or more of base-layers of a second conductivity-type on an oxide film groove, wherein the base-layers of the second conductivity-type in the emitter region are covered with a layer of a first conductivity-type, being high in the conductivity than a drift layer, and length of a gate electrode on the oxide film groove is reduced than the length of the gate electrode on the collector, and further the high-density layer of the first conductivity-type is formed below the base layer of the second conductivity-type on the collector, thereby achieving the high density of the layer of the first conductivity-type while maintaining an endurable voltage, and an increase of the current density.