Patents by Inventor Junichi Watanabe

Junichi Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8315418
    Abstract: A sound receiver includes a casing having multiple cavities which house multiple microphones and through which sound waves are received. A first sound wave is directly received by microphones. A second sound wave is reflected by an inner wall of the cavities and changes in phase corresponding to the material of the inner wall. The material of the inner wall differs for each cavity, thereby effecting a different change in phase of the second sound wave at each of the inner walls.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: November 20, 2012
    Assignee: Fujitsu Limited
    Inventor: Junichi Watanabe
  • Patent number: 8223977
    Abstract: Sound waves having a proper phase difference are received by microphones fixed in a mesh-formed casing, while other sound waves pass through the casing, and reach a front surface of a diffuse reflection member. The randomly uneven front surface of the diffuse reflection member diffusely reflects the sound waves, thereby preventing the reflected sound waves from reaching the microphones at the proper phase difference. Any reflected sound waves that do reach the microphones are received at a phase difference that is different from the proper phase difference and are determined to be noise by a sound-source determining circuit, thereby enabling a sound receiver to receive only sound waves having the proper phase difference, and hence, improving directivity thereof.
    Type: Grant
    Filed: August 28, 2007
    Date of Patent: July 17, 2012
    Assignee: Fujitsu Limited
    Inventor: Junichi Watanabe
  • Publication number: 20120171785
    Abstract: There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3° or less, a ferroelectric layer having a structure the (111) orientation of which is inclined from the perpendicular direction to the upper surface of the substrate by 3.5° or less, and a capacitor upper electrode.
    Type: Application
    Filed: March 12, 2012
    Publication date: July 5, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Tomohiro Takamatsu, Junichi Watanabe, Ko Nakamura, Wensheng Wang, Naoyuki Sato, Aki Dote, Kenji Nomura, Yoshimasa Horii, Masaki Kurasawa, Kazuaki Takai
  • Publication number: 20120092099
    Abstract: An electromagnetic relay includes: an electromagnetic block a bobbin including collar parts at both ends of a coil winding part on which a coil is wound, an iron core and a yoke; a contact block including a fixed contact and a movable contact; a pair of partition walls provided in parallel with the axial direction of the coil, opposing each other with the coil sandwiched therebetween and abutting on both the collar parts of the bobbin; and a case that accommodates therein the electromagnet block, the contact block and the partition walls. Inner wall surfaces of the case abut on both the collar parts of the bobbin and the partition walls from a direction intersecting both a direction in which the pair of partition walls oppose and the axial direction of the bobbin.
    Type: Application
    Filed: June 18, 2010
    Publication date: April 19, 2012
    Applicant: PANASONIC ELECTRIC WORKS CO., LTD.
    Inventors: Kazuhiko Horii, Junichi Watanabe, Naoki Muro
  • Patent number: 8153448
    Abstract: There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3° or less, a ferroelectric layer having a structure the (111) orientation of which is inclined from the perpendicular direction to the upper surface of the substrate by 3.5° or less, and a capacitor upper electrode.
    Type: Grant
    Filed: May 12, 2009
    Date of Patent: April 10, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Tomohiro Takamatsu, Junichi Watanabe, Ko Nakamura, Wensheng Wang, Naoyuki Sato, Aki Dote, Kenji Nomura, Yoshimasa Horii, Masaki Kurasawa, Kazuaki Takai
  • Patent number: 8091387
    Abstract: A method of manufacturing high-quality preforms from glass melt, manufacturing glass elements, such as lenses, by press molding these preforms and, manufacturing optical elements by reheating and press molding these glass gobs. In the method glass gobs are continuously separated from a glass melt flow continuously flowing out of a nozzle and the separated glass gobs are formed with glass forming members that are intermittently or continuously moving. A support member is made to approach the front end of the nozzle, the front end of the glass melt flow is received by the support member, and the support member is dropped more rapidly than the rate of flow of the glass melt flow to separate a glass gob from the glass melt flow. The separated glass gob is transferred from the support member to a stopped or moving glass forming member to mold a glass article.
    Type: Grant
    Filed: March 18, 2004
    Date of Patent: January 10, 2012
    Assignee: Hoya Corporation
    Inventors: Yoshinori Iguchi, Katsumi Utsugi, Atsushi Uezaki, Junichi Watanabe, Tetsuya Saito, Akira Murakami
  • Publication number: 20110272187
    Abstract: Provided is a manufacturing method with which a high thermal conductivity silicon nitride substrate having excellent sintering performance can be manufactured without the occurrence of a molding crack or degreasing crack, as well as to provide a silicon nitride substrate, and a silicon nitride circuit board and a semiconductor module using said silicon nitride substrate. In this silicon nitride substrate manufacturing method, in which a slurry is produced by mixing a silicon nitride powder, a sintering additive powder, and a binder in an organic solvent which is a dispersion medium, and the slurry is formed into a sheet, followed by degreasing and sintering, the oxygen content of the silicon nitride powder is 2.0 mass % or less and the specific surface area of the same is 3 to 11 m2/g, the additive ratio of the sintering additive powder is 4 to 15 mol %, and the water content ratio of the organic solvent is 0.03 to 3 mass %.
    Type: Application
    Filed: January 13, 2010
    Publication date: November 10, 2011
    Applicant: Hitachi Metals, Ltd.
    Inventors: Youichirou Kaga, Hisayuki Imamura, Junichi Watanabe
  • Patent number: 8049446
    Abstract: A motor control device includes a dq-axis current control unit for generating a dq-axis voltage reference based on a dq-axis current reference and a dq-axis current signal, an initial magnetic pole position estimation unit for estimating a magnetic pole position of the motor upon power-on to generate a magnetic pole position signal, and a magnetic pole position estimation precision confirming unit for supplying a current in a d-axis direction after generation of the magnetic pole position signal with the initial magnetic pole position estimation unit, and checking an error of the magnetic pole position signal based on an angle of movement of the motor.
    Type: Grant
    Filed: July 8, 2009
    Date of Patent: November 1, 2011
    Assignee: Kabushiki Kaisha Yaskawa Denki
    Inventor: Junichi Watanabe
  • Publication number: 20110255709
    Abstract: An audio output device includes two digital microphone units that, upon receiving sound, convert the sound to PDM digital audio signals in which a state is represented by 1 or 0 in each predetermined period. The audio output device generates half-period digital audio signals, which are signals of a half period of the predetermined period, by using first digital audio signals and second digital audio signals that are the digital audio signals converted by the two digital microphones, where the states of the first digital audio signals are each reflected in one of two half periods corresponding to the predetermined period and states of the second audio signals are each reflected in the other half period. The audio output device then converts the half-period digital audio signals, which are generated by the generator, to analog audio signals and outputs the analog audio signals.
    Type: Application
    Filed: June 20, 2011
    Publication date: October 20, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Hideki Nishimura, Junichi Watanabe
  • Publication number: 20110177292
    Abstract: A ceramic assembled board shows an advantageous dividablility of allowing the board to be divided when intended and not allowing it to be divided with ease when unintended. A ceramic substrate shows an excellent degree of dimensional precision and bending strength. A ceramic circuit substrate shows a high dielectric strength. A ceramic assembled board is formed by cutting continuous dividing grooves on one or both of the surfaces of a sintered ceramic board by way of laser machining to produce a large number of circuit substrates and at least one of the continuous grooves has a largest depth section and a smallest depth section with a depth difference ?d of 10 ?m ??d?50 ?m.
    Type: Application
    Filed: June 22, 2009
    Publication date: July 21, 2011
    Applicant: HITACHI METALS, LTD.
    Inventors: Hiroyuki Teshima, Junichi Watanabe, Shinichi Kazui, Makoto Sasaki, Akihito Mizuno
  • Publication number: 20110176277
    Abstract: Provided are a silicon nitride substrate made of a silicon nitride sintered body that is high in strength and thermal conductivity, a method of producing the silicon nitride substrate, and a silicon nitride circuit substrate and a semiconductor module that use the silicon nitride substrate. According to the silicon nitride sintered body, in a silicon nitride substrate consisting of crystal grains 11 of ?-type silicon nitride and a grain boundary phase containing at least one type of rare earth element (RE), magnesium (Mg) and silicon (Si), the grain boundary phase consists of an amorphous phase 12 and a MgSiN2 crystal phase 13; the X-ray diffraction peak intensity of any crystal plane of a crystal phase containing the rare earth element (RE) is less than 0.0005 times the sum of the diffraction peak intensities of (110), (200), (101), (210), (201), (310), (320) and (002) of the crystal grains of the ?-type silicon nitride; and the X-ray diffraction peak intensity of (121) of the MgSiN2 crystal phase 13 is 0.
    Type: Application
    Filed: July 3, 2009
    Publication date: July 21, 2011
    Applicant: HITACHI METALS, LTD.
    Inventors: Youichirou Kaga, Junichi Watanabe
  • Publication number: 20110136052
    Abstract: A method of manufacturing toner including preparing a first liquid by dissolving or dispersing toner components including one or both of a binder resin and a precursor thereof in an organic solvent; preparing a second liquid by dispersing the first liquid in a first aqueous medium including a dispersant; producing primary particles by removing the organic solvent from the second liquid; washing the primary particles; preparing a third liquid by dispersing the washed primary particles in a second aqueous medium and heating the second aqueous medium while or after dispersing the washed primary particles therein; and producing toner particles by adding a charge controlling agent to the third liquid. This method satisfies the following inequation: 0.60?Sb/Sa?1.00 wherein Sa represents a BET specific surface area of the primary particles included in the third liquid and Sb represents that of the toner particles stored for 2 weeks at 40° C., 70% RH.
    Type: Application
    Filed: December 6, 2010
    Publication date: June 9, 2011
    Inventors: Junichi WATANABE, Kenichi Uehara, Junya Koeda, Daisuke Misawa, Keisuke Tada, Miyuki Hirata
  • Patent number: 7948075
    Abstract: A silicon nitride substrate having appropriately adjusted warpage and surface roughness can be obtained by mixing magnesium oxide of 3 to 4 wt % and at least one kind of rare-earth element oxide of 2 to 5 wt % with silicon nitride source material powder to form a sheet-molded body, sintering the sheet-molded body, and performing a heat treatment at a temperature of 1,550 to 1,700 degree C. with a pressure of 0.5 to 6.0 kPa with a plurality of substrates being stacked. Also, a silicon nitride circuit board and a semiconductor module using the same are provided.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: May 24, 2011
    Assignee: Hitachi Metals, Ltd.
    Inventors: Youichirou Kaga, Junichi Watanabe
  • Patent number: 7915533
    Abstract: In the silicon nitride substrate concerning an embodiment of the invention, degree of in-plane orientation fa of ? type silicon nitride is 0.4-0.8. Here, degree of in-plane orientation fa can be determined by the rate of the diffracted X-ray intensity in each lattice plane orientation in ? type silicon nitride. As a result of research by the inventors, it turned out that both high fracture toughness and high thermal conductivity are acquired, when degree of in-plane orientation fa was 0.4-0.8. Along the thickness direction, both the fracture toughness of 6.0 MPa·m1/2 or higher and the thermal conductivity of 90 W/m·K or higher can be attained.
    Type: Grant
    Filed: April 14, 2006
    Date of Patent: March 29, 2011
    Assignee: Hitachi Metals, Ltd.
    Inventors: Youichirou Kaga, Hiromi Kikuchi, Hisayuki Imamura, Junichi Watanabe
  • Publication number: 20090280577
    Abstract: There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3° or less, a ferroelectric layer having a structure the (111) orientation of which is inclined from the perpendicular direction to the upper surface of the substrate by 3.5° or less, and a capacitor upper electrode.
    Type: Application
    Filed: May 12, 2009
    Publication date: November 12, 2009
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Tomohiro TAKAMATSU, Junichi WATANABE, Ko NAKAMURA, Wensheng WANG, Naoyuki SATO, Aki DOTE, Kenji NOMURA, Yoshimasa HORII, Masaki KURASAWA, Kazuaki TAKAI
  • Publication number: 20090267547
    Abstract: A motor control device includes a dq-axis current control unit for generating a dq-axis voltage reference based on a dq-axis current reference and a dq-axis current signal, an initial magnetic pole position estimation unit for estimating a magnetic pole position of the motor upon power-on to generate a magnetic pole position signal, and a magnetic pole position estimation precision confirming unit for supplying a current in a d-axis direction after generation of the magnetic pole position signal with the initial magnetic pole position estimation unit, and checking an error of the magnetic pole position signal based on an angle of movement of the motor.
    Type: Application
    Filed: July 8, 2009
    Publication date: October 29, 2009
    Applicant: KABUSHIKI KAISHA YASKAWA DENKI
    Inventor: Junichi WATANABE
  • Publication number: 20090224399
    Abstract: A silicon nitride substrate having appropriately adjusted warpage and surface roughness can be obtained by mixing magnesium oxide of 3 to 4 wt % and at least one kind of rare-earth element oxide of 2 to 5 wt % with silicon nitride source material powder to form a sheet-molded body, sintering the sheet-molded body, and performing a heat treatment at a temperature of 1,550 to 1,700 degree C. with a pressure of 0.5 to 6.0 kPa with a plurality of substrates being stacked. Also, a silicon nitride circuit board and a semiconductor module using the same are provided.
    Type: Application
    Filed: March 3, 2009
    Publication date: September 10, 2009
    Applicant: HITACHI METALS, LTD.
    Inventors: Youichirou Kaga, Junichi Watanabe
  • Patent number: 7560897
    Abstract: To provide a current controller capable of constantly detecting an offset value of a current detection system, the offset value overlapping with a current detection value, in a state of regular operation of a motor to correct the current detection value and capable of current detection with high accuracy and a current offset correction method of the same. A carrier wave peak-trough judging part 10 is provided to discriminating the peak and the trough of a carrier wave. An A/D converted value detected in falling from the peak of the carrier wave is used as a current detection value. An A/D converted value detected in rising from the trough of the carrier wave is used as an offset value in the case that a modulated wave command is larger than a comparison standard value capable of computation by means of a calculation formula. On the basis of the current detection value and the offset value, carried out is an operation of a current detection correction value.
    Type: Grant
    Filed: March 3, 2006
    Date of Patent: July 14, 2009
    Assignee: Kabushiki Kaisha Yaskawa Denki
    Inventor: Junichi Watanabe
  • Patent number: 7547933
    Abstract: There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3° or less, a ferroelectric layer having a structure the (111) orientation of which is inclined from the perpendicular direction to the upper surface of the substrate by 3.5° or less, and a capacitor upper electrode.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: June 16, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Tomohiro Takamatsu, Junichi Watanabe, Ko Nakamura, Wensheng Wang, Naoyuki Sato, Aki Dote, Kenji Nomura, Yoshimasa Horii, Masaki Kurasawa, Kazuaki Takai
  • Patent number: 7547558
    Abstract: An Al2O3 film for covering a ferroelectric capacitor is formed by a sputtering process. The thickness of the Al2O3 film is preferably optimized according to amount of remanent polarization and fatigue tolerance required for the ferroelectric capacitor, for example, 10 nm to 100 nm. Next, oxygen is supplied to a PZT film via the Al2O3 film by executing a heat treatment in an oxygen atmosphere. As a result, an oxygen deficit in the PZT film is made up for. At this time, evaporation of Pb in the PZT film is suppressed because of the Al2O3 film, and deterioration of the fatigue tolerance responsive to decrease of Pb amount is suppressed. Subsequently, another Al2O3 film is formed as a second protective film by the sputtering process for opposing the deterioration factor in later process. The thickness of the Al2O3 film is preferably the thickness which sufficiently protects the ferroelectric capacitor from the deterioration factor in later wiring process.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: June 16, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Yoichi Okita, Junichi Watanabe, Naoya Sashida