Patents by Inventor Junichi Yasui
Junichi Yasui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20110202752Abstract: A secure LSI device 1 includes an encryption section 2 for encrypting a program, and an external I/F 50 for inputting/outputting a program or data from/to an external memory 100. In the encryption section 2, the operation of a private key arithmetic processing section 20 is prohibited with respect to a sequence whose execution is determined by a key-generation/update sequencer 30 to be impermissible. In the external I/F 50, a program processing section 51 and a data processing section 55 are structured independently from each other.Type: ApplicationFiled: April 21, 2011Publication date: August 18, 2011Applicant: PANASONIC CORPORATIONInventors: Makoto FUJIWARA, Yusuke Nemoto, Junichi Yasui, Takuji Maeda, Takayuki Ito, Yasushi Yamada, Shinji Inoue
-
Publication number: 20100329456Abstract: A secure LSI device 1 includes an encryption section 2 for encrypting a program, and an external I/F 50 for inputting/outputting a program or data from/to an external memory 100. In the encryption section 2, the operation of a private key arithmetic processing section 20 is prohibited with respect to a sequence whose execution is determined by a key-generation/update sequencer 30 to be impermissible. In the external I/F 50, a program processing section 51 and a data processing section 55 are structured independently from each other.Type: ApplicationFiled: September 8, 2010Publication date: December 30, 2010Applicant: PANASONIC CORPORATIONInventors: Makoto FUJIWARA, Yusuke NEMOTO, Junichi YASUI, Takuji MAEDA, Takayuki ITO, Yasushi YAMADA, Shinji INOUE
-
Patent number: 7852777Abstract: A network hardware device of the invention includes a reception section receiving data from a network, and outputting a reception completion signal, a timer section measuring a preset time, and a delay section generating an interrupt signal so as to notify a host CPU of completion of the reception. When the timer section does not measure a time, the delay section generates an interrupt signal upon reception of the reception completion signal. On the other hand, when the timer section measures a time, upon reception of the reception completion signal, the delay section generates an interrupt signal after the timer section measures a preset time.Type: GrantFiled: September 6, 2006Date of Patent: December 14, 2010Assignee: Panasonic CorporationInventors: Toshihiko Maruoka, Tsukasa Yoshiura, Junichi Yasui
-
Publication number: 20100309491Abstract: This disclosure discloses a printer comprising: a host communication device that performs information transmission and reception by wired or wireless communication for the functioning as a host device of a target device; and a target processing portion that performs predetermined processing in accordance with target device information acquired from said target device when said host communication device performs information transmission and reception with said target device.Type: ApplicationFiled: May 24, 2010Publication date: December 9, 2010Applicant: BROTHER KOGYO KABUSHIKI KAISHAInventors: Junichi YASUI, Takahiro MIWA, Yuichiro SUZUKI
-
Patent number: 7849331Abstract: A system including a secure LSI 1 establishes a communication path to/from a server 3 (UD1), and receives a common key-encrypted program generated by encryption with a common key and transmitted from the server 3 (UD6 and UD7). The received common key-encrypted program is decrypted to generate a raw program, and the raw program is re-encrypted with an inherent key to newly generate an inherent key-encrypted program, which is stored in an external memory.Type: GrantFiled: April 23, 2008Date of Patent: December 7, 2010Assignee: Panasonic CorporationInventors: Makoto Fujiwara, Yusuke Nemoto, Junichi Yasui, Takuji Maeda, Takayuki Ito, Yasushi Yamada, Shinji Inoue
-
Patent number: 7831841Abstract: A secure LSI device 1 includes an encryption section 2 for encrypting a program, and an external I/F 50 for inputting/outputting a program or data from/to an external memory 100. In the encryption section 2, the operation of a private key arithmetic processing section 20 is prohibited with respect to a sequence whose execution is determined by a key-generation/update sequencer 30 to be impermissible. In the external I/F 50, a program processing section 51 and a data processing section 55 are structured independently from each other.Type: GrantFiled: January 22, 2008Date of Patent: November 9, 2010Assignee: Panasonic CorporationInventors: Makoto Fujiwara, Yusuke Nemoto, Junichi Yasui, Takuji Maeda, Takayuki Ito, Yasushi Yamada, Shinji Inoue
-
Patent number: 7685435Abstract: An development environment of a high security level is provided for a key-installed system. Development of a program for a system having an LSI device which includes a secure memory is performed by providing another LSI device having the same structure and setting the provided LSI device to a development mode which is different from a product operation mode. Alternatively, the provided LSI device is set to an administrator mode to perform development and encryption of a key-generation program. The LSI device is set to a key-generation mode to execute the encrypted key-generation program, thereby generating various keys.Type: GrantFiled: July 23, 2003Date of Patent: March 23, 2010Assignee: Panasonic CorporationInventors: Makoto Fujiwara, Yusuke Nemoto, Junichi Yasui, Takuji Maeda, Takayuki Ito, Yasushi Yamada, Shinji Inoue
-
Patent number: 7546468Abstract: A system including a secure LSI 1 establishes a communication path to/from a server 3 (UD1), and receives a common key-encrypted program generated by encryption with a common key and transmitted from the server 3 (UD6 and UD7). The received common key-encrypted program is decrypted to generate a raw program, and the raw program is re-encrypted with an inherent key to newly generate an inherent key-encrypted program, which is stored in an external memory.Type: GrantFiled: October 30, 2003Date of Patent: June 9, 2009Assignee: Panasonic CorporationInventors: Makoto Fujiwara, Yusuke Nemoto, Junichi Yasui, Takuji Maeda, Takayuki Ito, Yasushi Yamada, Shinji Inoue
-
Publication number: 20090138728Abstract: A system including a secure LSI 1 establishes a communication path to/from a server 3 (UD1), and receives a common key-encrypted program generated by encryption with a common key and transmitted from the server 3 (UD6 and UD7). The received common key-encrypted program is decrypted to generate a raw program, and the raw program is re-encrypted with an inherent key to newly generate an inherent key-encrypted program, which is stored in an external memory.Type: ApplicationFiled: April 23, 2008Publication date: May 28, 2009Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Makoto Fujiwara, Yusuke Nemoto, Junichi Yasui, Takuji Maeda, Takayuki Ito, Yasushi Yamada, Shinji Inoue
-
Patent number: 7539312Abstract: A system including a secure LSI 1 establishes a communication path to/from a server 3 (UD1), and receives a common key-encrypted program generated by encryption with a common key and transmitted from the server 3 (UD6 and UD7). The received common key-encrypted program is decrypted to generate a raw program, and the raw program is re-encrypted with an inherent key to newly generate an inherent key-encrypted program, which is stored in an external memory.Type: GrantFiled: May 14, 2007Date of Patent: May 26, 2009Assignee: Panasonic CorporationInventors: Makoto Fujiwara, Yusuke Nemoto, Junichi Yasui, Takuji Maeda, Takayuki Ito, Yasushi Yamada, Shinji Inoue
-
Publication number: 20090037721Abstract: An development environment of a high security level is provided for a key-installed system. Development of a program for a system having an LSI device which includes a secure memory is performed by providing another LSI device having the same structure and setting the provided LSI device to a development mode which is different from a product operation mode. Alternatively, the provided LSI device is set to an administrator mode to perform development and encryption of a key-generation program. The LSI device is set to a key-generation mode to execute the encrypted key-generation program, thereby generating various keys.Type: ApplicationFiled: July 9, 2008Publication date: February 5, 2009Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Makoto FUJIWARA, Yusuke NEMOTO, Junichi YASUI, Takuji MAEDA, Takayuki ITO, Yasushi YAMADA, Shinji INOUE
-
Publication number: 20080144818Abstract: A secure LSI device 1 includes an encryption section 2 for encrypting a program, and an external I/F 50 for inputting/outputting a program or data from/to an external memory 100. In the encryption section 2, the operation of a private key arithmetic processing section 20 is prohibited with respect to a sequence whose execution is determined by a key-generation/update sequencer 30 to be impermissible. In the external I/F 50, a program processing section 51 and a data processing section 55 are structured independently from each other.Type: ApplicationFiled: January 22, 2008Publication date: June 19, 2008Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Makoto Fujiwara, Yusuke Nemoto, Junichi Yasui, Takuji Maeda, Takayuki Ito, Yasushi Yamada, Shinji Inoue
-
Patent number: 7340614Abstract: A secure LSI device 1 includes an encryption section 2 for encrypting a program, and an external I/F 50 for inputting/outputting a program or data from/to an external memory 100. In the encryption section 2, the operation of a private key arithmetic processing section 20 is prohibited with respect to a sequence whose execution is determined by a key-generation/update sequencer 30 to be impermissible. In the external I/F 50, a program processing section 51 and a data processing section 55 are structured independently from each other.Type: GrantFiled: September 4, 2003Date of Patent: March 4, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Makoto Fujiwara, Yusuke Nemoto, Junichi Yasui, Takuji Maeda, Takayuki Ito, Yasushi Yamada, Shinji Inoue
-
Publication number: 20070217614Abstract: A system including a secure LSI 1 establishes a communication path to/from a server 3 (UD1), and receives a common key-encrypted program generated by encryption with a common key and transmitted from the server 3 (UD6 and UD7). The received common key-encrypted program is decrypted to generate a raw program, and the raw program is re-encrypted with an inherent key to newly generate an inherent key-encrypted program, which is stored in an external memory.Type: ApplicationFiled: May 14, 2007Publication date: September 20, 2007Applicant: Matsushita Electric Industrial Co., LtdInventors: Makoto Fujiwara, Yusuke Nemoto, Junichi Yasui, Takuji Maeda, Takayuki Ito, Yasushi Yamada, Shinji Inoue
-
Publication number: 20070053301Abstract: A network hardware device of the invention includes a reception section receiving data from a network, and outputting a reception completion signal, a timer section measuring a preset time, and a delay section generating an interrupt signal so as to notify a host CPU of completion of the reception. When the timer section does not measure a time, the delay section generates an interrupt signal upon reception of the reception completion signal. On the other hand, when the timer section measures a time, upon reception of the reception completion signal, the delay section generates an interrupt signal after the timer section measures a preset time.Type: ApplicationFiled: September 6, 2006Publication date: March 8, 2007Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Toshihiko Maruoka, Tsukasa Yoshiura, Junichi Yasui
-
Publication number: 20050141534Abstract: Packet processing method and device. The device includes: a storage device for storing data; a transfer device for dividing the data into a plurality of data with a predetermined length and arranging the divided data at intervals in the storage device while securing a first blank area for attaching a protocol header to the divided data and a second blank area for attaching a protocol footer to the divided area; a read address control device for implementing access of data arranged at intervals in the storage device as continuous data; and a write address control device for storing the protocol header to be attached in the first blank area and the protocol footer to be attached in the second blank area when the packet conversion processing is performed on the divided data.Type: ApplicationFiled: November 12, 2004Publication date: June 30, 2005Applicant: Matsushita Elec. Ind. Co. Ltd.Inventors: Manabu Kawabata, Junichi Yasui
-
Publication number: 20040153657Abstract: An development environment of a high security level is provided for a key-installed system. Development of a program for a system having an LSI device which includes a secure memory is performed by providing another LSI device having the same structure and setting the provided LSI device to a development mode which is different from a product operation mode. Alternatively, the provided LSI device is set to an administrator mode to perform development and encryption of a key-generation program. The LSI device is set to a key-generation mode to execute the encrypted key-generation program, thereby generating various keys.Type: ApplicationFiled: July 23, 2003Publication date: August 5, 2004Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Makoto Fujiwara, Yusuke Nemoto, Junichi Yasui, Takuji Maeda, Takayuki Ito, Yasushi Yamada, Shinji Inoue
-
Publication number: 20040105548Abstract: A system including a secure LSI 1 establishes a communication path to/from a server 3 (UD1), and receives a common key-encrypted program generated by encryption with a common key and transmitted from the server 3 (UD6 and UD7). The received common key-encrypted program is decrypted to generate a raw program, and the raw program is re-encrypted with an inherent key to newly generate an inherent key-encrypted program, which is stored in an external memory.Type: ApplicationFiled: October 30, 2003Publication date: June 3, 2004Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Makoto Fujiwara, Yusuke Nemoto, Junichi Yasui, Takuji Maeda, Takayuki Ito, Yasushi Yamada, Shinji Inoue
-
Publication number: 20040059928Abstract: A secure LSI device 1 includes an encryption section 2 for encrypting a program, and an external I/F 50 for inputting/outputting a program or data from/to an external memory 100. In the encryption section 2, the operation of a private key arithmetic processing section 20 is prohibited with respect to a sequence whose execution is determined by a key-generation/update sequencer 30 to be impermissible. In the external I/F 50, a program processing section 51 and a data processing section 55 are structured independently from each other.Type: ApplicationFiled: September 4, 2003Publication date: March 25, 2004Applicant: Mitsushita Electric Industrial Co., Ltd.Inventors: Makoto Fujiwara, Yusuke Nemoto, Junichi Yasui, Takuji Maeda, Takayuki Ito, Yasushi Yamada, Shinji Inoue
-
Patent number: 4073028Abstract: This invention discloses an etching processing apparatus wherein a member in the form of a sponge is soaked in an etching processing liquid vessel, for rubbing a surface of a lithographic master, which is conveyed by an endless belt, which rotates in a predetermined direction, through the etching processing liquid, so that the non-imaged part of the lithographic master may be made hydrophilic by keeping an adequate pressure between the sponge-form member and the endless belt.Type: GrantFiled: August 2, 1976Date of Patent: February 14, 1978Assignee: Iwatsu Electric Co., Ltd.Inventors: Akira Kakito, Junichi Yasui, Yoji Koganei